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include/configs: drop COUNTER_FREQUENCY

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Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY

Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Peng Fan 2022-04-13 17:47:21 +08:00 committed by Tom Rini
parent abf8d9632f
commit c5b9bf5518
69 changed files with 2 additions and 155 deletions
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2
arch/arm/cpu/armv8/fsl-layerscape/spintable.S
View File

@ -113,6 +113,6 @@ _dead_loop:
.align 3
.global __real_cntfrq
__real_cntfrq:
.quad COUNTER_FREQUENCY
.quad CONFIG_COUNTER_FREQUENCY
/* Secondary Boot Code ends here */
__secondary_boot_code_end:

3
include/configs/apalis-imx8.h
View File

@ -84,7 +84,4 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#endif /* __APALIS_IMX8_H */

3
include/configs/apalis-imx8x.h
View File

@ -115,9 +115,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
/* Networking */
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE 0x5b040000

3
include/configs/capricorn-common.h
View File

@ -123,9 +123,6 @@
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#define BOOTAUX_RESERVED_MEM_BASE 0x88000000
#define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */

3
include/configs/cgtqmx8.h
View File

@ -131,9 +131,6 @@
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
/* Networking */
#define CONFIG_FEC_MXC_PHYADDR -1
#define FEC_QUIRK_ENET_MAC

1
include/configs/colibri-imx8x.h
View File

@ -119,7 +119,6 @@
sizeof(CONFIG_SYS_PROMPT) + 16)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#define BOOTAUX_RESERVED_MEM_BASE 0x88000000
#define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */

3
include/configs/condor.h
View File

@ -24,7 +24,4 @@
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#endif /* __CONDOR_H */

3
include/configs/draak.h
View File

@ -11,9 +11,6 @@
#include "rcar-gen3-common.h"
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_FLASH_SHOW_PROGRESS 45

3
include/configs/dragonboard410c.h
View File

@ -23,9 +23,6 @@
/* UART */
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
/* Fixup - in init code we switch from device to host mode,
* it has to be done after each HCD reset */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

3
include/configs/dragonboard820c.h
View File

@ -23,9 +23,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
#ifndef CONFIG_SPL_BUILD
#include <config_distro_bootcmd.h>
#endif

3
include/configs/eagle.h
View File

@ -16,7 +16,4 @@
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#endif /* __EAGLE_H */

3
include/configs/ebisu.h
View File

@ -13,9 +13,6 @@
#include "rcar-gen3-common.h"
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_FLASH_SHOW_PROGRESS 45

1
include/configs/exynos-common.h
View File

@ -19,7 +19,6 @@
/* Keep L2 Cache Disabled */
/* input clock of PLL: 24MHz input clock */
#define COUNTER_FREQUENCY 24000000
/* select serial console configuration */

3
include/configs/exynos7420-common.h
View File

@ -24,9 +24,6 @@
/* select serial console configuration */
/* Timer input clock frequency */
#define COUNTER_FREQUENCY 24000000
/* IRAM Layout */
#define CONFIG_IRAM_BASE 0x02100000
#define CONFIG_IRAM_SIZE 0x58000

3
include/configs/exynos78x0-common.h
View File

@ -25,9 +25,6 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Timer input clock frequency */
#define COUNTER_FREQUENCY 26000000
#define CPU_RELEASE_ADDR secondary_boot_addr
#define CONFIG_SYS_BAUDRATE_TABLE \

3
include/configs/falcon.h
View File

@ -24,7 +24,4 @@
/* Board Clock */
/* XTAL_CLK : 16.66MHz */
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#endif /* __FALCON_H */

3
include/configs/hihope-rzg2.h
View File

@ -11,7 +11,4 @@
#include "rcar-gen3-common.h"
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#endif /* __HIHOPE_RZG2_H */

3
include/configs/hikey.h
View File

@ -32,9 +32,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
/* Generic Interrupt Controller Definitions */
#define GICD_BASE 0xf6801000
#define GICC_BASE 0xf6802000

3
include/configs/hikey960.h
View File

@ -24,9 +24,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
/* Generic Interrupt Controller Definitions */
#define GICD_BASE 0xe82b1000
#define GICC_BASE 0xe82b2000

3
include/configs/imx8qm_mek.h
View File

@ -130,7 +130,4 @@
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#endif /* __IMX8QM_MEK_H */

3
include/configs/imx8qm_rom7720.h
View File

@ -124,8 +124,5 @@
/* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#include <linux/stringify.h>
#endif /* __IMX8QM_ROM7720_H */

3
include/configs/imx8qxp_mek.h
View File

@ -129,9 +129,6 @@
/* LPDDR4 board total DDR is 3GB */
#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#ifndef CONFIG_DM_PCA953X
#define CONFIG_PCA953X
#endif

2
include/configs/imx8ulp_evk.h
View File

@ -27,8 +27,6 @@
#endif
#define COUNTER_FREQUENCY 1000000 /* 1MHz */
/* ENET Config */
#if defined(CONFIG_FEC_MXC)
#define PHY_ANEG_TIMEOUT 20000

1
include/configs/km/pg-wcom-ls102xa.h
View File

@ -176,7 +176,6 @@
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define COUNTER_FREQUENCY 8333333
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

1
include/configs/kontron_sl28.h
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@ -32,7 +32,6 @@
#define CPU_RELEASE_ADDR secondary_boot_addr
/* generic timer */
#define COUNTER_FREQUENCY 25000000
/* early heap for SPL DM */
#define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE

3
include/configs/ls1012a_common.h
View File

@ -21,9 +21,6 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
/* CSU */
#define CONFIG_LAYERSCAPE_NS_ACCESS

1
include/configs/ls1021aiot.h
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@ -119,7 +119,6 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

1
include/configs/ls1021aqds.h
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@ -334,7 +334,6 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

1
include/configs/ls1021atsn.h
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@ -99,7 +99,6 @@
#endif
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

1
include/configs/ls1021atwr.h
View File

@ -192,7 +192,6 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

3
include/configs/ls1028a_common.h
View File

@ -25,9 +25,6 @@
*/
#define CPU_RELEASE_ADDR secondary_boot_addr
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
/* GPIO */
/* I2C */

3
include/configs/ls1043a_common.h
View File

@ -44,9 +44,6 @@
#define CPU_RELEASE_ADDR secondary_boot_addr
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1

3
include/configs/ls1046a_common.h
View File

@ -44,9 +44,6 @@
#define CPU_RELEASE_ADDR secondary_boot_addr
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1

1
include/configs/ls1088aqds.h
View File

@ -13,7 +13,6 @@
#endif
#define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4)
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS 0x51

1
include/configs/ls1088ardb.h
View File

@ -14,7 +14,6 @@
#endif
#define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
#ifdef CONFIG_EMU
#define CONFIG_SYS_FSL_DDR_EMU

2
include/configs/ls2080a_common.h
View File

@ -41,12 +41,10 @@
#define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
/* Generic Timer Definitions */
/*
* This is not an accurate number. It is used in start.S. The frequency
* will be udpated later when get_bus_freq(0) is available.
*/
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
/* GPIO */

1
include/configs/lx2160a_common.h
View File

@ -46,7 +46,6 @@
* will be udpated later when get_bus_freq(0) is available.
*/
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
/* Serial Port */
#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)

1
include/configs/mt8183.h
View File

@ -11,7 +11,6 @@
#include <linux/sizes.h>
#define COUNTER_FREQUENCY 13000000
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4

1
include/configs/mt8512.h
View File

@ -13,7 +13,6 @@
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
#define COUNTER_FREQUENCY 13000000
#define CONFIG_SYS_BOOTM_LEN SZ_64M

1
include/configs/mt8516.h
View File

@ -11,7 +11,6 @@
#include <linux/sizes.h>
#define COUNTER_FREQUENCY 13000000
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4

1
include/configs/mt8518.h
View File

@ -13,7 +13,6 @@
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
#define COUNTER_FREQUENCY 13000000
/* DRAM definition */
#define CONFIG_SYS_SDRAM_BASE 0x40000000

1
include/configs/mx6_common.h
View File

@ -10,7 +10,6 @@
#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
#else
#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_L2_PL310

1
include/configs/mx7_common.h
View File

@ -16,7 +16,6 @@
/* Timer settings */
#define CONFIG_MXC_GPT_HCLK
#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
#define CONFIG_SYS_BOOTM_LEN 0x1000000

3
include/configs/owl-common.h
View File

@ -13,9 +13,6 @@
/* SDRAM Definitions */
#define CONFIG_SYS_SDRAM_BASE 0x0
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (24000000) /* 24MHz */
/* Some commands use this as the default load address */
/*

3
include/configs/p2371-2180.h
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@ -24,7 +24,4 @@
#include "tegra-common-post.h"
/* Crystal is 38.4MHz. clk_m runs at half that rate */
#define COUNTER_FREQUENCY 19200000
#endif /* _P2371_2180_H */

3
include/configs/p2771-0000.h
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@ -37,7 +37,4 @@
#include "tegra-common-post.h"
/* Crystal is 38.4MHz. clk_m runs at half that rate */
#define COUNTER_FREQUENCY 19200000
#endif

3
include/configs/p3450-0000.h
View File

@ -35,7 +35,4 @@
/* General networking support */
#include "tegra-common-post.h"
/* Crystal is 38.4MHz. clk_m runs at half that rate */
#define COUNTER_FREQUENCY 19200000
#endif /* _P3450_0000_H */

3
include/configs/presidio_asic.h
View File

@ -12,8 +12,7 @@
#define CONFIG_SYS_BOOTM_LEN 0x00c00000
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000
#define CONFIG_SYS_TIMER_RATE COUNTER_FREQUENCY
#define CONFIG_SYS_TIMER_RATE 25000000
#define CONFIG_SYS_TIMER_COUNTER 0xf4321008
/* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE

2
include/configs/px30_common.h
View File

@ -12,8 +12,6 @@
#define CONFIG_SYS_NS16550_MEM32
#define COUNTER_FREQUENCY 24000000
/* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
#define CONFIG_IRAM_BASE 0xff020000

1
include/configs/rk3036_common.h
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@ -10,7 +10,6 @@
#define CONFIG_SYS_CBSIZE 1024
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000

1
include/configs/rk3128_common.h
View File

@ -11,7 +11,6 @@
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_CBSIZE 1024
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_IRAM_BASE 0x10080000

1
include/configs/rk322x_common.h
View File

@ -11,7 +11,6 @@
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_SYS_INIT_SP_ADDR 0x61100000

1
include/configs/rk3288_common.h
View File

@ -13,7 +13,6 @@
#define CONFIG_SYS_CBSIZE 1024
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_HZ_CLOCK 24000000
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM

1
include/configs/rk3308_common.h
View File

@ -20,7 +20,6 @@
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */

2
include/configs/rk3328_common.h
View File

@ -10,8 +10,6 @@
#define CONFIG_IRAM_BASE 0xff090000
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000

2
include/configs/rk3368_common.h
View File

@ -15,8 +15,6 @@
#define SDRAM_MAX_SIZE 0xff000000
#define CONFIG_SYS_CBSIZE 1024
#define COUNTER_FREQUENCY 24000000
#define CONFIG_IRAM_BASE 0xff8c0000
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000

2
include/configs/rk3399_common.h
View File

@ -10,8 +10,6 @@
#define CONFIG_SYS_CBSIZE 1024
#define COUNTER_FREQUENCY 24000000
#define CONFIG_IRAM_BASE 0xff8c0000
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000

2
include/configs/rk3568_common.h
View File

@ -10,8 +10,6 @@
#define CONFIG_SYS_CBSIZE 1024
#define COUNTER_FREQUENCY 24000000
#define CONFIG_IRAM_BASE 0xfdcc0000
#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000

3
include/configs/salvator-x.h
View File

@ -11,9 +11,6 @@
#include "rcar-gen3-common.h"
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_FLASH_SHOW_PROGRESS 45

3
include/configs/sdm845.h
View File

@ -13,9 +13,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootm_size=0x4000000\0" \
"bootm_low=0x80000000\0" \

3
include/configs/silinux-ek874.h
View File

@ -11,7 +11,4 @@
#include "rcar-gen3-common.h"
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#endif /* __SILINUX_EK874_H */

5
include/configs/socfpga_soc64_common.h
View File

@ -108,11 +108,6 @@
#define CONFIG_SYS_NS16550_CLK 100000000
#define CONFIG_SYS_NS16550_MEM32
/*
* Timer & watchdog configurations
*/
#define COUNTER_FREQUENCY 400000000
/*
* SDMMC configurations
*/

1
include/configs/sunxi-common.h
View File

@ -38,7 +38,6 @@
#endif
/* CPU */
#define COUNTER_FREQUENCY 24000000
/*
* The DRAM Base differs between some models. We cannot use macros for the

1
include/configs/ten64.h
View File

@ -9,7 +9,6 @@
#include "ls1088a_common.h"
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000

3
include/configs/thunderx_88xx.h
View File

@ -20,9 +20,6 @@
/* SMP Spin Table Definitions */
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
/* PL011 Serial Configuration */
#define CONFIG_PL011_CLOCK 24000000

3
include/configs/ulcb.h
View File

@ -11,9 +11,6 @@
#include "rcar-gen3-common.h"
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_FLASH_SHOW_PROGRESS 45

3
include/configs/vexpress_aemv8.h
View File

@ -73,9 +73,6 @@
#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 24000000 /* 24MHz */
/* Generic Interrupt Controller Definitions */
#ifdef CONFIG_GICV3
#define GICD_BASE (V2M_PA_BASE + 0x2f000000)

5
include/configs/xilinx_versal.h
View File

@ -16,11 +16,6 @@
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if CONFIG_COUNTER_FREQUENCY
# define COUNTER_FREQUENCY CONFIG_COUNTER_FREQUENCY
#endif
/* Serial setup */
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 4800, 9600, 19200, 38400, 57600, 115200 }

5
include/configs/xilinx_zynqmp.h
View File

@ -16,11 +16,6 @@
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if !defined(COUNTER_FREQUENCY)
# define COUNTER_FREQUENCY 100000000
#endif
/* Serial setup */
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 4800, 9600, 19200, 38400, 57600, 115200 }