Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
	MAINTAINERS
	boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Stefano Babic
2013-09-13 12:04:54 +02:00
57 changed files with 2669 additions and 2855 deletions

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@@ -7,8 +7,6 @@
# (mem base + reserved)
#
#Provide at least 16MB spacing between us and the Linux Kernel image
CONFIG_SPL_PAD_TO := 12320
UBL_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/ublimage.cfg
ifndef CONFIG_SPL_BUILD
ALL-y += $(obj)u-boot.ubl

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@@ -102,7 +102,11 @@ void board_init_r(gd_t *gd, ulong dest_addr)
env_relocate();
#endif
i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#ifdef CONFIG_SYS_I2C
i2c_init_all();
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
gd->ram_size = initdram(0);
#ifdef CONFIG_SPL_NAND_BOOT

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@@ -527,6 +527,9 @@ void spl_board_init(void)
*/
board_early_init_f();
/* enable the LSB transmitter */
gpio_write_bit(CONFIG_SYS_GPIO_LSB_ENABLE, 1);
/*
* Clear resets
*/

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@@ -0,0 +1,34 @@
#
# Copyright (C) 2013 Samsung Electronics
#
# SPDX-License-Identifier: GPL-2.0+
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS += arndale_spl.o
ifndef CONFIG_SPL_BUILD
COBJS += arndale.o
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
ALL := $(obj).depend $(LIB)
all: $(ALL)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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@@ -0,0 +1,101 @@
/*
* Copyright (C) 2013 Samsung Electronics
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/dwmmc.h>
#include <asm/arch/power.h>
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
}
int dram_init(void)
{
int i;
u32 addr;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
}
return 0;
}
int power_init_board(void)
{
set_ps_hold_ctrl();
return 0;
}
void dram_init_banksize(void)
{
int i;
u32 addr, size;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
gd->bd->bi_dram[i].start = addr;
gd->bd->bi_dram[i].size = size;
}
}
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
int ret;
/* dwmmc initializattion for available channels */
ret = exynos_dwmmc_init(gd->fdt_blob);
if (ret)
debug("dwmmc init failed\n");
return ret;
}
#endif
static int board_uart_init(void)
{
int err = 0, uart_id;
for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
if (err) {
debug("UART%d not configured\n",
(uart_id - PERIPH_ID_UART0));
return err;
}
}
return err;
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
int err;
err = board_uart_init();
if (err) {
debug("UART init failed\n");
return err;
}
return err;
}
#endif
#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
{
printf("\nBoard: Arndale\n");
return 0;
}
#endif

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@@ -0,0 +1,50 @@
/*
* Copyright (c) 2012 The Chromium OS Authors.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/arch/spl.h>
#define SIGNATURE 0xdeadbeef
/* Parameters of early board initialization in SPL */
static struct spl_machine_param machine_param
__attribute__((section(".machine_param"))) = {
.signature = SIGNATURE,
.version = 1,
.params = "vmubfasirM",
.size = sizeof(machine_param),
.mem_iv_size = 0x1f,
.mem_type = DDR_MODE_DDR3,
/*
* Set uboot_size to 0x100000 bytes.
*
* This is an overly conservative value chosen to accommodate all
* possible U-Boot image. You are advised to set this value to a
* smaller realistic size via scripts that modifies the .machine_param
* section of output U-Boot image.
*/
.uboot_size = 0x100000,
.boot_source = BOOT_MODE_OM,
.frequency_mhz = 800,
.arm_freq_mhz = 1000,
.serial_base = 0x12c30000,
.i2c_base = 0x12c60000,
.mem_manuf = MEM_MANUF_SAMSUNG,
};
struct spl_machine_param *spl_get_machine_params(void)
{
if (machine_param.signature != SIGNATURE) {
/* Will hang if SIGNATURE dont match */
while (1)
;
}
return &machine_param;
}

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@@ -0,0 +1,39 @@
/*
* SAMSUNG Arndale board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "exynos5250.dtsi"
/ {
model = "SAMSUNG Arndale board based on EXYNOS5250";
compatible = "samsung,arndale", "samsung,exynos5250";
aliases {
serial0 = "/serial@12C20000";
console = "/serial@12C20000";
};
mmc@12200000 {
samsung,bus-width = <8>;
samsung,timing = <1 3 3>;
};
mmc@12210000 {
status = "disabled";
};
mmc@12220000 {
samsung,bus-width = <4>;
samsung,timing = <1 2 3>;
};
mmc@12230000 {
status = "disabled";
};
};

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@@ -1,18 +0,0 @@
#
# Copyright (C) 2010 Samsung Electronics
# Kyungmin Park <kyungmin.park@samsung.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
# On S5PC100 we use the 128 MiB OneDRAM bank at
#
# 0x30000000 to 0x35000000 (80MiB)
# 0x38000000 to 0x40000000 (128MiB)
#
# On S5PC110 we use the 128 MiB OneDRAM bank at
#
# 0x30000000 to 0x35000000 (80MiB)
# 0x40000000 to 0x50000000 (256MiB)
#
CONFIG_SYS_TEXT_BASE = 0x34800000

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@@ -72,7 +72,7 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
int i;
int i, ret, ret_sd = 0;
/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
s5p_gpio_direction_output(&s5pc110_gpio->j2, 7, 1);
@@ -95,7 +95,36 @@ int board_mmc_init(bd_t *bis)
s5p_gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X);
}
return s5p_mmc_init(0, 4);
ret = s5p_mmc_init(0, 4);
if (ret)
error("MMC: Failed to init MMC:0.\n");
/*
* SD card (T_FLASH) detect and init
* T_FLASH_DETECT: EINT28: GPH3[4] input mode
*/
s5p_gpio_cfg_pin(&s5pc110_gpio->h3, 4, GPIO_INPUT);
s5p_gpio_set_pull(&s5pc110_gpio->h3, 4, GPIO_PULL_UP);
if (!s5p_gpio_get_value(&s5pc110_gpio->h3, 4)) {
for (i = 0; i < 7; i++) {
if (i == 2)
continue;
/* GPG2[0:6] special function 2 */
s5p_gpio_cfg_pin(&s5pc110_gpio->g2, i, 0x2);
/* GPG2[0:6] pull disable */
s5p_gpio_set_pull(&s5pc110_gpio->g2, i, GPIO_PULL_NONE);
/* GPG2[0:6] drv 4x */
s5p_gpio_set_drv(&s5pc110_gpio->g2, i, GPIO_DRV_4X);
}
ret_sd = s5p_mmc_init(2, 4);
if (ret_sd)
error("MMC: Failed to init SD card (MMC:2).\n");
}
return ret & ret_sd;
}
#endif

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@@ -1,16 +0,0 @@
#
# Copyright (C) 2008 # Samsung Elecgtronics
# Kyungmin Park <kyungmin.park@samsung.com>
#
# On S5PC100 we use the 128 MiB OneDRAM bank at
#
# 0x30000000 to 0x35000000 (80MiB)
# 0x38000000 to 0x40000000 (128MiB)
#
# On S5PC110 we use the 128 MiB OneDRAM bank at
#
# 0x30000000 to 0x35000000 (80MiB)
# 0x40000000 to 0x48000000 (128MiB)
#
CONFIG_SYS_TEXT_BASE = 0x34800000