Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts: MAINTAINERS boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
@@ -7,8 +7,6 @@
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# (mem base + reserved)
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#
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#Provide at least 16MB spacing between us and the Linux Kernel image
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CONFIG_SPL_PAD_TO := 12320
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UBL_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/ublimage.cfg
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ifndef CONFIG_SPL_BUILD
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ALL-y += $(obj)u-boot.ubl
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@@ -102,7 +102,11 @@ void board_init_r(gd_t *gd, ulong dest_addr)
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env_relocate();
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#endif
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i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#ifdef CONFIG_SYS_I2C
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i2c_init_all();
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#else
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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gd->ram_size = initdram(0);
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#ifdef CONFIG_SPL_NAND_BOOT
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@@ -527,6 +527,9 @@ void spl_board_init(void)
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*/
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board_early_init_f();
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/* enable the LSB transmitter */
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gpio_write_bit(CONFIG_SYS_GPIO_LSB_ENABLE, 1);
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/*
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* Clear resets
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*/
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34
board/samsung/arndale/Makefile
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34
board/samsung/arndale/Makefile
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@@ -0,0 +1,34 @@
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#
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# Copyright (C) 2013 Samsung Electronics
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS += arndale_spl.o
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ifndef CONFIG_SPL_BUILD
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COBJS += arndale.o
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endif
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
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ALL := $(obj).depend $(LIB)
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all: $(ALL)
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$(LIB): $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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101
board/samsung/arndale/arndale.c
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101
board/samsung/arndale/arndale.c
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@@ -0,0 +1,101 @@
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/*
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* Copyright (C) 2013 Samsung Electronics
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/dwmmc.h>
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#include <asm/arch/power.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
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return 0;
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}
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int dram_init(void)
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{
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int i;
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u32 addr;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
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gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
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}
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return 0;
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}
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int power_init_board(void)
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{
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set_ps_hold_ctrl();
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return 0;
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}
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void dram_init_banksize(void)
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{
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int i;
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u32 addr, size;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
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size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
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gd->bd->bi_dram[i].start = addr;
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gd->bd->bi_dram[i].size = size;
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}
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}
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#ifdef CONFIG_GENERIC_MMC
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int board_mmc_init(bd_t *bis)
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{
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int ret;
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/* dwmmc initializattion for available channels */
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ret = exynos_dwmmc_init(gd->fdt_blob);
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if (ret)
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debug("dwmmc init failed\n");
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return ret;
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}
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#endif
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static int board_uart_init(void)
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{
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int err = 0, uart_id;
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for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
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err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
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if (err) {
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debug("UART%d not configured\n",
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(uart_id - PERIPH_ID_UART0));
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return err;
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}
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}
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return err;
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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int err;
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err = board_uart_init();
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if (err) {
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debug("UART init failed\n");
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return err;
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}
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return err;
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}
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#endif
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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printf("\nBoard: Arndale\n");
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return 0;
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}
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#endif
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50
board/samsung/arndale/arndale_spl.c
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50
board/samsung/arndale/arndale_spl.c
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@@ -0,0 +1,50 @@
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/*
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* Copyright (c) 2012 The Chromium OS Authors.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/spl.h>
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#define SIGNATURE 0xdeadbeef
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/* Parameters of early board initialization in SPL */
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static struct spl_machine_param machine_param
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__attribute__((section(".machine_param"))) = {
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.signature = SIGNATURE,
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.version = 1,
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.params = "vmubfasirM",
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.size = sizeof(machine_param),
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.mem_iv_size = 0x1f,
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.mem_type = DDR_MODE_DDR3,
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/*
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* Set uboot_size to 0x100000 bytes.
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*
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* This is an overly conservative value chosen to accommodate all
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* possible U-Boot image. You are advised to set this value to a
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* smaller realistic size via scripts that modifies the .machine_param
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* section of output U-Boot image.
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*/
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.uboot_size = 0x100000,
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.boot_source = BOOT_MODE_OM,
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.frequency_mhz = 800,
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.arm_freq_mhz = 1000,
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.serial_base = 0x12c30000,
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.i2c_base = 0x12c60000,
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.mem_manuf = MEM_MANUF_SAMSUNG,
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};
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struct spl_machine_param *spl_get_machine_params(void)
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{
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if (machine_param.signature != SIGNATURE) {
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/* Will hang if SIGNATURE dont match */
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while (1)
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;
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}
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return &machine_param;
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}
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39
board/samsung/dts/exynos5250-arndale.dts
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39
board/samsung/dts/exynos5250-arndale.dts
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@@ -0,0 +1,39 @@
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/*
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* SAMSUNG Arndale board device tree source
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*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "exynos5250.dtsi"
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/ {
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model = "SAMSUNG Arndale board based on EXYNOS5250";
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compatible = "samsung,arndale", "samsung,exynos5250";
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aliases {
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serial0 = "/serial@12C20000";
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console = "/serial@12C20000";
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};
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mmc@12200000 {
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samsung,bus-width = <8>;
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samsung,timing = <1 3 3>;
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};
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mmc@12210000 {
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status = "disabled";
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};
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mmc@12220000 {
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samsung,bus-width = <4>;
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samsung,timing = <1 2 3>;
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};
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mmc@12230000 {
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status = "disabled";
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};
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};
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@@ -1,18 +0,0 @@
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#
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# Copyright (C) 2010 Samsung Electronics
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# Kyungmin Park <kyungmin.park@samsung.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# On S5PC100 we use the 128 MiB OneDRAM bank at
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#
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# 0x30000000 to 0x35000000 (80MiB)
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# 0x38000000 to 0x40000000 (128MiB)
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#
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# On S5PC110 we use the 128 MiB OneDRAM bank at
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#
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# 0x30000000 to 0x35000000 (80MiB)
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# 0x40000000 to 0x50000000 (256MiB)
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#
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CONFIG_SYS_TEXT_BASE = 0x34800000
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@@ -72,7 +72,7 @@ int checkboard(void)
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#ifdef CONFIG_GENERIC_MMC
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int board_mmc_init(bd_t *bis)
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{
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int i;
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int i, ret, ret_sd = 0;
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/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
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s5p_gpio_direction_output(&s5pc110_gpio->j2, 7, 1);
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@@ -95,7 +95,36 @@ int board_mmc_init(bd_t *bis)
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s5p_gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X);
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}
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return s5p_mmc_init(0, 4);
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ret = s5p_mmc_init(0, 4);
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if (ret)
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error("MMC: Failed to init MMC:0.\n");
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/*
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* SD card (T_FLASH) detect and init
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* T_FLASH_DETECT: EINT28: GPH3[4] input mode
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*/
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s5p_gpio_cfg_pin(&s5pc110_gpio->h3, 4, GPIO_INPUT);
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s5p_gpio_set_pull(&s5pc110_gpio->h3, 4, GPIO_PULL_UP);
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if (!s5p_gpio_get_value(&s5pc110_gpio->h3, 4)) {
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for (i = 0; i < 7; i++) {
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if (i == 2)
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continue;
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/* GPG2[0:6] special function 2 */
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s5p_gpio_cfg_pin(&s5pc110_gpio->g2, i, 0x2);
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/* GPG2[0:6] pull disable */
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s5p_gpio_set_pull(&s5pc110_gpio->g2, i, GPIO_PULL_NONE);
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/* GPG2[0:6] drv 4x */
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s5p_gpio_set_drv(&s5pc110_gpio->g2, i, GPIO_DRV_4X);
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}
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ret_sd = s5p_mmc_init(2, 4);
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if (ret_sd)
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error("MMC: Failed to init SD card (MMC:2).\n");
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}
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return ret & ret_sd;
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}
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#endif
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@@ -1,16 +0,0 @@
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#
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# Copyright (C) 2008 # Samsung Elecgtronics
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# Kyungmin Park <kyungmin.park@samsung.com>
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#
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# On S5PC100 we use the 128 MiB OneDRAM bank at
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#
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# 0x30000000 to 0x35000000 (80MiB)
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# 0x38000000 to 0x40000000 (128MiB)
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#
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# On S5PC110 we use the 128 MiB OneDRAM bank at
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#
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# 0x30000000 to 0x35000000 (80MiB)
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# 0x40000000 to 0x48000000 (128MiB)
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#
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CONFIG_SYS_TEXT_BASE = 0x34800000
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