Enable L2 cache parity/ECC error checking
Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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@ -337,7 +337,7 @@ int enable_cluster_l2(void)
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while ((in_be32(&l2cache->l2csr0)
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& (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0)
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;
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out_be32(&l2cache->l2csr0, L2CSR0_L2E);
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out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE);
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}
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i++;
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} while (!(cluster & TP_CLUSTER_EOC));
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@ -734,7 +734,7 @@ enable_l2_cluster_l2:
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isync
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and. r1, r0, r4
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bne 1b
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lis r4, L2CSR0_L2E@h
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lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
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sync
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stw r4, 0(r3) /* enable L2 */
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delete_ccsr_l2_tlb:
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