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stm32mp1: add FUSE command support

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Add support of fuse command (read/write/program/sense)
on bank 0 to access to BSEC SAFMEM (4096 OTP bits).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrick Delaunay 2018-05-17 15:24:06 +02:00 committed by Tom Rini
parent 19f589923a
commit c3600e1f92
6 changed files with 129 additions and 0 deletions
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1
MAINTAINERS
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@ -204,6 +204,7 @@ M: Patrick Delaunay <patrick.delaunay@st.com>
S: Maintained
F: arch/arm/mach-stm32mp
F: drivers/clk/clk_stm32mp1.c
F: drivers/misc/stm32mp_fuse.c
F: drivers/ram/stm32mp1/
ARM STM STV0991

1
arch/arm/Kconfig
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@ -1225,6 +1225,7 @@ config ARCH_STM32MP
select DM_SERIAL
select OF_CONTROL
select OF_LIBFDT
select MISC
select PINCTRL
select REGMAP
select SUPPORT_SPL

1
configs/stm32mp15_basic_defconfig
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@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y

9
drivers/misc/Kconfig
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@ -158,6 +158,15 @@ config PCA9551_I2C_ADDR
help
The I2C address of the PCA9551 LED controller.
config STM32MP_FUSE
bool "Enable STM32MP fuse wrapper providing the fuse API"
depends on ARCH_STM32MP && MISC
default y if CMD_FUSE
help
If you say Y here, you will get support for the fuse API (OTP)
for STM32MP architecture.
This API is needed for CMD_FUSE.
config STM32_RCC
bool "Enable RCC driver for the STM32 SoC's family"
depends on STM32 && MISC

1
drivers/misc/Makefile
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@ -51,5 +51,6 @@ obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
obj-$(CONFIG_QFW) += qfw.o
obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o
obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o

116
drivers/misc/stm32mp_fuse.c Normal file
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@ -0,0 +1,116 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
#include <common.h>
#include <command.h>
#include <misc.h>
#include <errno.h>
#include <dm/device.h>
#include <dm/uclass.h>
#define STM32MP_OTP_BANK 0
/*
* The 'fuse' command API
*/
int fuse_read(u32 bank, u32 word, u32 *val)
{
int ret = 0;
struct udevice *dev;
switch (bank) {
case STM32MP_OTP_BANK:
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_read(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET,
val, 4);
break;
default:
printf("stm32mp %s: wrong value for bank %i\n", __func__, bank);
ret = -EINVAL;
break;
}
return ret;
}
int fuse_prog(u32 bank, u32 word, u32 val)
{
struct udevice *dev;
int ret;
switch (bank) {
case STM32MP_OTP_BANK:
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_write(dev, word * 4 + STM32_BSEC_OTP_OFFSET,
&val, 4);
break;
default:
printf("stm32mp %s: wrong value for bank %i\n", __func__, bank);
ret = -EINVAL;
break;
}
return ret;
}
int fuse_sense(u32 bank, u32 word, u32 *val)
{
struct udevice *dev;
int ret;
switch (bank) {
case STM32MP_OTP_BANK:
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_read(dev, word * 4 + STM32_BSEC_OTP_OFFSET, val, 4);
break;
default:
printf("stm32mp %s: wrong value for bank %i\n", __func__, bank);
ret = -EINVAL;
break;
}
return ret;
}
int fuse_override(u32 bank, u32 word, u32 val)
{
struct udevice *dev;
int ret;
switch (bank) {
case STM32MP_OTP_BANK:
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_write(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET,
&val, 4);
break;
default:
printf("stm32mp %s: wrong value for bank %i\n",
__func__, bank);
ret = -EINVAL;
break;
}
return ret;
}