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Merge branch '2019-10-27-mtd-cleanup'

Browse Source 
- Merge the series to clean up our MTD Kconfig and Makefile logic
This commit is contained in:
Tom Rini 2019-12-04 17:13:35 -05:00
commit c1c6e4a9da
914 changed files with 1760 additions and 657 deletions
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5
Makefile
View File

@ -731,11 +731,6 @@ libs-y += drivers/
libs-y += drivers/dma/
libs-y += drivers/gpio/
libs-y += drivers/i2c/
libs-y += drivers/mtd/
libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/raw/
libs-y += drivers/mtd/onenand/
libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
libs-y += drivers/mtd/spi/
libs-y += drivers/net/
libs-y += drivers/net/phy/
libs-y += drivers/power/ \

4
arch/arm/Kconfig
View File

@ -974,7 +974,7 @@ config ARCH_SUNXI
select SPL_USE_TINY_PRINTF
imply CMD_DM
imply CMD_GPT
imply CMD_UBI if NAND
imply CMD_UBI if MTD_RAW_NAND
imply DISTRO_DEFAULTS
imply FAT_WRITE
imply FIT
@ -1004,7 +1004,7 @@ config ARCH_VF610
select CPU_V7A
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
imply NAND
imply MTD_RAW_NAND
config ARCH_ZYNQ
bool "Xilinx Zynq based platform"

2
arch/arm/mach-imx/Kconfig
View File

@ -80,7 +80,7 @@ config CMD_HDMIDETECT
config CMD_NANDBCB
bool "i.MX6 NAND Boot Control Block(BCB) command"
depends on NAND && CMD_MTDPARTS
depends on MTD_RAW_NAND && CMD_MTDPARTS
select BCH if MX6UL || MX6ULL
default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS)
help

2
arch/arm/mach-imx/cmd_nandbcb.c
View File

@ -24,6 +24,8 @@
#include <linux/mtd/mtd.h>
#include <nand.h>
#include "../../../cmd/legacy-mtd-utils.h"
#define BF_VAL(v, bf) (((v) & bf##_MASK) >> bf##_OFFSET)
#define GETBIT(v, n) (((v) >> (n)) & 0x1)

6
arch/arm/mach-omap2/mem-common.c
View File

@ -25,7 +25,7 @@ const struct gpmc *gpmc_cfg = (struct gpmc *)GPMC_BASE;
#if defined(CONFIG_NOR)
char gpmc_cs0_flash = MTD_DEV_TYPE_NOR;
#elif defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
#elif defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
char gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
#elif defined(CONFIG_CMD_ONENAND)
char gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND;
@ -93,7 +93,7 @@ void set_gpmc_cs0(int flash_type)
STNOR_GPMC_CONFIG7
};
#endif
#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
const u32 gpmc_regs_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG1,
M_NAND_GPMC_CONFIG2,
@ -128,7 +128,7 @@ void set_gpmc_cs0(int flash_type)
GPMC_SIZE_16M)));
break;
#endif
#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
case MTD_DEV_TYPE_NAND:
gpmc_regs = gpmc_regs_nand;
base = CONFIG_SYS_NAND_BASE;

2
board/BuR/brppt1/board.c
View File

@ -150,7 +150,7 @@ int board_init(void)
hw_watchdog_init();
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
gpmc_init();
#endif
return 0;

6
board/BuR/brppt1/mux.c
View File

@ -118,7 +118,7 @@ static struct module_pin_mux mii2_pin_mux[] = {
{OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */
{-1},
};
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -180,7 +180,7 @@ static struct module_pin_mux gpIOs[] = {
{OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) },
/* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) },
#ifndef CONFIG_NAND
#ifndef CONFIG_MTD_RAW_NAND
/* GPIO2_3 - NAND_OE */
{OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
/* GPIO2_4 - NAND_WEN */
@ -241,7 +241,7 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mii2_pin_mux);
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_MMC)
configure_module_pin_mux(mmc1_pin_mux);

2
board/birdland/bav335x/board.c
View File

@ -292,7 +292,7 @@ int board_init(void)
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
return 0;

2
board/bosch/guardian/board.c
View File

@ -180,7 +180,7 @@ int board_init(void)
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
gpmc_init();
#endif
return 0;

4
board/bosch/guardian/mux.c
View File

@ -39,7 +39,7 @@ static struct module_pin_mux guardian_interfaces_pin_mux[] = {
{-1},
};
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)},
@ -82,7 +82,7 @@ void enable_i2c0_pin_mux(void)
void enable_board_pin_mux(void)
{
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
configure_module_pin_mux(guardian_interfaces_pin_mux);

2
board/bosch/shc/board.c
View File

@ -444,7 +444,7 @@ int board_init(void)
puts("EEPROM Content Invalid.\n");
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
shc_request_gpio();

2
board/freescale/ls2080aqds/ls2080aqds.c
View File

@ -221,7 +221,7 @@ int board_init(void)
else
config_board_mux(MUX_TYPE_SDHC);
#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_FSL_QSPI)
val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))

2
board/freescale/t102xrdb/t102xrdb.c
View File

@ -76,7 +76,7 @@ int checkboard(void)
printf("NOR vBank%d\n", reg);
}
#elif defined(CONFIG_TARGET_T1023RDB)
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
puts("NAND\n");
#else
printf("NOR vBank%d\n", t1023rdb_ctrl(I2C_GET_BANK));

2
board/imgtec/ci20/ci20.c
View File

@ -42,7 +42,7 @@ static void ci20_mux_eth(void)
{
void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
/* setup pins (some already setup for NAND) */
writel(0x04030000, gpio_regs + GPIO_PXINTC(0));
writel(0x04030000, gpio_regs + GPIO_PXMASKC(0));

4
board/phytec/pcm051/mux.c
View File

@ -82,7 +82,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
{-1},
};
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -118,7 +118,7 @@ void enable_board_pin_mux()
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux);
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifdef CONFIG_SPI

4
board/phytec/phycore_am335x_r2/mux.c
View File

@ -72,7 +72,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
{-1},
};
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -108,7 +108,7 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux);
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifdef CONFIG_SPI

4
board/siemens/pxm2/mux.c
View File

@ -26,7 +26,7 @@ static struct module_pin_mux uart0_pin_mux[] = {
{-1},
};
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -169,7 +169,7 @@ void enable_board_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
configure_module_pin_mux(i2c1_pin_mux);
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifndef CONFIG_NO_ETH

2
board/sunxi/README.nand
View File

@ -21,7 +21,7 @@ In order to accomodate that, we create a tool that will generate an
SPL image that is ready to be programmed directly embedding the ECCs,
randomized, and with the necessary bits needed to reduce the number of
bitflips. The U-Boot build system, when configured for the NAND (with
CONFIG_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
CONFIG_MTD_RAW_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
that will have been generated by that tool.
In order to flash your U-Boot image onto a board, assuming that the

2
board/ti/am335x/board.c
View File

@ -710,7 +710,7 @@ int board_init(void)
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif

8
board/ti/am335x/mux.c
View File

@ -195,7 +195,7 @@ static struct module_pin_mux rmii1_pin_mux[] = {
{-1},
};
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
@ -360,7 +360,7 @@ void enable_board_pin_mux(void)
/* Beaglebone pinmux */
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND)
#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR)
configure_module_pin_mux(bone_norcape_pin_mux);
@ -376,7 +376,7 @@ void enable_board_pin_mux(void)
if (profile & ~PROFILE_2)
configure_module_pin_mux(i2c1_pin_mux);
/* Profiles 2 & 3 don't have NAND */
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
if (profile & ~(PROFILE_2 | PROFILE_3))
configure_module_pin_mux(nand_pin_mux);
#endif
@ -404,7 +404,7 @@ void enable_board_pin_mux(void)
}
/* Beaglebone LT pinmux */
configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT)
#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(bone_norcape_pin_mux);

8
board/ti/am43xx/mux.c
View File

@ -73,7 +73,7 @@ static struct module_pin_mux gpio5_7_pin_mux[] = {
{-1},
};
#ifdef CONFIG_NAND
#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
@ -128,18 +128,18 @@ void enable_board_pin_mux(void)
if (board_is_evm()) {
configure_module_pin_mux(gpio5_7_pin_mux);
configure_module_pin_mux(rgmii1_pin_mux);
#if defined(CONFIG_NAND)
#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#endif
} else if (board_is_sk() || board_is_idk()) {
configure_module_pin_mux(rgmii1_pin_mux);
#if defined(CONFIG_NAND)
#if defined(CONFIG_MTD_RAW_NAND)
printf("Error: NAND flash not present on this board\n");
#endif
configure_module_pin_mux(qspi_pin_mux);
} else if (board_is_eposevm()) {
configure_module_pin_mux(rmii1_pin_mux);
#if defined(CONFIG_NAND)
#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#else
configure_module_pin_mux(qspi_pin_mux);

2
board/ti/dra7xx/evm.c
View File

@ -784,7 +784,7 @@ void set_muxconf_regs(void)
early_padconf, ARRAY_SIZE(early_padconf));
}
#if defined(CONFIG_NAND)
#if defined(CONFIG_MTD_RAW_NAND)
static int nand_sw_detect(void)
{
int rc;

2
board/ti/ti816x/evm.c
View File

@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NAND)
#if defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
return 0;

2
board/vscom/baltos/board.c
View File

@ -265,7 +265,7 @@ int board_init(void)
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
return 0;

2
board/vscom/baltos/mux.c
View File

@ -112,7 +112,7 @@ void enable_board_pin_mux()
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND)
#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#endif
}

34
cmd/Kconfig
View File

@ -850,6 +850,7 @@ config CMD_FDC
config CMD_FLASH
bool "flinfo, erase, protect"
default y
depends on MTD || FLASH_CFI_DRIVER || MTD_NOR_FLASH
help
NOR flash support.
flinfo - print FLASH memory information
@ -1039,6 +1040,7 @@ config CMD_MMC_SWRITE
config CMD_MTD
bool "mtd"
depends on MTD
select MTD_PARTITIONS
help
MTD commands support.
@ -1046,6 +1048,7 @@ config CMD_MTD
config CMD_NAND
bool "nand"
default y if NAND_SUNXI
depends on MTD_RAW_NAND
help
NAND support.
@ -1077,6 +1080,7 @@ config CMD_NVME
config CMD_ONENAND
bool "onenand - access to onenand device"
depends on MTD
help
OneNAND is a brand of NAND ('Not AND' gate) flash which provides
various useful features. This command allows reading, writing,
@ -1954,7 +1958,7 @@ config CMD_JFFS2
config CMD_MTDPARTS
bool "MTD partition support"
select MTD_DEVICE if (CMD_NAND || NAND)
depends on MTD
help
MTD partitioning tool support.
It is strongly encouraged to avoid using this command
@ -1962,20 +1966,6 @@ config CMD_MTDPARTS
declare the partitions in the mtdparts environment variable
but better use the MTD stack and the 'mtd' command instead.
config MTDIDS_DEFAULT
string "Default MTD IDs"
depends on MTD_PARTITIONS || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
help
Defines a default MTD IDs list for use with MTD partitions in the
Linux MTD command line partitions format.
config MTDPARTS_DEFAULT
string "Default MTD partition scheme"
depends on MTD_PARTITIONS || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
help
Defines a default MTD partitioning scheme in the Linux MTD command
line partitions format
config CMD_MTDPARTS_SPREAD
bool "Padd partition size to take account of bad blocks"
depends on CMD_MTDPARTS
@ -1994,6 +1984,20 @@ config CMD_MTDPARTS_SHOW_NET_SIZES
effective usable size of a partition, if bad blocks are taken
into account.
config MTDIDS_DEFAULT
string "Default MTD IDs"
depends on MTD || SPI_FLASH
help
Defines a default MTD IDs list for use with MTD partitions in the
Linux MTD command line partitions format.
config MTDPARTS_DEFAULT
string "Default MTD partition scheme"
depends on MTD || SPI_FLASH
help
Defines a default MTD partitioning scheme in the Linux MTD command
line partitions format
config CMD_REISER
bool "reiser - Access to reiserfs filesystems"
help

3
cmd/Makefile
View File

@ -97,6 +97,9 @@ obj-$(CONFIG_CMD_MMC) += mmc.o
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_CMD_MTD) += mtd.o
obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
ifneq ($(CONFIG_CMD_NAND)$(CONFIG_CMD_SF),)
obj-y += legacy-mtd-utils.o
endif
obj-$(CONFIG_CMD_NAND) += nand.o
obj-$(CONFIG_CMD_NET) += net.o
obj-$(CONFIG_CMD_NVEDIT_EFI) += nvedit_efi.o

99
cmd/legacy-mtd-utils.c Normal file
View File

@ -0,0 +1,99 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
#include <jffs2/jffs2.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/string.h>
#include <mtd.h>
static int get_part(const char *partname, int *idx, loff_t *off, loff_t *size,
loff_t *maxsize, int devtype)
{
#ifdef CONFIG_CMD_MTDPARTS
struct mtd_device *dev;
struct part_info *part;
u8 pnum;
int ret;
ret = mtdparts_init();
if (ret)
return ret;
ret = find_dev_and_part(partname, &dev, &pnum, &part);
if (ret)
return ret;
if (dev->id->type != devtype) {
printf("not same typ %d != %d\n", dev->id->type, devtype);
return -1;
}
*off = part->offset;
*size = part->size;
*maxsize = part->size;
*idx = dev->id->num;
return 0;
#else
puts("mtdparts support missing.\n");
return -1;
#endif
}
int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size,
loff_t *maxsize, int devtype, uint64_t chipsize)
{
if (!str2off(arg, off))
return get_part(arg, idx, off, size, maxsize, devtype);
if (*off >= chipsize) {
puts("Offset exceeds device limit\n");
return -1;
}
*maxsize = chipsize - *off;
*size = *maxsize;
return 0;
}
int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,
loff_t *size, loff_t *maxsize, int devtype,
uint64_t chipsize)
{
int ret;
if (argc == 0) {
*off = 0;
*size = chipsize;
*maxsize = *size;
goto print;
}
ret = mtd_arg_off(argv[0], idx, off, size, maxsize, devtype,
chipsize);
if (ret)
return ret;
if (argc == 1)
goto print;
if (!str2off(argv[1], size)) {
printf("'%s' is not a number\n", argv[1]);
return -1;
}
if (*size > *maxsize) {
puts("Size exceeds partition or device limit\n");
return -1;
}
print:
printf("device %d ", *idx);
if (*size == chipsize)
puts("whole chip\n");
else
printf("offset 0x%llx, size 0x%llx\n",
(unsigned long long)*off, (unsigned long long)*size);
return 0;
}

12
cmd/legacy-mtd-utils.h Normal file
View File

@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#ifndef __LEGACY_MTD_UTILS_H
#define __LEGACY_MTD_UTILS_H
int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size,
loff_t *maxsize, int devtype, uint64_t chipsize);
int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,
loff_t *size, loff_t *maxsize, int devtype,
uint64_t chipsize);
#endif /* LEGACY_MTD_UTILS_H */

2
cmd/nand.c
View File

@ -30,6 +30,8 @@
#include <jffs2/jffs2.h>
#include <nand.h>
#include "legacy-mtd-utils.h"
#if defined(CONFIG_CMD_MTDPARTS)
/* partition handling routines */

2
cmd/sf.c
View File

@ -18,6 +18,8 @@
#include <asm/io.h>
#include <dm/device-internal.h>
#include "legacy-mtd-utils.h"
static struct spi_flash *flash;
/*

4
common/Kconfig
View File

@ -303,7 +303,7 @@ config NOR_BOOT
config NAND_BOOT
bool "Support for booting from NAND flash"
default n
imply NAND
imply MTD_RAW_NAND
help
Enabling this will make a U-Boot binary that is capable of being
booted via NAND flash. This is not a must, some SoCs need this,
@ -312,7 +312,7 @@ config NAND_BOOT
config ONENAND_BOOT
bool "Support for booting from ONENAND"
default n
imply NAND
imply MTD_RAW_NAND
help
Enabling this will make a U-Boot binary that is capable of being
booted via ONENAND. This is not a must, some SoCs need this,

2
configs/10m50_defconfig
View File

@ -27,8 +27,8 @@ CONFIG_ALTERA_PIO=y
CONFIG_MISC=y
CONFIG_ALTERA_SYSID=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
CONFIG_ALTERA_QSPI=y
CONFIG_PHY_MARVELL=y
CONFIG_DM_ETH=y

2
configs/3c120_defconfig
View File

@ -26,7 +26,7 @@ CONFIG_DM_GPIO=y
CONFIG_ALTERA_PIO=y
CONFIG_MISC=y
CONFIG_ALTERA_SYSID=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_CFI_FLASH=y

3
configs/B4420QDS_NAND_defconfig
View File

@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -63,3 +63,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/B4420QDS_SPIFLASH_defconfig
View File

@ -49,3 +49,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/B4420QDS_defconfig
View File

@ -47,3 +47,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

3
configs/B4860QDS_NAND_defconfig
View File

@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -63,3 +63,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/B4860QDS_SECURE_BOOT_defconfig
View File

@ -50,3 +50,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/B4860QDS_SPIFLASH_defconfig
View File

@ -29,6 +29,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

1
configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
View File

@ -43,3 +43,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/B4860QDS_defconfig
View File

@ -47,3 +47,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

4
configs/BSC9131RDB_NAND_SYSCLK100_defconfig
View File

@ -37,7 +37,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -53,3 +53,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

4
configs/BSC9131RDB_NAND_defconfig
View File

@ -36,7 +36,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -52,3 +52,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

1
configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
View File

@ -45,3 +45,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9131RDB_SPIFLASH_defconfig
View File

@ -45,3 +45,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
View File

@ -55,3 +55,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

4
configs/BSC9132QDS_NAND_DDRCLK100_defconfig
View File

@ -44,7 +44,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -61,3 +61,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

1
configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
View File

@ -55,3 +55,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

4
configs/BSC9132QDS_NAND_DDRCLK133_defconfig
View File

@ -44,7 +44,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -61,3 +61,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

1
configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
View File

@ -54,3 +54,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_NOR_DDRCLK100_defconfig
View File

@ -52,3 +52,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
View File

@ -54,3 +54,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_NOR_DDRCLK133_defconfig
View File

@ -52,3 +52,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
View File

@ -55,3 +55,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
View File

@ -52,3 +52,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
View File

@ -55,3 +55,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
View File

@ -52,3 +52,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
View File

@ -55,3 +55,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
View File

@ -53,3 +53,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
View File

@ -55,3 +55,4 @@ CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

1
configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
View File

@ -53,3 +53,4 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_MTD=y

3
configs/C29XPCIE_NAND_defconfig
View File

@ -44,7 +44,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -59,3 +59,4 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/C29XPCIE_NOR_SECBOOT_defconfig
View File

@ -44,3 +44,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
View File

@ -46,3 +46,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/C29XPCIE_SPIFLASH_defconfig
View File

@ -44,3 +44,4 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/C29XPCIE_defconfig
View File

@ -42,3 +42,4 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

6
configs/CHIP_pro_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_USE_PREBOOT=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=sunxi-nand.0:256k(spl),256k(spl-backup),2m(uboot),2m(uboot-backup),-(UBI)"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro"
@ -17,7 +18,8 @@ CONFIG_ENV_UBI_PART="UBI"
CONFIG_ENV_UBI_VOLUME="uboot-env"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_UBI=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0x100
@ -29,3 +31,5 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/M5329AFEE_defconfig
View File

@ -25,3 +25,5 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_MII=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/M5329BFEE_defconfig
View File

@ -25,3 +25,5 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_MII=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/M5373EVB_defconfig
View File

@ -25,3 +25,5 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_MII=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

1
configs/M54418TWR_nand_mii_defconfig
View File

@ -22,6 +22,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_mii"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MTD=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y

1
configs/M54418TWR_nand_rmii_defconfig
View File

@ -21,6 +21,7 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii"
CONFIG_MTD=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y

1
configs/M54418TWR_nand_rmii_lowfreq_defconfig
View File

@ -22,6 +22,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii_lowfreq"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MTD=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y

2
configs/MCR3000_defconfig
View File

@ -82,3 +82,5 @@ CONFIG_DM_SERIAL=y
CONFIG_WDT=y
CONFIG_SHA256=y
CONFIG_LZMA=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8313ERDB_33_defconfig
View File

@ -156,3 +156,5 @@ CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8313ERDB_66_defconfig
View File

@ -155,3 +155,5 @@ CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

4
configs/MPC8313ERDB_NAND_33_defconfig
View File

@ -161,8 +161,10 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

4
configs/MPC8313ERDB_NAND_66_defconfig
View File

@ -160,8 +160,10 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8315ERDB_defconfig
View File

@ -144,3 +144,5 @@ CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC837XEMDS_HOST_defconfig
View File

@ -177,3 +177,5 @@ CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC837XEMDS_SLAVE_defconfig
View File

@ -130,3 +130,5 @@ CONFIG_TSEC_ENET=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC837XEMDS_defconfig
View File

@ -153,3 +153,5 @@ CONFIG_TSEC_ENET=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8536DS_36BIT_defconfig
View File

@ -49,3 +49,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8536DS_SDCARD_defconfig
View File

@ -48,3 +48,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8536DS_SPIFLASH_defconfig
View File

@ -49,3 +49,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8536DS_defconfig
View File

@ -48,3 +48,5 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8569MDS_ATM_defconfig
View File

@ -35,3 +35,5 @@ CONFIG_QE=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8569MDS_defconfig
View File

@ -34,3 +34,5 @@ CONFIG_QE=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8572DS_36BIT_defconfig
View File

@ -42,3 +42,5 @@ CONFIG_USB_EHCI_PCI=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

2
configs/MPC8572DS_defconfig
View File

@ -41,3 +41,5 @@ CONFIG_USB_EHCI_PCI=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

4
configs/Nintendo_NES_Classic_Edition_defconfig
View File

@ -17,7 +17,7 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
@ -27,3 +27,5 @@ CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

1
configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
View File

@ -52,3 +52,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

4
configs/P1010RDB-PA_36BIT_NAND_defconfig
View File

@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
@ -68,3 +68,5 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y

1
configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
View File

@ -51,3 +51,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/P1010RDB-PA_36BIT_NOR_defconfig
View File

@ -30,6 +30,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

1
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
View File

@ -62,3 +62,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
View File

@ -53,3 +53,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
View File

@ -64,3 +64,4 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

1
configs/P1010RDB-PA_NAND_SECBOOT_defconfig
View File

@ -51,3 +51,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_OF_LIBFDT=y
CONFIG_MTD=y

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