Change the sequence of events in soft_i2c.c:send_ack() to keep from
incorrectly generating start/stop conditions on the bus. Patch by Andrew Dyer, 26 Jul 2005
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@ -2,6 +2,10 @@
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Changes since U-Boot 1.1.4:
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Changes since U-Boot 1.1.4:
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======================================================================
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======================================================================
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* Change the sequence of events in soft_i2c.c:send_ack() to keep from
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incorrectly generating start/stop conditions on the bus.
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Patch by Andrew Dyer, 26 Jul 2005
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* Fix bug in [id]cache_status commands for MPC85xx processors;
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* Fix bug in [id]cache_status commands for MPC85xx processors;
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should look at LSB of L1CSRn registers to determine if L1 cache is
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should look at LSB of L1CSRn registers to determine if L1 cache is
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enabled, not the MSB.
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enabled, not the MSB.
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@ -164,13 +164,10 @@ static void send_ack(int ack)
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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#endif
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#endif
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I2C_ACTIVE;
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I2C_SCL(0);
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I2C_SCL(0);
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I2C_DELAY;
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I2C_DELAY;
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I2C_SDA(ack);
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I2C_ACTIVE;
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I2C_ACTIVE;
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I2C_SDA(ack);
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I2C_DELAY;
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I2C_DELAY;
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I2C_SCL(1);
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I2C_SCL(1);
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I2C_DELAY;
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I2C_DELAY;
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