From 8e71a7ebdc02f8a5812b608b3014a4839ebd2aed Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Sat, 27 Aug 2016 22:16:12 +0800 Subject: [PATCH 01/10] sunxi: add proper device tree for iNet D978 rev2 boards Add a proper dts for the iNet D978 rev2 based A33 tablets. Signed-off-by: Icenowy Zheng Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-a33-inet-d978-rev2.dts | 88 +++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 arch/arm/dts/sun8i-a33-inet-d978-rev2.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 756535b75e..d2b711ba95 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -244,6 +244,7 @@ dtb-$(CONFIG_MACH_SUN8I_A23) += \ sun8i-a23-q8-tablet.dtb dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-a33-ga10h-v1.1.dtb \ + sun8i-a33-inet-d978-rev2.dtb \ sun8i-a33-q8-tablet.dtb \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-r16-parrot.dtb diff --git a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts new file mode 100644 index 0000000000..0f52cd9dfa --- /dev/null +++ b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts @@ -0,0 +1,88 @@ +/* + * Copyright 2015 Hans de Goede + * Copyright 2016 Icenowy Zheng + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" +#include "sun8i-reference-design-tablet.dtsi" + +/ { + model = "INet-D978 Rev 02"; + compatible = "primux,inet-d978-rev2", "allwinner,sun8i-a33"; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_d978>; + + home { + label = "d978:blue:home"; + gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ + }; + }; +}; + +&mmc1_pins_a { + allwinner,pull = ; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_dldo1>; + bus-width = <4>; + non-removable; + status = "okay"; + + rtl8723bs: sdio_wifi@1 { + reg = <1>; + }; +}; + +&r_pio { + led_pin_d978: led_pin_d978@0 { + allwinner,pins = "PL5"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; From 6d973ad9d2329ec43334304ecd2cb044e173d4c4 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Sat, 27 Aug 2016 22:16:13 +0800 Subject: [PATCH 02/10] sunxi: Add iNet D978 rev2 defconfig The iNet D978 rev2 is a tablet board designed by iNet, which is intended to use on 10" tablets with a appearance like Apple iPad. It has A33 SoC, 1GB RAM, 8GB/16GB NAND, SDIO Wi-Fi, a MicroUSB port and a MicroSD slot. Signed-off-by: Icenowy Zheng Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 5 +++++ configs/iNet_D978_rev2_defconfig | 26 ++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) create mode 100644 configs/iNet_D978_rev2_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 7072bd8525..cf4d4fb5b7 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -156,6 +156,11 @@ M: Michal Suchanek S: Maintained F: configs/iNet_86VS_defconfig +INET D978 BOARD +M: Icenowy Zheng +S: Maintained +F: configs/iNet_D978_rev2_defconfig + LAMOBO-R1 BOARD M: Jelle de Jong S: Maintained diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig new file mode 100644 index 0000000000..d87a61ce93 --- /dev/null +++ b/configs/iNet_D978_rev2_defconfig @@ -0,0 +1,26 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_A33=y +CONFIG_DRAM_CLK=456 +CONFIG_DRAM_ZQ=15291 +CONFIG_MMC0_CD_PIN="PB4" +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_USB0_ID_DET="PH8" +CONFIG_AXP_GPIO=y +CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:65000,le:120,ri:180,up:22,lo:13,hs:20,vs:3,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_POWER="PH7" +CONFIG_VIDEO_LCD_BL_EN="PH6" +CONFIG_VIDEO_LCD_BL_PWM="PH0" +CONFIG_VIDEO_LCD_PANEL_LVDS=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +CONFIG_AXP_DLDO1_VOLT=3300 +CONFIG_USB_MUSB_HOST=y From ca5c37026be4ce984537569d7159f488a836afc8 Mon Sep 17 00:00:00 2001 From: Stefan Mavrodiev Date: Fri, 2 Sep 2016 15:21:37 +0300 Subject: [PATCH 03/10] sunxi: Add support for A33-OLinuXino board A33-OLinuXino is A33 development board designed by Olimex LTD. It has AXP223 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector, headphone and mic jacks, connector for LiPo battery and optional 4GB NAND Flash. It has two 40-pin headers. One for LCD panel, and one for additional modules. Also there is CSI/DSI connector. The dts files are identical to the ones submitted to the upstream kernel. Signed-off-by: Stefan Mavrodiev Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-a33-olinuxino.dts | 226 +++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 + configs/A33-OLinuXino_defconfig | 43 +++++ 4 files changed, 275 insertions(+) create mode 100644 arch/arm/dts/sun8i-a33-olinuxino.dts create mode 100644 configs/A33-OLinuXino_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d2b711ba95..31c4d8fd13 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -245,6 +245,7 @@ dtb-$(CONFIG_MACH_SUN8I_A23) += \ dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-a33-ga10h-v1.1.dtb \ sun8i-a33-inet-d978-rev2.dtb \ + sun8i-a33-olinuxino.dtb \ sun8i-a33-q8-tablet.dtb \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-r16-parrot.dtb diff --git a/arch/arm/dts/sun8i-a33-olinuxino.dts b/arch/arm/dts/sun8i-a33-olinuxino.dts new file mode 100644 index 0000000000..9ea637e82b --- /dev/null +++ b/arch/arm/dts/sun8i-a33-olinuxino.dts @@ -0,0 +1,226 @@ +/* + * Copyright 2016 - Stefan Mavrodiev + * Olimex LTD. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include + +/ { + model = "Olimex A33-OLinuXino"; + compatible = "olimex,a33-olinuxino","allwinner,sun8i-a33"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_olinuxino>; + + green { + label = "a33-olinuxino:green:usr"; + gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>; + vmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&pio { + led_pin_olinuxino: led_pins@0 { + allwinner,pins = "PB7"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PB3"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <®_dcdc1>; + x-powers,drive-vbus-en; + }; +}; + +#include "axp22x.dtsi" + +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-io"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-avcc"; +}; + +®_dc1sw { + regulator-name = "vcc-lcd"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + +®_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <®_dc1sw>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_b>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_drivevbus>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index cf4d4fb5b7..576a4e18d0 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -88,6 +88,11 @@ M: Iain Paton S: Maintained F: configs/A20-OLinuXino-Lime2_defconfig +A33-OLINUXINO BOARD +M: Stefan Mavrodiev +S: Maintained +F: configs/A33-OLinuXino_defconfig + AINOL AW1 BOARD M: Paul Kocialkowski S: Maintained diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig new file mode 100644 index 0000000000..a175a40bad --- /dev/null +++ b/configs/A33-OLinuXino_defconfig @@ -0,0 +1,43 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_A33=y + +CONFIG_DRAM_CLK=432 +CONFIG_DRAM_ZQ=15291 +CONFIG_DRAM_ODT_EN=y + +CONFIG_MMC0_CD_PIN="PB4" +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_AXP_GPIO=y +CONFIG_USB0_ID_DET="PB3" +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y + +CONFIG_VIDEO=y +# CONFIG_VIDEO_VGA_VIA_LCD is not set +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_POWER="" +CONFIG_VIDEO_LCD_RESET="" +CONFIG_VIDEO_LCD_BL_EN="PB2" +CONFIG_VIDEO_LCD_BL_PWM="PH0" +CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW=y + +CONFIG_AXP_DCDC1_VOLT=3300 From 68871efe1daede5771b0b97de889e81eb969faa8 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 2 Sep 2016 16:29:05 +0800 Subject: [PATCH 04/10] sunxi: Fix H3 EMAC syscon register address The sun8i-emac driver follows an old version of the proposed DT bindings, where the EMAC clock and EPHY control register range is listed directly, rather than through a syscon phandle. Add back the syscon register range to avoid an invalid data access. We should fix the driver once the Linux kernel bindings have been finalized. Signed-off-by: Chen-Yu Tsai Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/dts/sun8i-h3.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index 6babaf3717..afa60793a2 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -466,9 +466,8 @@ emac: ethernet@1c30000 { compatible = "allwinner,sun8i-h3-emac"; - syscon = <&syscon>; - reg = <0x01c30000 0x104>; - reg-names = "emac"; + reg = <0x01c30000 0x104>, <0x01c00030 0x4>; + reg-names = "emac", "syscon"; interrupts = ; resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>; reset-names = "ahb", "ephy"; From 019731a88f40d45bd15505402772e00d85689dd6 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 3 Sep 2016 10:21:35 +0200 Subject: [PATCH 05/10] sunxi: Sync h3-orangepi dts files with kernel This adds an emac node to the orangepi-2 dts (not yet merged upstream, but in u-boot we already have emac support); fixes the alphetically sorting of nodes in sun8i-h3-orangepi-plus.dts and disables some usb controllers in sun8i-h3-orangepi-plus.dts which are only used on the plus2e, as upstream has decided to do a separate dts files for the plus2e. Signed-off-by: Hans de Goede --- arch/arm/dts/sun8i-h3-orangepi-2.dts | 11 ++++ arch/arm/dts/sun8i-h3-orangepi-pc.dts | 1 + arch/arm/dts/sun8i-h3-orangepi-plus.dts | 72 +++++++++---------------- 3 files changed, 37 insertions(+), 47 deletions(-) diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts index f89fe00dde..caa1a6959c 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-2.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts @@ -109,6 +109,17 @@ status = "okay"; }; +&emac { + phy = <&phy1>; + phy-mode = "mii"; + allwinner,use-internal-phy; + allwinner,leds-active-low; + status = "okay"; + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &ir { pinctrl-names = "default"; pinctrl-0 = <&ir_pins_a>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts index 24f8e974c4..b8340f74e7 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts @@ -169,6 +169,7 @@ &emac { phy = <&phy1>; phy-mode = "mii"; + allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; phy1: ethernet-phy@1 { diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts index 4f4bb0f3c0..e7079b26bc 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts @@ -44,21 +44,9 @@ #include "sun8i-h3-orangepi-2.dts" / { - model = "Xunlong Orange Pi Plus / Plus 2 / Plus 2E"; + model = "Xunlong Orange Pi Plus / Plus 2"; compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; - reg_usb3_vbus: usb3-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&usb3_vbus_pin_a>; - regulator-name = "usb3-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - enable-active-high; - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; - }; - reg_gmac_3v3: gmac-3v3 { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -70,16 +58,33 @@ enable-active-high; gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; }; -}; -&ehci2 { - status = "okay"; + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_vbus_pin_a>; + regulator-name = "usb3-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + enable-active-high; + gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; + }; }; &ehci3 { status = "okay"; }; +&emac { + /* The Orange Pi Plus uses an external phy */ + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-mode = "rgmii"; + /delete-property/allwinner,use-internal-phy; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; @@ -97,28 +102,16 @@ allwinner,pull = ; }; -&ohci1 { - status = "okay"; -}; - -&ohci2 { - status = "okay"; -}; - -&ohci3 { - status = "okay"; -}; - &pio { - usb3_vbus_pin_a: usb3_vbus_pin@0 { - allwinner,pins = "PG11"; + gmac_power_pin_orangepi: gmac_power_pin@0 { + allwinner,pins = "PD6"; allwinner,function = "gpio_out"; allwinner,drive = ; allwinner,pull = ; }; - gmac_power_pin_orangepi: gmac_power_pin@0 { - allwinner,pins = "PD6"; + usb3_vbus_pin_a: usb3_vbus_pin@0 { + allwinner,pins = "PG11"; allwinner,function = "gpio_out"; allwinner,drive = ; allwinner,pull = ; @@ -128,18 +121,3 @@ &usbphy { usb3_vbus-supply = <®_usb3_vbus>; }; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy = <&phy1>; - phy-mode = "rgmii"; - - allwinner,leds-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <0>; - }; -}; From 1c145c39dcf8a2a885e7a6bfd8fd5a5f95fc630a Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 3 Sep 2016 10:29:58 +0200 Subject: [PATCH 06/10] sunxi: Enable emac on H3 orangepi boards The Orange Pi 2 and Orange Pi Plus also come with ethernet, enable support for this. Signed-off-by: Hans de Goede --- configs/orangepi_2_defconfig | 1 + configs/orangepi_plus_defconfig | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index 8b1082cd3e..e2f6a83d24 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -15,3 +15,4 @@ CONFIG_SPL=y # CONFIG_CMD_FPGA is not set CONFIG_SY8106A_POWER=y CONFIG_USB_EHCI_HCD=y +CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index 9ff433286f..5bb3bba89b 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -11,9 +11,10 @@ CONFIG_USB1_VBUS_PIN="PG13" CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPG(11)" +CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPG(11),MACPWR=SUNXI_GPD(6)" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_SY8106A_POWER=y CONFIG_USB_EHCI_HCD=y +CONFIG_SUN8I_EMAC=y From de300ea5db009d58fbafa0736d37457feaab770b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 3 Sep 2016 11:42:31 +0200 Subject: [PATCH 07/10] sunxi: Add defconfig and dts file for the Orange Pi Plus2E SBC The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus, with 2G RAM and an external gbit ethernet phy. The dts file is identical to the one submitted to the upstream kernel, except that it has the pending patch to enable the ethernet controller squashed in, as u-boot already has sun8i-emac support. Signed-off-by: Hans de Goede --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 83 +++++++++++++++++++++++ board/sunxi/MAINTAINERS | 1 + configs/orangepi_plus2e_defconfig | 19 ++++++ 4 files changed, 105 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/sun8i-h3-orangepi-plus2e.dts create mode 100644 configs/orangepi_plus2e_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 31c4d8fd13..a4ab06964e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -260,7 +260,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h3-orangepi-one.dtb \ sun8i-h3-orangepi-pc.dtb \ sun8i-h3-orangepi-pc-plus.dtb \ - sun8i-h3-orangepi-plus.dtb + sun8i-h3-orangepi-plus.dtb \ + sun8i-h3-orangepi-plus2e.dtb dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts new file mode 100644 index 0000000000..f97b040b35 --- /dev/null +++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2016 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * The Orange Pi Plus 2E is an extended version of the Orange Pi PC Plus, + * with 2G RAM and an external gbit ethernet phy. + */ + +#include "sun8i-h3-orangepi-pc-plus.dts" + +/ { + model = "Xunlong Orange Pi Plus 2E"; + compatible = "xunlong,orangepi-plus2e", "allwinner,sun8i-h3"; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac_power_pin_orangepi>; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; +}; + +&emac { + /* The Orange Pi Plus 2E uses an external gbit phy */ + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-mode = "rgmii"; + /delete-property/allwinner,use-internal-phy; +}; + +&pio { + gmac_power_pin_orangepi: gmac_power_pin@0 { + allwinner,pins = "PD6"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 576a4e18d0..6f13cf68df 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -63,6 +63,7 @@ F: configs/orangepi_one_defconfig F: configs/orangepi_pc_defconfig F: configs/orangepi_pc_plus_defconfig F: configs/orangepi_plus_defconfig +F: configs/orangepi_plus2e_defconfig F: configs/polaroid_mid2407pxe03_defconfig F: configs/polaroid_mid2809pxe04_defconfig F: configs/q8_a23_tablet_800x480_defconfig diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig new file mode 100644 index 0000000000..c900fe2f21 --- /dev/null +++ b/configs/orangepi_plus2e_defconfig @@ -0,0 +1,19 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_MMC0_CD_PIN="PF6" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +# CONFIG_VIDEO is not set +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPD(6)" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SY8106A_POWER=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SUN8I_EMAC=y From eb504fa13fbb9a40f7748cda5093d78a817051b3 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 5 Sep 2016 01:32:38 +0100 Subject: [PATCH 08/10] Revert "sunxi: Move the SPL stack top to 0x1A000 on Allwinner A64/A80" This commit moved the SPL stack into SRAM C, which worked when the SPL set the AHB1 clock down to 100 MHz to cope with the flaky SRAM C access from the CPU. However booting with boot0 (and thus not using SPL at all) we still run with a 200 MHz AHB1, so any access to SRAM C is prone to fail. Since this commit does _not_ only affect the SPL code, but also the U-Boot proper, we fail when booting with boot0. As the introduction of tiny-printf reduced the size of the SPL, we can afford to have the SPL stack in SRAM A1. This reverts commit 1a83fb4a17d959d7b037999ab7ed7e62429abe34 and fixes booting the Pine64 when using boot0. Signed-off-by: Andre Przywara Reviewed-by: Siarhei Siamashka Signed-off-by: Hans de Goede --- include/configs/sunxi-common.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index f64edd4b0f..708ab1793e 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -99,7 +99,7 @@ * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. */ #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 -#define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */ #else #define CONFIG_SYS_INIT_RAM_ADDR 0x0 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ @@ -220,7 +220,8 @@ #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) -#define LOW_LEVEL_SRAM_STACK 0x0001A000 +/* FIXME: 40 KiB instead of 32 KiB ? */ +#define LOW_LEVEL_SRAM_STACK 0x00018000 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #else /* end of 32 KiB in sram */ From fa855d3d557a33c3c59f260302a94a8e8a0051b1 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 5 Sep 2016 01:32:40 +0100 Subject: [PATCH 09/10] sunxi: Kconfig: rename non-existent SUN50I_A64 config symbol There is no "CONFIG_MACH_SUN50I_A64" in upstream U-Boot, so fix the name to prevent the option to be enabled. Signed-off-by: Andre Przywara Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 1b30669230..3ec011aa1b 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -426,7 +426,7 @@ config AXP_GPIO config VIDEO bool "Enable graphical uboot console on HDMI, LCD or VGA" - depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I_A64 + depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I default y ---help--- Say Y here to add support for using a cfb console on the HDMI, LCD From 5a74a3912970d4fa5625237f0117ca08c2878f29 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 5 Sep 2016 01:32:41 +0100 Subject: [PATCH 10/10] sunxi: fix 64-bit compiler warning for SPL header parsing Casting "int"s to pointers is only valid for 32-bit systems. Add the appropriate pointer type cast to avoid a compiler warning when compiling for AArch64. Signed-off-by: Andre Przywara Reviewed-by: Siarhei Siamashka Signed-off-by: Hans de Goede --- board/sunxi/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 209fb1cfd8..6281c9d703 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -602,7 +602,7 @@ static void parse_spl_header(const uint32_t spl_addr) * data is expected in uEnv.txt compatible format, so "env * import -t" the string(s) at fel_script_address right away. */ - himport_r(&env_htab, (char *)spl->fel_script_address, + himport_r(&env_htab, (char *)(uintptr_t)spl->fel_script_address, spl->fel_uEnv_length, '\n', H_NOCLEAR, 0, 0, NULL); return; }