usb: s3c-otg: Rename struct s3c_plat_otg_data
The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
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@@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
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#endif
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#ifdef CONFIG_USB_GADGET
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struct s3c_plat_otg_data socfpga_otg_data = {
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struct dwc2_plat_otg_data socfpga_otg_data = {
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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.usb_gusbcfg = 0x1417,
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};
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@@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
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#endif
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#ifdef CONFIG_USB_GADGET
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struct s3c_plat_otg_data socfpga_otg_data = {
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struct dwc2_plat_otg_data socfpga_otg_data = {
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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.usb_gusbcfg = 0x1417,
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};
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@@ -95,7 +95,7 @@ int board_mmc_init(bd_t *bis)
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#endif
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#ifdef CONFIG_USB_GADGET
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static struct s3c_plat_otg_data bcm_otg_data = {
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static struct dwc2_plat_otg_data bcm_otg_data = {
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.regs_otg = HSOTG_BASE_ADDR
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};
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@@ -28,7 +28,7 @@ int board_init(void)
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}
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#ifdef CONFIG_USB_GADGET
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struct s3c_plat_otg_data socfpga_otg_data = {
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struct dwc2_plat_otg_data socfpga_otg_data = {
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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.usb_gusbcfg = 0x1417,
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};
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@@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
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#endif
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#ifdef CONFIG_USB_GADGET
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struct s3c_plat_otg_data socfpga_otg_data = {
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struct dwc2_plat_otg_data socfpga_otg_data = {
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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.usb_gusbcfg = 0x1417,
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};
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@@ -183,7 +183,7 @@ static int s5pc1xx_phy_control(int on)
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return 0;
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}
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struct s3c_plat_otg_data s5pc110_otg_data = {
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struct dwc2_plat_otg_data s5pc110_otg_data = {
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.phy_control = s5pc1xx_phy_control,
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.regs_phy = S5PC110_PHY_BASE,
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.regs_otg = S5PC110_OTG_BASE,
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@@ -452,7 +452,7 @@ static int s5pc210_phy_control(int on)
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return regulator_set_mode(dev, OPMODE_LPM);
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}
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struct s3c_plat_otg_data s5pc210_otg_data = {
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struct dwc2_plat_otg_data s5pc210_otg_data = {
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.phy_control = s5pc210_phy_control,
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.regs_phy = EXYNOS4X12_USBPHY_BASE,
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.regs_otg = EXYNOS4X12_USBOTG_BASE,
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@@ -41,7 +41,7 @@ u32 get_board_rev(void)
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#endif
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static void check_hw_revision(void);
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struct s3c_plat_otg_data s5pc210_otg_data;
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struct dwc2_plat_otg_data s5pc210_otg_data;
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int exynos_init(void)
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{
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@@ -419,7 +419,7 @@ static int s5pc210_phy_control(int on)
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return 0;
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}
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struct s3c_plat_otg_data s5pc210_otg_data = {
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struct dwc2_plat_otg_data s5pc210_otg_data = {
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.phy_control = s5pc210_phy_control,
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.regs_phy = EXYNOS4_USBPHY_BASE,
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.regs_otg = EXYNOS4_USBOTG_BASE,
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@@ -303,7 +303,7 @@ static int s5pc210_phy_control(int on)
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return 0;
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}
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struct s3c_plat_otg_data s5pc210_otg_data = {
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struct dwc2_plat_otg_data s5pc210_otg_data = {
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.phy_control = s5pc210_phy_control,
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.regs_phy = EXYNOS4X12_USBPHY_BASE,
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.regs_otg = EXYNOS4X12_USBOTG_BASE,
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@@ -179,7 +179,7 @@ static int s5pc210_phy_control(int on)
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return 0;
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}
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struct s3c_plat_otg_data s5pc210_otg_data = {
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struct dwc2_plat_otg_data s5pc210_otg_data = {
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.phy_control = s5pc210_phy_control,
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.regs_phy = EXYNOS4_USBPHY_BASE,
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.regs_otg = EXYNOS4_USBOTG_BASE,
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@@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
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#endif
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#ifdef CONFIG_USB_GADGET
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struct s3c_plat_otg_data socfpga_otg_data = {
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struct dwc2_plat_otg_data socfpga_otg_data = {
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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.usb_gusbcfg = 0x1417,
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};
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