powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and should be 0x00000080 (bit 440 in the RCW). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
parent
4eaf7f525a
commit
c00d0012f5
@ -1789,7 +1789,7 @@ typedef struct ccsr_gur {
|
||||
#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII 0x20000000
|
||||
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL 0x00000080
|
||||
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH 0x00000000
|
||||
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x80000000
|
||||
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x00000080
|
||||
#define CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET 0x28
|
||||
#define PXCKEN_MASK 0x80000000
|
||||
#define PXCK_MASK 0x00FF0000
|
||||
|
Loading…
Reference in New Issue
Block a user