arm: add initial support for Amlogic Meson and ODROID-C2

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Beniamino Galvani
2016-05-08 08:30:16 +02:00
committed by Tom Rini
parent 0e1a3e30de
commit bfcef28ae4
19 changed files with 803 additions and 0 deletions

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if TARGET_ODROID_C2
config SYS_BOARD
default "odroid-c2"
config SYS_VENDOR
default "hardkernel"
config SYS_CONFIG_NAME
default "odroid-c2"
endif

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ODROID-C2
M: Beniamino Galvani <b.galvani@gmail.com>
S: Maintained
F: board/hardkernel/odroid-c2/
F: include/configs/odroid-c2.h
F: configs/odroid-c2_defconfig

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#
# (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := odroid-c2.o

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U-Boot for ODROID-C2
====================
ODROID-C2 is a single board computer manufactured by Hardkernel
Co. Ltd with the following specifications:
- Amlogic S905 ARM Cortex-A53 quad-core SoC @ 2GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- Gigabit Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 2.0 Host, 1 x USB OTG
- eMMC, microSD
- Infrared receiver
Schematics are available on the manufacturer website.
Currently the u-boot port supports the following devices:
- serial
- Ethernet
u-boot compilation
==================
> export ARCH=arm
> export CROSS_COMPILE=aarch64-none-elf-
> make odroid-c2_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> DIR=odroid-c2
> git clone --depth 1 \
https://github.com/hardkernel/u-boot.git -b odroidc2-v2015.01 \
$DIR
> $DIR/fip/fip_create --bl30 $DIR/fip/gxb/bl30.bin \
--bl301 $DIR/fip/gxb/bl301.bin \
--bl31 $DIR/fip/gxb/bl31.bin \
--bl33 u-boot.bin \
$DIR/fip.bin
> $DIR/fip/fip_create --dump $DIR/fip.bin
> cat $DIR/fip/gxb/bl2.package $DIR/fip.bin > $DIR/boot_new.bin
> $DIR/fip/gxb/aml_encrypt_gxb --bootsig \
--input $DIR/boot_new.bin \
--output $DIR/u-boot.img
> dd if=$DIR/u-boot.img of=$DIR/u-boot.gxbb bs=512 skip=96
and then write the image to SD with:
> DEV=/dev/your_sd_device
> BL1=$DIR/sd_fuse/bl1.bin.hardkernel
> dd if=$BL1 of=$DEV conv=fsync bs=1 count=442
> dd if=$BL1 of=$DEV conv=fsync bs=512 skip=1 seek=1
> dd if=$DIR/u-boot.gxbb of=$DEV conv=fsync bs=512 seek=97

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/*
* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/gxbb.h>
#include <dm/platdata.h>
#include <phy.h>
int board_init(void)
{
return 0;
}
static const struct eth_pdata gxbb_eth_pdata = {
.iobase = GXBB_ETH_BASE,
.phy_interface = PHY_INTERFACE_MODE_RGMII,
};
U_BOOT_DEVICE(meson_eth) = {
.name = "eth_designware",
.platdata = &gxbb_eth_pdata,
};
int misc_init_r(void)
{
/* Select Ethernet function */
setbits_le32(GXBB_PINMUX(6), 0x3fff);
/* Set RGMII mode */
setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
GXBB_ETH_REG_0_TX_PHASE(1) |
GXBB_ETH_REG_0_TX_RATIO(4) |
GXBB_ETH_REG_0_PHY_CLK_EN |
GXBB_ETH_REG_0_CLK_EN);
/* Enable power and clock gate */
setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
/* Reset PHY on GPIOZ_14 */
clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
mdelay(10);
setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
return 0;
}