pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
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@ -49,25 +49,6 @@ struct octeontx_pci {
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struct resource bus;
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};
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static uintptr_t octeontx_cfg_addr(struct octeontx_pci *pcie,
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int bus_offs, int shift_offs,
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pci_dev_t bdf, uint offset)
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{
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u32 bus, dev, func;
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uintptr_t address;
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bus = PCI_BUS(bdf) + bus_offs;
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dev = PCI_DEV(bdf);
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func = PCI_FUNC(bdf);
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address = (bus << (20 + shift_offs)) |
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(dev << (15 + shift_offs)) |
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(func << (12 + shift_offs)) | offset;
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address += pcie->cfg.start;
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return address;
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}
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static ulong readl_size(uintptr_t addr, enum pci_size_t size)
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{
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ulong val;
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@ -123,9 +104,9 @@ static int octeontx_ecam_read_config(const struct udevice *bus, pci_dev_t bdf,
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struct pci_controller *hose = dev_get_uclass_priv(bus);
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uintptr_t address;
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address = octeontx_cfg_addr(pcie, pcie->bus.start - hose->first_busno,
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0, bdf, offset);
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*valuep = readl_size(address, size);
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address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + pcie->bus.start - hose->first_busno,
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PCI_DEV(bdf), PCI_FUNC(bdf), offset);
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*valuep = readl_size(pcie->cfg.start + address, size);
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debug("%02x.%02x.%02x: u%d %x -> %lx\n",
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PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, *valuep);
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@ -141,9 +122,9 @@ static int octeontx_ecam_write_config(struct udevice *bus, pci_dev_t bdf,
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struct pci_controller *hose = dev_get_uclass_priv(bus);
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uintptr_t address;
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address = octeontx_cfg_addr(pcie, pcie->bus.start - hose->first_busno,
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0, bdf, offset);
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writel_size(address, size, value);
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address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + pcie->bus.start - hose->first_busno,
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PCI_DEV(bdf), PCI_FUNC(bdf), offset);
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writel_size(pcie->cfg.start + address, size, value);
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debug("%02x.%02x.%02x: u%d %x <- %lx\n",
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PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, value);
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@ -162,17 +143,16 @@ static int octeontx_pem_read_config(const struct udevice *bus, pci_dev_t bdf,
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u8 pri_bus = pcie->bus.start + 1 - hose->first_busno;
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u32 bus_offs = (pri_bus << 16) | (pri_bus << 8) | (pri_bus << 0);
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address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 4,
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bdf, 0);
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*valuep = pci_conv_32_to_size(~0UL, offset, size);
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if (octeontx_bdf_invalid(bdf))
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return -EPERM;
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*valuep = readl_size(address + offset, size);
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address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
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PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4;
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*valuep = readl_size(pcie->cfg.start + address + offset, size);
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hdrtype = readb(address + PCI_HEADER_TYPE);
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hdrtype = readb(pcie->cfg.start + address + PCI_HEADER_TYPE);
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if (hdrtype == PCI_HEADER_TYPE_BRIDGE &&
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offset >= PCI_PRIMARY_BUS &&
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offset <= PCI_SUBORDINATE_BUS &&
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@ -193,9 +173,10 @@ static int octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf,
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u8 pri_bus = pcie->bus.start + 1 - hose->first_busno;
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u32 bus_offs = (pri_bus << 16) | (pri_bus << 8) | (pri_bus << 0);
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address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 4, bdf, 0);
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address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
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PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4;
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hdrtype = readb(address + PCI_HEADER_TYPE);
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hdrtype = readb(pcie->cfg.start + address + PCI_HEADER_TYPE);
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if (hdrtype == PCI_HEADER_TYPE_BRIDGE &&
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offset >= PCI_PRIMARY_BUS &&
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offset <= PCI_SUBORDINATE_BUS &&
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@ -205,7 +186,7 @@ static int octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf,
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if (octeontx_bdf_invalid(bdf))
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return -EPERM;
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writel_size(address + offset, size, value);
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writel_size(pcie->cfg.start + address + offset, size, value);
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debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n",
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PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
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@ -222,15 +203,14 @@ static int octeontx2_pem_read_config(const struct udevice *bus, pci_dev_t bdf,
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struct pci_controller *hose = dev_get_uclass_priv(bus);
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uintptr_t address;
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address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 0,
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bdf, 0);
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*valuep = pci_conv_32_to_size(~0UL, offset, size);
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if (octeontx_bdf_invalid(bdf))
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return -EPERM;
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*valuep = readl_size(address + offset, size);
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address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
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PCI_DEV(bdf), PCI_FUNC(bdf), offset);
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*valuep = readl_size(pcie->cfg.start + address, size);
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debug("%02x.%02x.%02x: u%d %x (%lx) -> %lx\n",
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PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
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@ -247,13 +227,12 @@ static int octeontx2_pem_write_config(struct udevice *bus, pci_dev_t bdf,
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struct pci_controller *hose = dev_get_uclass_priv(bus);
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uintptr_t address;
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address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 0,
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bdf, 0);
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if (octeontx_bdf_invalid(bdf))
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return -EPERM;
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writel_size(address + offset, size, value);
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address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
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PCI_DEV(bdf), PCI_FUNC(bdf), offset);
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writel_size(pcie->cfg.start + address, size, value);
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debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n",
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PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
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