ARMV7: Restructure OMAP mmc driver to allow code sharing between OMAP3 and OMAP4
The architecture independent header is moved to drivers/mmc, and the architecture dependent headers reside in asm/arch-omap3 and asm/arch-omap4 Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman
Sandeep Paulraj
parent
d34efc767d
commit
bec3dc7599
171
arch/arm/include/asm/arch-omap4/mmc_host_def.h
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171
arch/arm/include/asm/arch-omap4/mmc_host_def.h
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/*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation's version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef MMC_HOST_DEF_H
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#define MMC_HOST_DEF_H
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/*
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* OMAP HSMMC register definitions
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*/
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#define OMAP_HSMMC1_BASE 0x4809C100
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#define OMAP_HSMMC2_BASE 0x480B4100
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#define OMAP_HSMMC3_BASE 0x480AD100
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typedef struct hsmmc {
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unsigned char res1[0x10];
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unsigned int sysconfig; /* 0x10 */
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unsigned int sysstatus; /* 0x14 */
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unsigned char res2[0x14];
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unsigned int con; /* 0x2C */
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unsigned char res3[0xD4];
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unsigned int blk; /* 0x104 */
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unsigned int arg; /* 0x108 */
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unsigned int cmd; /* 0x10C */
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unsigned int rsp10; /* 0x110 */
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unsigned int rsp32; /* 0x114 */
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unsigned int rsp54; /* 0x118 */
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unsigned int rsp76; /* 0x11C */
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unsigned int data; /* 0x120 */
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unsigned int pstate; /* 0x124 */
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unsigned int hctl; /* 0x128 */
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unsigned int sysctl; /* 0x12C */
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unsigned int stat; /* 0x130 */
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unsigned int ie; /* 0x134 */
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unsigned char res4[0x8];
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unsigned int capa; /* 0x140 */
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} hsmmc_t;
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/*
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* OMAP HS MMC Bit definitions
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*/
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#define MMC_SOFTRESET (0x1 << 1)
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#define RESETDONE (0x1 << 0)
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#define NOOPENDRAIN (0x0 << 0)
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#define OPENDRAIN (0x1 << 0)
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#define OD (0x1 << 0)
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#define INIT_NOINIT (0x0 << 1)
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#define INIT_INITSTREAM (0x1 << 1)
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#define HR_NOHOSTRESP (0x0 << 2)
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#define STR_BLOCK (0x0 << 3)
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#define MODE_FUNC (0x0 << 4)
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#define DW8_1_4BITMODE (0x0 << 5)
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#define MIT_CTO (0x0 << 6)
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#define CDP_ACTIVEHIGH (0x0 << 7)
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#define WPP_ACTIVEHIGH (0x0 << 8)
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#define RESERVED_MASK (0x3 << 9)
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#define CTPL_MMC_SD (0x0 << 11)
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#define BLEN_512BYTESLEN (0x200 << 0)
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#define NBLK_STPCNT (0x0 << 16)
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#define DE_DISABLE (0x0 << 0)
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#define BCE_DISABLE (0x0 << 1)
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#define ACEN_DISABLE (0x0 << 2)
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#define DDIR_OFFSET (4)
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#define DDIR_MASK (0x1 << 4)
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#define DDIR_WRITE (0x0 << 4)
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#define DDIR_READ (0x1 << 4)
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#define MSBS_SGLEBLK (0x0 << 5)
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#define RSP_TYPE_OFFSET (16)
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#define RSP_TYPE_MASK (0x3 << 16)
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#define RSP_TYPE_NORSP (0x0 << 16)
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#define RSP_TYPE_LGHT136 (0x1 << 16)
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#define RSP_TYPE_LGHT48 (0x2 << 16)
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#define RSP_TYPE_LGHT48B (0x3 << 16)
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#define CCCE_NOCHECK (0x0 << 19)
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#define CCCE_CHECK (0x1 << 19)
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#define CICE_NOCHECK (0x0 << 20)
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#define CICE_CHECK (0x1 << 20)
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#define DP_OFFSET (21)
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#define DP_MASK (0x1 << 21)
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#define DP_NO_DATA (0x0 << 21)
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#define DP_DATA (0x1 << 21)
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#define CMD_TYPE_NORMAL (0x0 << 22)
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#define INDEX_OFFSET (24)
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#define INDEX_MASK (0x3f << 24)
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#define INDEX(i) (i << 24)
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#define DATI_MASK (0x1 << 1)
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#define DATI_CMDDIS (0x1 << 1)
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#define DTW_1_BITMODE (0x0 << 1)
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#define DTW_4_BITMODE (0x1 << 1)
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#define SDBP_PWROFF (0x0 << 8)
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#define SDBP_PWRON (0x1 << 8)
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#define SDVS_1V8 (0x5 << 9)
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#define SDVS_3V0 (0x6 << 9)
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#define ICE_MASK (0x1 << 0)
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#define ICE_STOP (0x0 << 0)
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#define ICS_MASK (0x1 << 1)
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#define ICS_NOTREADY (0x0 << 1)
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#define ICE_OSCILLATE (0x1 << 0)
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#define CEN_MASK (0x1 << 2)
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#define CEN_DISABLE (0x0 << 2)
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#define CEN_ENABLE (0x1 << 2)
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#define CLKD_OFFSET (6)
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#define CLKD_MASK (0x3FF << 6)
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#define DTO_MASK (0xF << 16)
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#define DTO_15THDTO (0xE << 16)
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#define SOFTRESETALL (0x1 << 24)
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#define CC_MASK (0x1 << 0)
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#define TC_MASK (0x1 << 1)
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#define BWR_MASK (0x1 << 4)
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#define BRR_MASK (0x1 << 5)
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#define ERRI_MASK (0x1 << 15)
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#define IE_CC (0x01 << 0)
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#define IE_TC (0x01 << 1)
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#define IE_BWR (0x01 << 4)
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#define IE_BRR (0x01 << 5)
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#define IE_CTO (0x01 << 16)
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#define IE_CCRC (0x01 << 17)
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#define IE_CEB (0x01 << 18)
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#define IE_CIE (0x01 << 19)
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#define IE_DTO (0x01 << 20)
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#define IE_DCRC (0x01 << 21)
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#define IE_DEB (0x01 << 22)
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#define IE_CERR (0x01 << 28)
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#define IE_BADA (0x01 << 29)
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#define VS30_3V0SUP (1 << 25)
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#define VS18_1V8SUP (1 << 26)
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/* Driver definitions */
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#define MMCSD_SECTOR_SIZE 512
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#define MMC_CARD 0
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#define SD_CARD 1
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#define BYTE_MODE 0
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#define SECTOR_MODE 1
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#define CLK_INITSEQ 0
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#define CLK_400KHZ 1
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#define CLK_MISC 2
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typedef struct {
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unsigned int card_type;
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unsigned int version;
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unsigned int mode;
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unsigned int size;
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unsigned int RCA;
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} mmc_card_data;
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#define mmc_reg_out(addr, mask, val)\
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writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
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#endif /* MMC_HOST_DEF_H */
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@ -30,7 +30,8 @@
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#include <i2c.h>
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#include <twl4030.h>
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#include <asm/io.h>
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#include <asm/arch/mmc.h>
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#include "omap3_mmc.h"
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const unsigned short mmc_transspeed_val[15][4] = {
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{CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)},
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@ -81,13 +82,14 @@ block_dev_desc_t *mmc_get_dev(int dev)
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unsigned char mmc_board_init(void)
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{
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t2_t *t2_base = (t2_t *)T2_BASE;
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struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
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#if defined(CONFIG_TWL4030_POWER)
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twl4030_power_mmc_init();
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#endif
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#if defined(CONFIG_OMAP34XX)
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t2_t *t2_base = (t2_t *)T2_BASE;
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struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
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writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 |
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PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
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&t2_base->pbias_lite);
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@ -105,6 +107,9 @@ unsigned char mmc_board_init(void)
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writel(readl(&prcm_base->iclken1_core) |
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EN_MMC1 | EN_MMC2 | EN_MMC3,
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&prcm_base->iclken1_core);
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#endif
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/* TODO add appropriate OMAP4 init */
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return 1;
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}
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@ -25,7 +25,7 @@
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#ifndef MMC_H
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#define MMC_H
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#include "mmc_host_def.h"
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#include <asm/arch/mmc_host_def.h>
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/* Responses */
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#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK)
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