Merge branch 'for-tom' of git://git.denx.de/u-boot-dm
This commit is contained in:
Tom Rini
commit
be9f643ae6
@ -11,6 +11,7 @@
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#include <common.h>
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#include <command.h>
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#include <errno.h>
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#include <spi.h>
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/*-----------------------------------------------------------------------
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@ -38,6 +39,35 @@ static int bitlen;
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static uchar dout[MAX_SPI_BYTES];
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static uchar din[MAX_SPI_BYTES];
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static int do_spi_xfer(int bus, int cs)
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{
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struct spi_slave *slave;
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int rcode = 0;
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slave = spi_setup_slave(bus, cs, 1000000, mode);
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if (!slave) {
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printf("Invalid device %d:%d\n", bus, cs);
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return -EINVAL;
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}
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spi_claim_bus(slave);
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if (spi_xfer(slave, bitlen, dout, din,
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SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
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printf("Error during SPI transaction\n");
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rcode = -EIO;
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} else {
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int j;
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for (j = 0; j < ((bitlen + 7) / 8); j++)
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printf("%02X", din[j]);
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printf("\n");
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}
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spi_release_bus(slave);
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spi_free_slave(slave);
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return rcode;
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}
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/*
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* SPI read/write
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*
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@ -51,11 +81,9 @@ static uchar din[MAX_SPI_BYTES];
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int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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struct spi_slave *slave;
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char *cp = 0;
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uchar tmp;
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int j;
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int rcode = 0;
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/*
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* We use the last specified parameters, unless new ones are
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@ -103,27 +131,10 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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return 1;
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}
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slave = spi_setup_slave(bus, cs, 1000000, mode);
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if (!slave) {
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printf("Invalid device %d:%d\n", bus, cs);
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if (do_spi_xfer(bus, cs))
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return 1;
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}
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spi_claim_bus(slave);
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if(spi_xfer(slave, bitlen, dout, din,
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SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
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printf("Error during SPI transaction\n");
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rcode = 1;
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} else {
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for(j = 0; j < ((bitlen + 7) / 8); j++) {
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printf("%02X", din[j]);
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}
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printf("\n");
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}
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spi_release_bus(slave);
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spi_free_slave(slave);
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return rcode;
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return 0;
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}
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/***************************************************/
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@ -51,46 +51,7 @@ static const char *sandbox_sf_state_name(enum sandbox_sf_state state)
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/* Assume all SPI flashes have 3 byte addresses since they do atm */
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#define SF_ADDR_LEN 3
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struct sandbox_spi_flash_erase_commands {
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u8 cmd;
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u32 size;
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};
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#define IDCODE_LEN 5
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#define MAX_ERASE_CMDS 3
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struct sandbox_spi_flash_data {
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const char *name;
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u8 idcode[IDCODE_LEN];
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u32 size;
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const struct sandbox_spi_flash_erase_commands
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erase_cmds[MAX_ERASE_CMDS];
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};
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/* Structure describing all the flashes we know how to emulate */
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static const struct sandbox_spi_flash_data sandbox_sf_flashes[] = {
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{
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"M25P16", { 0x20, 0x20, 0x15 }, (2 << 20),
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{ /* erase commands */
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{ 0xd8, (64 << 10), }, /* sector */
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{ 0xc7, (2 << 20), }, /* bulk */
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},
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},
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{
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"W25Q32", { 0xef, 0x40, 0x16 }, (4 << 20),
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{ /* erase commands */
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{ 0x20, (4 << 10), }, /* 4KB */
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{ 0xd8, (64 << 10), }, /* sector */
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{ 0xc7, (4 << 20), }, /* bulk */
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},
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},
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{
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"W25Q128", { 0xef, 0x40, 0x18 }, (16 << 20),
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{ /* erase commands */
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{ 0x20, (4 << 10), }, /* 4KB */
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{ 0xd8, (64 << 10), }, /* sector */
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{ 0xc7, (16 << 20), }, /* bulk */
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},
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},
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};
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#define IDCODE_LEN 3
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/* Used to quickly bulk erase backing store */
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static u8 sandbox_sf_0xff[0x1000];
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@ -109,7 +70,8 @@ struct sandbox_spi_flash {
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*/
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enum sandbox_sf_state state;
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uint cmd;
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const void *cmd_data;
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/* Erase size of current erase command */
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uint erase_size;
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/* Current position in the flash; used when reading/writing/etc... */
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uint off;
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/* How many address bytes we've consumed */
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@ -117,7 +79,7 @@ struct sandbox_spi_flash {
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/* The current flash status (see STAT_XXX defines above) */
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u16 status;
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/* Data describing the flash we're emulating */
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const struct sandbox_spi_flash_data *data;
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const struct spi_flash_params *data;
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/* The file on disk to serv up data from */
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int fd;
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};
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@ -127,8 +89,8 @@ static int sandbox_sf_setup(void **priv, const char *spec)
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/* spec = idcode:file */
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struct sandbox_spi_flash *sbsf;
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const char *file;
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size_t i, len, idname_len;
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const struct sandbox_spi_flash_data *data;
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size_t len, idname_len;
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const struct spi_flash_params *data;
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file = strchr(spec, ':');
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if (!file) {
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@ -138,15 +100,14 @@ static int sandbox_sf_setup(void **priv, const char *spec)
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idname_len = file - spec;
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++file;
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for (i = 0; i < ARRAY_SIZE(sandbox_sf_flashes); ++i) {
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data = &sandbox_sf_flashes[i];
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for (data = spi_flash_params_table; data->name; data++) {
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len = strlen(data->name);
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if (idname_len != len)
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continue;
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if (!memcmp(spec, data->name, len))
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break;
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}
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if (i == ARRAY_SIZE(sandbox_sf_flashes)) {
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if (!data->name) {
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printf("sandbox_sf: unknown flash '%*s'\n", (int)idname_len,
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spec);
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goto error;
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@ -223,7 +184,6 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,
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sbsf->pad_addr_bytes = 1;
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case CMD_READ_ARRAY_SLOW:
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case CMD_PAGE_PROGRAM:
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state_addr:
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sbsf->state = SF_ADDR;
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break;
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case CMD_WRITE_DISABLE:
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@ -241,24 +201,25 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,
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sbsf->status |= STAT_WEL;
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break;
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default: {
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size_t i;
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int flags = sbsf->data->flags;
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/* handle erase commands first */
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for (i = 0; i < MAX_ERASE_CMDS; ++i) {
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const struct sandbox_spi_flash_erase_commands *
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erase_cmd = &sbsf->data->erase_cmds[i];
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if (erase_cmd->cmd == 0x00)
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continue;
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if (sbsf->cmd != erase_cmd->cmd)
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continue;
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sbsf->cmd_data = erase_cmd;
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goto state_addr;
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/* we only support erase here */
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if (sbsf->cmd == CMD_ERASE_CHIP) {
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sbsf->erase_size = sbsf->data->sector_size *
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sbsf->data->nr_sectors;
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} else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) {
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sbsf->erase_size = 4 << 10;
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} else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) {
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sbsf->erase_size = 32 << 10;
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} else if (sbsf->cmd == CMD_ERASE_64K &&
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!(flags & (SECT_4K | SECT_32K))) {
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sbsf->erase_size = 64 << 10;
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} else {
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debug(" cmd unknown: %#x\n", sbsf->cmd);
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return 1;
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}
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debug(" cmd unknown: %#x\n", sbsf->cmd);
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return 1;
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sbsf->state = SF_ADDR;
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break;
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}
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}
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@ -309,11 +270,14 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx,
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u8 id;
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debug(" id: off:%u tx:", sbsf->off);
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if (sbsf->off < IDCODE_LEN)
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id = sbsf->data->idcode[sbsf->off];
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else
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if (sbsf->off < IDCODE_LEN) {
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/* Extract correct byte from ID 0x00aabbcc */
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id = sbsf->data->jedec >>
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(8 * (IDCODE_LEN - 1 - sbsf->off));
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} else {
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id = 0;
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debug("%02x\n", id);
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}
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debug("%d %02x\n", sbsf->off, id);
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tx[pos++] = id;
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++sbsf->off;
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break;
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@ -406,24 +370,22 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx,
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break;
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case SF_ERASE:
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case_sf_erase: {
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const struct sandbox_spi_flash_erase_commands *
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erase_cmd = sbsf->cmd_data;
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if (!(sbsf->status & STAT_WEL)) {
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puts("sandbox_sf: write enable not set before erase\n");
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goto done;
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}
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/* verify address is aligned */
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if (sbsf->off & (erase_cmd->size - 1)) {
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if (sbsf->off & (sbsf->erase_size - 1)) {
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debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n",
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erase_cmd->cmd, erase_cmd->size,
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sbsf->cmd, sbsf->erase_size,
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sbsf->off);
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sbsf->status &= ~STAT_WEL;
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goto done;
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}
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debug(" sector erase addr: %u\n", sbsf->off);
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debug(" sector erase addr: %u, size: %u\n", sbsf->off,
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sbsf->erase_size);
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cnt = bytes - pos;
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sandbox_spi_tristate(&tx[pos], cnt);
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@ -433,7 +395,7 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx,
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* TODO(vapier@gentoo.org): latch WIP in status, and
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* delay before clearing it ?
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*/
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ret = sandbox_erase_part(sbsf, erase_cmd->size);
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ret = sandbox_erase_part(sbsf, sbsf->erase_size);
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sbsf->status &= ~STAT_WEL;
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if (ret) {
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debug("sandbox_sf: Erase failed\n");
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@ -91,7 +91,7 @@
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#define CONFIG_ENV_SIZE 8192
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#define CONFIG_ENV_IS_NOWHERE
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/* SPI */
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/* SPI - enable all SPI flash types for testing purposes */
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#define CONFIG_SANDBOX_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SF_TEST
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@ -99,7 +99,13 @@
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#define CONFIG_SPI_FLASH
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#define CONFIG_OF_SPI
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#define CONFIG_OF_SPI_FLASH
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#define CONFIG_SPI_FLASH_ATMEL
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#define CONFIG_SPI_FLASH_EON
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#define CONFIG_SPI_FLASH_GIGADEVICE
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#define CONFIG_SPI_FLASH_MACRONIX
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#define CONFIG_SPI_FLASH_SANDBOX
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#define CONFIG_SPI_FLASH_SPANSION
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#define CONFIG_SPI_FLASH_SST
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SPI_FLASH_WINBOND
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@ -30,24 +30,24 @@
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#define SPI_XFER_MMAP 0x08 /* Memory Mapped start */
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#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */
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#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
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#define SPI_XFER_U_PAGE (1 << 5)
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#define SPI_XFER_U_PAGE (1 << 5)
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/* SPI TX operation modes */
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#define SPI_OPM_TX_QPP 1 << 0
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#define SPI_OPM_TX_QPP (1 << 0)
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/* SPI RX operation modes */
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#define SPI_OPM_RX_AS 1 << 0
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#define SPI_OPM_RX_DOUT 1 << 1
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#define SPI_OPM_RX_DIO 1 << 2
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#define SPI_OPM_RX_QOF 1 << 3
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#define SPI_OPM_RX_QIOF 1 << 4
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#define SPI_OPM_RX_EXTN SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | \
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#define SPI_OPM_RX_AS (1 << 0)
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#define SPI_OPM_RX_DOUT (1 << 1)
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#define SPI_OPM_RX_DIO (1 << 2)
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#define SPI_OPM_RX_QOF (1 << 3)
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#define SPI_OPM_RX_QIOF (1 << 4)
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#define SPI_OPM_RX_EXTN (SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | \
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SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \
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SPI_OPM_RX_QIOF
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SPI_OPM_RX_QIOF)
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/* SPI bus connection options */
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#define SPI_CONN_DUAL_SHARED 1 << 0
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#define SPI_CONN_DUAL_SEPARATED 1 << 1
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/* SPI bus connection options - see enum spi_dual_flash */
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#define SPI_CONN_DUAL_SHARED (1 << 0)
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#define SPI_CONN_DUAL_SEPARATED (1 << 1)
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/* Header byte that marks the start of the message */
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#define SPI_PREAMBLE_END_BYTE 0xec
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