dm: opencores: Drop opencores_yanu serial driver
This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Simon Glass
Tom Rini
parent
baf7125aca
commit
be479339bd
@ -22,7 +22,6 @@ obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
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obj-$(CONFIG_EFI_APP) += serial_efi.o
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obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
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obj-$(CONFIG_MCFUART) += mcfuart.o
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obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
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obj-$(CONFIG_SYS_NS16550) += ns16550.o
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obj-$(CONFIG_S5P) += serial_s5p.o
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obj-$(CONFIG_IMX_SERIAL) += serial_imx.o
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@ -1,242 +0,0 @@
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/*
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* Altera NiosII YANU serial interface by Imagos
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* please see http://www.opencores.org/project,yanu for
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* information/downloads
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*
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* Copyright 2010, Renato Andreola <renato.andreola@imagos.it>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/io.h>
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#include <serial.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*-----------------------------------------------------------------*/
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/* YANU Imagos serial port */
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/*-----------------------------------------------------------------*/
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#define YANU_MAX_PRESCALER_N ((1 << 4) - 1) /* 15 */
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#define YANU_MAX_PRESCALER_M ((1 << 11) -1) /* 2047 */
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#define YANU_FIFO_SIZE (16)
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#define YANU_RXFIFO_SIZE (YANU_FIFO_SIZE)
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#define YANU_TXFIFO_SIZE (YANU_FIFO_SIZE)
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#define YANU_RXFIFO_DLY (10*11)
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#define YANU_TXFIFO_THR (10)
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#define YANU_DATA_CHAR_MASK (0xFF)
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/* data register */
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#define YANU_DATA_OFFSET (0) /* data register offset */
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#define YANU_CONTROL_OFFSET (4) /* control register offset */
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/* interrupt enable */
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#define YANU_CONTROL_IE_RRDY (1<<0) /* ie on received character ready */
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#define YANU_CONTROL_IE_OE (1<<1) /* ie on rx overrun */
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#define YANU_CONTROL_IE_BRK (1<<2) /* ie on break detect */
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#define YANU_CONTROL_IE_FE (1<<3) /* ie on framing error */
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#define YANU_CONTROL_IE_PE (1<<4) /* ie on parity error */
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#define YANU_CONTROL_IE_TRDY (1<<5) /* ie interrupt on tranmitter ready */
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/* control bits */
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#define YANU_CONTROL_BITS_POS (6) /* bits number pos */
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#define YANU_CONTROL_BITS (1<<YANU_CONTROL_BITS_POS) /* number of rx/tx bits per word. 3 bit unsigned integer */
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#define YANU_CONTROL_BITS_N (3) /* ... its bit filed length */
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#define YANU_CONTROL_PARENA (1<<9) /* enable parity bit transmission/reception */
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#define YANU_CONTROL_PAREVEN (1<<10) /* parity even */
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#define YANU_CONTROL_STOPS (1<<11) /* number of stop bits */
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#define YANU_CONTROL_HHENA (1<<12) /* Harware Handshake enable... */
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#define YANU_CONTROL_FORCEBRK (1<<13) /* if set than txd = active (0) */
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/* tuning part */
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#define YANU_CONTROL_RDYDLY (1<<14) /* delay from "first" before setting rrdy (in bit) */
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#define YANU_CONTROL_RDYDLY_N (8) /* ... its bit filed length */
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#define YANU_CONTROL_TXTHR (1<<22) /* tx interrupt threshold: the trdy set if txfifo_chars<= txthr (chars) */
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#define YANU_CONTROL_TXTHR_N (4) /* ... its bit field length */
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#define YANU_BAUD_OFFSET (8) /* baud register offset */
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#define YANU_BAUDM (1<<0) /* baud mantissa lsb */
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#define YANU_BAUDM_N (12) /* ...its bit filed length */
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#define YANU_BAUDE (1<<12) /* baud exponent lsb */
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#define YANU_BAUDE_N (4) /* ...its bit field length */
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#define YANU_ACTION_OFFSET (12) /* action register... write only */
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#define YANU_ACTION_RRRDY (1<<0) /* reset rrdy */
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#define YANU_ACTION_ROE (1<<1) /* reset oe */
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#define YANU_ACTION_RBRK (1<<2) /* reset brk */
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#define YANU_ACTION_RFE (1<<3) /* reset fe */
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#define YANU_ACTION_RPE (1<<4) /* reset pe */
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#define YANU_ACTION_SRRDY (1<<5) /* set rrdy */
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#define YANU_ACTION_SOE (1<<6) /* set oe */
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#define YANU_ACTION_SBRK (1<<7) /* set brk */
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#define YANU_ACTION_SFE (1<<8) /* set fe */
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#define YANU_ACTION_SPE (1<<9) /* set pe */
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#define YANU_ACTION_RFIFO_PULL (1<<10) /* pull a char from rx fifo we MUST do it before taking a char */
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#define YANU_ACTION_RFIFO_CLEAR (1<<11) /* clear rx fifo */
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#define YANU_ACTION_TFIFO_CLEAR (1<<12) /* clear tx fifo */
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#define YANU_ACTION_RTRDY (1<<13) /* clear trdy */
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#define YANU_ACTION_STRDY (1<<14) /* set trdy */
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#define YANU_STATUS_OFFSET (16)
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#define YANU_STATUS_RRDY (1<<0) /* rxrdy flag */
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#define YANU_STATUS_TRDY (1<<1) /* txrdy flag */
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#define YANU_STATUS_OE (1<<2) /* rx overrun error */
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#define YANU_STATUS_BRK (1<<3) /* rx break detect flag */
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#define YANU_STATUS_FE (1<<4) /* rx framing error flag */
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#define YANU_STATUS_PE (1<<5) /* rx parity erro flag */
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#define YANU_RFIFO_CHARS_POS (6)
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#define YANU_RFIFO_CHARS (1<<RFIFO_CHAR_POS) /* number of chars into rx fifo */
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#define YANU_RFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */
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#define YANU_TFIFO_CHARS_POS (11)
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#define YANU_TFIFO_CHARS (1<<TFIFO_CHAR_POS) /* number of chars into tx fifo */
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#define YANU_TFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */
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typedef volatile struct {
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volatile unsigned data;
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volatile unsigned control; /* control register (RW) 32-bit */
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volatile unsigned baud; /* baud/prescaler register (RW) 32-bit */
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volatile unsigned action; /* action register (W) 32-bit */
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volatile unsigned status; /* status register (R) 32-bit */
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volatile unsigned magic; /* magic register (R) 32-bit */
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} yanu_uart_t;
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static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE;
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static void oc_serial_setbrg(void)
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{
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int n, k;
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const unsigned max_uns = 0xFFFFFFFF;
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unsigned best_n, best_m, baud;
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unsigned baudrate;
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#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
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/* Everything's already setup for fixed-baud PTF assignment */
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baudrate = CONFIG_BAUDRATE;
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#else
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baudrate = gd->baudrate;
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#endif
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/* compute best N and M couple */
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best_n = YANU_MAX_PRESCALER_N;
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for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
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if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
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baudrate) {
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best_n = n;
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break;
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}
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}
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for (k = 0;; k++) {
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if (baudrate <= (max_uns >> (15+n-k)))
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break;
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}
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best_m =
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(baudrate * (1 << (15 + n - k))) /
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((unsigned)CONFIG_SYS_CLK_FREQ >> k);
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baud = best_m + best_n * YANU_BAUDE;
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writel(baud, &uart->baud);
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return;
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}
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static int oc_serial_init(void)
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{
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unsigned action,control;
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/* status register cleanup */
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action = YANU_ACTION_RRRDY |
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YANU_ACTION_RTRDY |
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YANU_ACTION_ROE |
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YANU_ACTION_RBRK |
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YANU_ACTION_RFE |
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YANU_ACTION_RPE |
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YANU_ACTION_RFE | YANU_ACTION_RFIFO_CLEAR | YANU_ACTION_TFIFO_CLEAR;
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writel(action, &uart->action);
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/*
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* control register cleanup
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* no interrupts enabled
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* one stop bit
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* hardware flow control disabled
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* 8 bits
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*/
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control = (0x7 << YANU_CONTROL_BITS_POS);
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/* enven parity just to be clean */
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control |= YANU_CONTROL_PAREVEN;
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/* we set threshold for fifo */
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control |= YANU_CONTROL_RDYDLY * YANU_RXFIFO_DLY;
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control |= YANU_CONTROL_TXTHR * YANU_TXFIFO_THR;
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writel(control, &uart->control);
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/* to set baud rate */
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serial_setbrg();
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return (0);
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}
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/*-----------------------------------------------------------------------
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* YANU CONSOLE
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*---------------------------------------------------------------------*/
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static void oc_serial_putc(char c)
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{
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int tx_chars;
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unsigned status;
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if (c == '\n')
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serial_putc ('\r');
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while (1) {
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status = readl(&uart->status);
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tx_chars = (status>>YANU_TFIFO_CHARS_POS)
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& ((1<<YANU_TFIFO_CHARS_N)-1);
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if (tx_chars < YANU_TXFIFO_SIZE-1)
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break;
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WATCHDOG_RESET ();
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}
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writel((unsigned char)c, &uart->data);
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}
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static int oc_serial_tstc(void)
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{
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unsigned status ;
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status = readl(&uart->status);
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return (((status >> YANU_RFIFO_CHARS_POS) &
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((1 << YANU_RFIFO_CHARS_N) - 1)) > 0);
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}
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static int oc_serial_getc(void)
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{
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while (serial_tstc() == 0)
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WATCHDOG_RESET ();
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/* first we pull the char */
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writel(YANU_ACTION_RFIFO_PULL, &uart->action);
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return(readl(&uart->data) & YANU_DATA_CHAR_MASK);
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}
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static struct serial_device oc_serial_drv = {
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.name = "oc_serial",
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.start = oc_serial_init,
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.stop = NULL,
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.setbrg = oc_serial_setbrg,
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.putc = oc_serial_putc,
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.puts = default_serial_puts,
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.getc = oc_serial_getc,
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.tstc = oc_serial_tstc,
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};
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void oc_serial_initialize(void)
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{
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serial_register(&oc_serial_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &oc_serial_drv;
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}
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