drivers: i2c: omap24xx_i2c: prepare driver for DM conversion
Prepare the driver for DM conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Mugunthan V N
Heiko Schocher
parent
eff6b7731b
commit
be243e4113
@ -53,10 +53,6 @@ DECLARE_GLOBAL_DATA_PTR;
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/* Absolutely safe for status update at 100 kHz I2C: */
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#define I2C_WAIT 200
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static int wait_for_bb(struct i2c_adapter *adap);
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static struct i2c *omap24_get_base(struct i2c_adapter *adap);
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static u16 wait_for_event(struct i2c_adapter *adap);
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static void flush_fifo(struct i2c_adapter *adap);
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static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
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{
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unsigned int sampleclk, prescaler;
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@ -90,9 +86,96 @@ static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
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}
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return -1;
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}
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static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
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/*
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* Wait for the bus to be free by checking the Bus Busy (BB)
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* bit to become clear
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*/
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static int wait_for_bb(struct i2c *i2c_base, int waitdelay)
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{
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int timeout = I2C_TIMEOUT;
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u16 stat;
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writew(0xFFFF, &i2c_base->stat); /* clear current interrupts...*/
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#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
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while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
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#else
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/* Read RAW status */
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while ((stat = readw(&i2c_base->irqstatus_raw) &
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I2C_STAT_BB) && timeout--) {
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#endif
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writew(stat, &i2c_base->stat);
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udelay(waitdelay);
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}
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if (timeout <= 0) {
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printf("Timed out in wait_for_bb: status=%04x\n",
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stat);
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return 1;
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}
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writew(0xFFFF, &i2c_base->stat); /* clear delayed stuff*/
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return 0;
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}
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/*
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* Wait for the I2C controller to complete current action
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* and update status
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*/
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static u16 wait_for_event(struct i2c *i2c_base, int waitdelay)
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{
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u16 status;
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int timeout = I2C_TIMEOUT;
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do {
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udelay(waitdelay);
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#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
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status = readw(&i2c_base->stat);
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#else
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/* Read RAW status */
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status = readw(&i2c_base->irqstatus_raw);
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#endif
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} while (!(status &
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(I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
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I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
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I2C_STAT_AL)) && timeout--);
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if (timeout <= 0) {
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printf("Timed out in wait_for_event: status=%04x\n",
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status);
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/*
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* If status is still 0 here, probably the bus pads have
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* not been configured for I2C, and/or pull-ups are missing.
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*/
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printf("Check if pads/pull-ups of bus are properly configured\n");
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writew(0xFFFF, &i2c_base->stat);
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status = 0;
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}
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return status;
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}
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static void flush_fifo(struct i2c *i2c_base)
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{
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u16 stat;
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/*
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* note: if you try and read data when its not there or ready
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* you get a bus error
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*/
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while (1) {
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stat = readw(&i2c_base->stat);
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if (stat == I2C_STAT_RRDY) {
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readb(&i2c_base->data);
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writew(I2C_STAT_RRDY, &i2c_base->stat);
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udelay(1000);
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} else
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break;
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}
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}
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static int __omap24_i2c_setspeed(struct i2c *i2c_base, uint speed,
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int *waitdelay)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int psc, fsscll = 0, fssclh = 0;
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int hsscll = 0, hssclh = 0;
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u32 scll = 0, sclh = 0;
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@ -142,8 +225,7 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
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}
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}
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adap->speed = speed;
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adap->waitdelay = (10000000 / speed) * 2; /* wait for 20 clkperiods */
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*waitdelay = (10000000 / speed) * 2; /* wait for 20 clkperiods */
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writew(0, &i2c_base->con);
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writew(psc, &i2c_base->psc);
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writew(scll, &i2c_base->scll);
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@ -154,9 +236,8 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
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return 0;
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}
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static void omap24_i2c_deblock(struct i2c_adapter *adap)
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static void omap24_i2c_deblock(struct i2c *i2c_base)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int i;
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u16 systest;
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u16 orgsystest;
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@ -200,9 +281,9 @@ static void omap24_i2c_deblock(struct i2c_adapter *adap)
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writew(orgsystest, &i2c_base->systest);
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}
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static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
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static void __omap24_i2c_init(struct i2c *i2c_base, int speed, int slaveadd,
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int *waitdelay)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int timeout = I2C_TIMEOUT;
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int deblock = 1;
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@ -224,7 +305,7 @@ retry:
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udelay(1000);
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}
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if (0 != omap24_i2c_setspeed(adap, speed)) {
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if (0 != __omap24_i2c_setspeed(i2c_base, speed, waitdelay)) {
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printf("ERROR: failed to setup I2C bus-speed!\n");
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return;
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}
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@ -241,45 +322,24 @@ retry:
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I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
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#endif
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udelay(1000);
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flush_fifo(adap);
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flush_fifo(i2c_base);
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writew(0xFFFF, &i2c_base->stat);
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/* Handle possible failed I2C state */
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if (wait_for_bb(adap))
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if (wait_for_bb(i2c_base, *waitdelay))
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if (deblock == 1) {
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omap24_i2c_deblock(adap);
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omap24_i2c_deblock(i2c_base);
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deblock = 0;
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goto retry;
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}
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}
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static void flush_fifo(struct i2c_adapter *adap)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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u16 stat;
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/*
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* note: if you try and read data when its not there or ready
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* you get a bus error
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*/
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while (1) {
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stat = readw(&i2c_base->stat);
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if (stat == I2C_STAT_RRDY) {
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readb(&i2c_base->data);
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writew(I2C_STAT_RRDY, &i2c_base->stat);
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udelay(1000);
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} else
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break;
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}
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}
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/*
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* i2c_probe: Use write access. Allows to identify addresses that are
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* write-only (like the config register of dual-port EEPROMs)
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*/
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static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
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static int __omap24_i2c_probe(struct i2c *i2c_base, int waitdelay, uchar chip)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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u16 status;
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int res = 1; /* default = fail */
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@ -287,7 +347,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
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return res;
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/* Wait until bus is free */
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if (wait_for_bb(adap))
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if (wait_for_bb(i2c_base, waitdelay))
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return res;
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/* No data transfer, slave addr only */
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@ -296,7 +356,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
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writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
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I2C_CON_STP, &i2c_base->con);
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status = wait_for_event(adap);
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status = wait_for_event(i2c_base, waitdelay);
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if ((status & ~I2C_STAT_XRDY) == 0 || (status & I2C_STAT_AL)) {
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/*
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@ -306,8 +366,8 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
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* following 'if' section:
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*/
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if (status == I2C_STAT_XRDY)
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printf("i2c_probe: pads on bus %d probably not configured (status=0x%x)\n",
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adap->hwadapnr, status);
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printf("i2c_probe: pads on bus probably not configured (status=0x%x)\n",
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status);
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goto pr_exit;
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}
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@ -315,7 +375,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
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/* Check for ACK (!NAK) */
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if (!(status & I2C_STAT_NACK)) {
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res = 0; /* Device found */
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udelay(adap->waitdelay);/* Required by AM335X in SPL */
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udelay(waitdelay);/* Required by AM335X in SPL */
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/* Abort transfer (force idle state) */
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writew(I2C_CON_MST | I2C_CON_TRX, &i2c_base->con); /* Reset */
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udelay(1000);
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@ -323,7 +383,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
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I2C_CON_STP, &i2c_base->con); /* STP */
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}
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pr_exit:
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flush_fifo(adap);
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flush_fifo(i2c_base);
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writew(0xFFFF, &i2c_base->stat);
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return res;
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}
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@ -341,10 +401,9 @@ pr_exit:
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* or that do not need a register address at all (such as some clock
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* distributors).
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*/
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static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
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int alen, uchar *buffer, int len)
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static int __omap24_i2c_read(struct i2c *i2c_base, int waitdelay, uchar chip,
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uint addr, int alen, uchar *buffer, int len)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int i2c_error = 0;
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u16 status;
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@ -389,7 +448,7 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
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#endif
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/* Wait until bus not busy */
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if (wait_for_bb(adap))
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if (wait_for_bb(i2c_base, waitdelay))
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return 1;
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/* Zero, one or two bytes reg address (offset) */
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@ -410,12 +469,12 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
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#endif
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/* Send register offset */
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while (1) {
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status = wait_for_event(adap);
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status = wait_for_event(i2c_base, waitdelay);
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/* Try to identify bus that is not padconf'd for I2C */
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if (status == I2C_STAT_XRDY) {
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i2c_error = 2;
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printf("i2c_read (addr phase): pads on bus %d probably not configured (status=0x%x)\n",
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adap->hwadapnr, status);
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printf("i2c_read (addr phase): pads on bus probably not configured (status=0x%x)\n",
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status);
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goto rd_exit;
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}
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if (status == 0 || (status & I2C_STAT_NACK)) {
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@ -450,7 +509,7 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
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/* Receive data */
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while (1) {
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status = wait_for_event(adap);
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status = wait_for_event(i2c_base, waitdelay);
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/*
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* Try to identify bus that is not padconf'd for I2C. This
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* state could be left over from previous transactions if
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@ -458,8 +517,8 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
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*/
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if (status == I2C_STAT_XRDY) {
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i2c_error = 2;
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printf("i2c_read (data phase): pads on bus %d probably not configured (status=0x%x)\n",
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adap->hwadapnr, status);
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printf("i2c_read (data phase): pads on bus probably not configured (status=0x%x)\n",
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status);
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goto rd_exit;
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}
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if (status == 0 || (status & I2C_STAT_NACK)) {
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@ -477,16 +536,15 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
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}
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rd_exit:
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flush_fifo(adap);
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flush_fifo(i2c_base);
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writew(0xFFFF, &i2c_base->stat);
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return i2c_error;
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}
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/* i2c_write: Address (reg offset) may be 0, 1 or 2 bytes long. */
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static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
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int alen, uchar *buffer, int len)
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static int __omap24_i2c_write(struct i2c *i2c_base, int waitdelay, uchar chip,
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uint addr, int alen, uchar *buffer, int len)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int i;
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u16 status;
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int i2c_error = 0;
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@ -536,7 +594,7 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
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#endif
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/* Wait until bus not busy */
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if (wait_for_bb(adap))
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if (wait_for_bb(i2c_base, waitdelay))
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return 1;
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/* Start address phase - will write regoffset + len bytes data */
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@ -549,12 +607,12 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
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while (alen) {
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/* Must write reg offset (one or two bytes) */
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status = wait_for_event(adap);
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status = wait_for_event(i2c_base, waitdelay);
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/* Try to identify bus that is not padconf'd for I2C */
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if (status == I2C_STAT_XRDY) {
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i2c_error = 2;
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printf("i2c_write: pads on bus %d probably not configured (status=0x%x)\n",
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adap->hwadapnr, status);
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printf("i2c_write: pads on bus probably not configured (status=0x%x)\n",
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status);
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goto wr_exit;
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}
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if (status == 0 || (status & I2C_STAT_NACK)) {
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@ -576,7 +634,7 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
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}
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/* Address phase is over, now write data */
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for (i = 0; i < len; i++) {
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status = wait_for_event(adap);
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status = wait_for_event(i2c_base, waitdelay);
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if (status == 0 || (status & I2C_STAT_NACK)) {
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i2c_error = 1;
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printf("i2c_write: error waiting for data ACK (status=0x%x)\n",
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@ -598,87 +656,21 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
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* transferred on the bus.
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*/
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do {
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status = wait_for_event(adap);
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status = wait_for_event(i2c_base, waitdelay);
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} while (!(status & I2C_STAT_ARDY) && timeout--);
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if (timeout <= 0)
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printf("i2c_write: timed out writig last byte!\n");
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wr_exit:
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flush_fifo(adap);
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flush_fifo(i2c_base);
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writew(0xFFFF, &i2c_base->stat);
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return i2c_error;
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}
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/*
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* Wait for the bus to be free by checking the Bus Busy (BB)
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* bit to become clear
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* The legacy I2C functions. These need to get removed once
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* all users of this driver are converted to DM.
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*/
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static int wait_for_bb(struct i2c_adapter *adap)
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{
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struct i2c *i2c_base = omap24_get_base(adap);
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int timeout = I2C_TIMEOUT;
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u16 stat;
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writew(0xFFFF, &i2c_base->stat); /* clear current interrupts...*/
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#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
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while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
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#else
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/* Read RAW status */
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while ((stat = readw(&i2c_base->irqstatus_raw) &
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I2C_STAT_BB) && timeout--) {
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#endif
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writew(stat, &i2c_base->stat);
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udelay(adap->waitdelay);
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}
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if (timeout <= 0) {
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printf("Timed out in wait_for_bb: status=%04x\n",
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stat);
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return 1;
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}
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writew(0xFFFF, &i2c_base->stat); /* clear delayed stuff*/
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return 0;
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}
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||||
|
||||
/*
|
||||
* Wait for the I2C controller to complete current action
|
||||
* and update status
|
||||
*/
|
||||
static u16 wait_for_event(struct i2c_adapter *adap)
|
||||
{
|
||||
struct i2c *i2c_base = omap24_get_base(adap);
|
||||
u16 status;
|
||||
int timeout = I2C_TIMEOUT;
|
||||
|
||||
do {
|
||||
udelay(adap->waitdelay);
|
||||
#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
|
||||
status = readw(&i2c_base->stat);
|
||||
#else
|
||||
/* Read RAW status */
|
||||
status = readw(&i2c_base->irqstatus_raw);
|
||||
#endif
|
||||
} while (!(status &
|
||||
(I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
|
||||
I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
|
||||
I2C_STAT_AL)) && timeout--);
|
||||
|
||||
if (timeout <= 0) {
|
||||
printf("Timed out in wait_for_event: status=%04x\n",
|
||||
status);
|
||||
/*
|
||||
* If status is still 0 here, probably the bus pads have
|
||||
* not been configured for I2C, and/or pull-ups are missing.
|
||||
*/
|
||||
printf("Check if pads/pull-ups of bus %d are properly configured\n",
|
||||
adap->hwadapnr);
|
||||
writew(0xFFFF, &i2c_base->stat);
|
||||
status = 0;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static struct i2c *omap24_get_base(struct i2c_adapter *adap)
|
||||
{
|
||||
switch (adap->hwadapnr) {
|
||||
@ -710,6 +702,56 @@ static struct i2c *omap24_get_base(struct i2c_adapter *adap)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
|
||||
int alen, uchar *buffer, int len)
|
||||
{
|
||||
struct i2c *i2c_base = omap24_get_base(adap);
|
||||
|
||||
return __omap24_i2c_read(i2c_base, adap->waitdelay, chip, addr,
|
||||
alen, buffer, len);
|
||||
}
|
||||
|
||||
|
||||
static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
|
||||
int alen, uchar *buffer, int len)
|
||||
{
|
||||
struct i2c *i2c_base = omap24_get_base(adap);
|
||||
|
||||
return __omap24_i2c_write(i2c_base, adap->waitdelay, chip, addr,
|
||||
alen, buffer, len);
|
||||
}
|
||||
|
||||
static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
|
||||
{
|
||||
struct i2c *i2c_base = omap24_get_base(adap);
|
||||
int ret;
|
||||
|
||||
ret = __omap24_i2c_setspeed(i2c_base, speed, &adap->waitdelay);
|
||||
if (ret) {
|
||||
error("%s: set i2c speed failed\n", __func__);
|
||||
return ret;
|
||||
}
|
||||
|
||||
adap->speed = speed;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
|
||||
{
|
||||
struct i2c *i2c_base = omap24_get_base(adap);
|
||||
|
||||
return __omap24_i2c_init(i2c_base, speed, slaveadd, &adap->waitdelay);
|
||||
}
|
||||
|
||||
static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
|
||||
{
|
||||
struct i2c *i2c_base = omap24_get_base(adap);
|
||||
|
||||
return __omap24_i2c_probe(i2c_base, adap->waitdelay, chip);
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED1)
|
||||
#define CONFIG_SYS_OMAP24_I2C_SPEED1 CONFIG_SYS_OMAP24_I2C_SPEED
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user