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Convert CONFIG_SUPPORT_EMMC_BOOT to Kconfig

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This converts the following to Kconfig:
	CONFIG_SUPPORT_EMMC_BOOT

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-10-30 23:03:51 -04:00
parent 465547bddf
commit bca1bce92a
26 changed files with 14 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
configs/apalis-imx8_defconfig
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@ -46,6 +46,7 @@ CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

1
configs/apalis-imx8x_defconfig
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@ -53,6 +53,7 @@ CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_I2C_MUX=y CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

1
configs/bcm_ns3_defconfig
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@ -36,6 +36,7 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_CLK=y CONFIG_CLK=y
CONFIG_CLK_CCF=y CONFIG_CLK_CCF=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_IPROC=y CONFIG_MMC_SDHCI_IPROC=y

1
configs/cgtqmx8_defconfig
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@ -58,6 +58,7 @@ CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_I2C_MUX=y CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

1
configs/colibri-imx8x_defconfig
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@ -44,6 +44,7 @@ CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

1
configs/imx8qm_mek_defconfig
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@ -62,6 +62,7 @@ CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_I2C_MUX=y CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

1
configs/imx8qm_rom7720_a1_4G_defconfig
View File

@ -59,6 +59,7 @@ CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_I2C_MUX=y CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_ESDHC_IMX=y CONFIG_FSL_ESDHC_IMX=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

1
configs/octeontx2_95xx_defconfig
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@ -77,6 +77,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_TSIZE=y CONFIG_TFTP_TSIZE=y
CONFIG_DM_I2C=y CONFIG_DM_I2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_OCTEONTX=y CONFIG_MMC_OCTEONTX=y
CONFIG_MTD=y CONFIG_MTD=y

1
configs/octeontx2_96xx_defconfig
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@ -83,6 +83,7 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_MUX=y CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_OCTEONTX=y CONFIG_MMC_OCTEONTX=y
CONFIG_MTD=y CONFIG_MTD=y

1
configs/octeontx_81xx_defconfig
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@ -82,6 +82,7 @@ CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y CONFIG_AHCI_PCI=y
CONFIG_DM_I2C=y CONFIG_DM_I2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_OCTEONTX=y CONFIG_MMC_OCTEONTX=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

1
configs/octeontx_83xx_defconfig
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@ -79,6 +79,7 @@ CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y CONFIG_AHCI_PCI=y
CONFIG_DM_I2C=y CONFIG_DM_I2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_OCTEONTX=y CONFIG_MMC_OCTEONTX=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

1
configs/phycore_pcl063_ull_defconfig
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@ -35,6 +35,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM_I2C_GPIO=y CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_MXC=y CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y

1
configs/pico-imx6_defconfig
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@ -64,6 +64,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FASTBOOT_BUF_SIZE=0x10000000 CONFIG_FASTBOOT_BUF_SIZE=0x10000000
CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y

1
configs/variscite_dart6ul_defconfig
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@ -37,6 +37,7 @@ CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_MXC=y CONFIG_SYS_I2C_MXC=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_I2C_EEPROM=y CONFIG_I2C_EEPROM=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y

1
include/configs/apalis-imx8.h
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@ -16,7 +16,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5b010000 #define USDHC1_BASE_ADDR 0x5b010000
#define USDHC2_BASE_ADDR 0x5b020000 #define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
/* Networking */ /* Networking */
#define CONFIG_IPADDR 192.168.10.2 #define CONFIG_IPADDR 192.168.10.2

1
include/configs/apalis-imx8x.h
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@ -15,7 +15,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5b010000 #define USDHC1_BASE_ADDR 0x5b010000
#define USDHC2_BASE_ADDR 0x5b020000 #define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_IPADDR 192.168.10.2 #define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NETMASK 255.255.255.0

1
include/configs/bcm_ns3.h
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@ -42,7 +42,6 @@
#define CONFIG_SYS_BOOTM_LEN 0x01800000 #define CONFIG_SYS_BOOTM_LEN 0x01800000
/* Access eMMC Boot_1 and Boot_2 partitions */ /* Access eMMC Boot_1 and Boot_2 partitions */
#define CONFIG_SUPPORT_EMMC_BOOT
/* enable 64-bit PCI resources */ /* enable 64-bit PCI resources */
#define CONFIG_SYS_PCI_64BIT 1 #define CONFIG_SYS_PCI_64BIT 1

1
include/configs/cgtqmx8.h
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@ -46,7 +46,6 @@
#define USDHC1_BASE_ADDR 0x5B010000 #define USDHC1_BASE_ADDR 0x5B010000
#define USDHC2_BASE_ADDR 0x5B020000 #define USDHC2_BASE_ADDR 0x5B020000
#define USDHC3_BASE_ADDR 0x5B030000 #define USDHC3_BASE_ADDR 0x5B030000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_OVERWRITE

1
include/configs/colibri-imx8x.h
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@ -17,7 +17,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5b010000 #define USDHC1_BASE_ADDR 0x5b010000
#define USDHC2_BASE_ADDR 0x5b020000 #define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_IPADDR 192.168.10.2 #define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NETMASK 255.255.255.0

1
include/configs/dart_6ul.h
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@ -41,7 +41,6 @@
/* MMC Configs */ /* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
#define CONFIG_SUPPORT_EMMC_BOOT
/* I2C configs */ /* I2C configs */

1
include/configs/imx8qm_mek.h
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@ -42,7 +42,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000 #define USDHC1_BASE_ADDR 0x5B010000
#define USDHC2_BASE_ADDR 0x5B020000 #define USDHC2_BASE_ADDR 0x5B020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#ifdef CONFIG_AHAB_BOOT #ifdef CONFIG_AHAB_BOOT
#define AHAB_ENV "sec_boot=yes\0" #define AHAB_ENV "sec_boot=yes\0"

2
include/configs/imx8qm_rom7720.h
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@ -22,8 +22,6 @@
#define USDHC2_BASE_ADDR 0x5B020000 #define USDHC2_BASE_ADDR 0x5B020000
#define USDHC3_BASE_ADDR 0x5B030000 #define USDHC3_BASE_ADDR 0x5B030000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
/* FUSE command */ /* FUSE command */
/* Boot M4 */ /* Boot M4 */

1
include/configs/octeontx2_common.h
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@ -56,7 +56,6 @@
#if defined(CONFIG_MMC_OCTEONTX) #if defined(CONFIG_MMC_OCTEONTX)
#define MMC_SUPPORTS_TUNING #define MMC_SUPPORTS_TUNING
/** EMMC specific defines */ /** EMMC specific defines */
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_SUPPORT_EMMC_RPMB #define CONFIG_SUPPORT_EMMC_RPMB
#endif #endif

1
include/configs/octeontx_common.h
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@ -88,7 +88,6 @@
/** EMMC specific defines */ /** EMMC specific defines */
#if defined(CONFIG_MMC_OCTEONTX) #if defined(CONFIG_MMC_OCTEONTX)
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_SUPPORT_EMMC_RPMB #define CONFIG_SUPPORT_EMMC_RPMB
#endif #endif

1
include/configs/pcl063_ull.h
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@ -30,7 +30,6 @@
/* MMC Configs */ /* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
#define CONFIG_SUPPORT_EMMC_BOOT
/* I2C configs */ /* I2C configs */

1
include/configs/pico-imx6.h
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@ -28,7 +28,6 @@
/* MMC Configuration */ /* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
/* USB Configs */ /* USB Configs */