Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (146 commits)
arm: Use common .lds file where possible
arm: add a common .lds link script
arm: Remove unneeded setting of LDCSRIPT
Define CPUDIR for the .lds link script
arm: Remove zipitz2 link script
Allow arch directory to contain .lds without requiring Makefile
OMAP: Remove omap1610inn-based boards
arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings
board/ti/beagle/beagle.c: Fix build warnings
sdrc.c: Fix typo in do_sdrc_init() for SPL
tegra: i2c: Add I2C driver
tegra: fdt: i2c: Add extra I2C bindings for U-Boot
tegra: i2c: Select I2C ordering for Seaboard
tegra: i2c: Enable I2C on Seaboard
tegra: i2c: Select number of controllers for Tegra2 boards
tegra: i2c: Initialise I2C on Nvidia boards
tegra: Enhance clock support to handle 16-bit clock divisors
fdt: Add function to allow aliases to refer to multiple nodes
tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE
tegra: fdt: Enable FDT support for Ventana
tegra: fdt: Enable FDT support for Seaboard
tegra: usb: Enable USB on Seaboard
tegra: usb: Add common USB defines for tegra2 boards
tegra: usb: Add USB support to nvidia boards
arm: Check for valid FDT after console is up
fdt: Avoid early panic() when there is no FDT present
tegra: usb: Add support for Tegra USB peripheral
tegra: fdt: Add function to return peripheral/clock ID
usb: Add support for txfifo threshold
tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard
tegra: usb: fdt: Add additional device tree definitions for USB ports
tegra: fdt: Add clock bindings for Tegra2 Seaboard
tegra: fdt: Add clock bindings
tegra: fdt: Add additional USB binding
fdt: Add tegra-usb bindings file from linux
fdt: Add staging area for device tree binding documentation
tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel
tegra: fdt: Add Tegra2x device tree file from kernel
arm: fdt: Add skeleton device tree file from kernel
fdt: Add basic support for decoding GPIO definitions
fdt: Add functions to access phandles, arrays and bools
fdt: Tidy up a few fdtdec problems
fdt: Add tests for fdtdec
fdt: Add fdtdec_find_aliases() to deal with alias nodes
arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
net: fec_mxc: allow use with cache enabled
net: force PKTALIGN to ARCH_DMA_MINALIGN
i.MX28: Enable caches by default
i.MX28: Make use of the bounce buffer
i.MX28: Do data transfers via DMA in MMC driver
MMC: Implement generic bounce buffer
i.MX28: Add cache support to MXS NAND driver
i.MX28: Add cache support into the APBH DMA driver
ARM926EJS: Implement cache operations
board/vpac270/onenand.c: Fix build errors
nhk8815: fix build errors
atmel-boards: add missing atmel_mci.h
ARM: highbank: setup env from boot source register
ARM: highbank: change env config to use nvram
ARM: highbank: add reset support
ARM: highbank: Add boot counter support
ARM: highbank: change TEXT_BASE to 0x8000
ARM: highbank: fix us_to_tick calculation
ARM: highbank: add missing get_tbclk
ARM: highbank: fix warning for calxedaxgmac_initialize
net: calxedaxgmac: fix build due to missing __aligned definition
EXYNOS: Add structure for Exynos4 DMC
EXYNOS: SMDK5250: Support all 4 UARTs
ARM: fix s3c2410 timer code
ARM: davinci: fixes for cam_enc_4xx board
omap3_spi: receive transmit mode
calimain, enbw_cmc: Fix typo in comments
Davinci: ea20: use gpio framework to access gpios
OMAP3: mt_ventoux: sets its own mtdparts
OMAP3: mt_ventoux: updated timing for FPGA
twl4030: fix potential power supply handling issues
NAND: TI: fix warnings in omap_gpmc.c
cam_enc_4xx: Rename 'images' to 'imgs'
arm: Add Prep subcommand support to bootm
OMAP3: twister: add support to boot Linux from SPL
SPL: call cleanup_before_linux() before booting Linux
OMAP3: SPL: do not call I2C init if no I2C is set.
Add cache functions to SPL for armv7
devkit8000: Implement and activate direct OS boot
omap/spl: change output of spl_parse_image_header
omap-common/spl: Add linux boot to SPL
devkit8000/spl: init GPMC for dm9000 in SPL
omap-common: Add NAND SPL linux booting
devkit8000: add config for spl command
Add cmd_spl command
mx53ard: Initialize return code with error
mx53: Make PLL2 to be the parent of UART clock
configs: imx: Use CONFIG_SF_DEFAULT_CS
mx28evk: Provide default values for SPI bus and chip select
USB: ehci-mx6: Add proper IO accessors
mx6: Read silicon revision from register
i.MX28: Drop __naked function from spl_mem_init
mxs_spi: Return proper timeout error
i.MX28: Make the stabilization delays shorter
pmic_i2c: Return error in case of invalid pmic_i2c_tx_num
mx6: Remove duplicate definition of ANATOP_BASE_ADDR
mx6: Fix reset cause for Power On Reset case
i.MX6: mx6qsabrelite: add MACH_TYPE_MX6Q_SABRELITE
i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG
i.MX28: Enable additional DRAM address bits
mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment
mx31: add "ARM11P power gating" to get_reset_cause
mx31pdk: Fix CONFIG_SYS_MEMTEST_END
efikamx: Fix CONFIG_SYS_MEMTEST_END
mx53smd: Fix CONFIG_SYS_MEMTEST_END
mx53evk: Fix CONFIG_SYS_MEMTEST_END
mx51evk: Fix CONFIG_SYS_MEMTEST_END
i.MX6: mx6qsabrelite: add ext2 support
imximage: Remove overwriting of flash_offset
IXP: Fix GPIO_INT_ACT_LOW_SET()
IXP: Fix NAND build warning on PDNB3 and SCPU
IXP: Move PDNB3 and SCPU from Makefile to boards.cfg
IXP: Squash warnings in IXP NPE
IXP: Fix missing MACH_TYPE_{ACTUX?,PNB3,DVLHOST}
IXP: Make IXP buildable with arm-linux- toolchains
Examples: Properly append LDFLAGS to LD command
SPL: Enable YMODEM support on BeagleBone and AM335x EVM
SPL: Add YMODEM over UART load support
SPL: Add README.omap3
README: document more SPL config options
spl.c: Use __noreturn decorator
config.mk: Check for -fstack-usage support
config.mk: Make cc-option create a file under include/generated
...
This commit is contained in:
Wolfgang Denk
@@ -29,6 +29,8 @@
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#define CONFIG_IXP425 1
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#define CONFIG_ACTUX1 1
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#define CONFIG_MACH_TYPE 1479
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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@@ -29,6 +29,8 @@
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#define CONFIG_IXP425 1
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#define CONFIG_ACTUX2 1
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#define CONFIG_MACH_TYPE 1480
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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@@ -29,6 +29,8 @@
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#define CONFIG_IXP425 1
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#define CONFIG_ACTUX3 1
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#define CONFIG_MACH_TYPE 1481
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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@@ -29,6 +29,8 @@
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#define CONFIG_IXP425 1
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#define CONFIG_ACTUX4 1
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#define CONFIG_MACH_TYPE 1532
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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@@ -145,6 +145,7 @@
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_YMODEM_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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/*
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@@ -161,15 +161,14 @@
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#define CONFIG_MENU
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#define CONFIG_MENU_SHOW
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#define CONFIG_FIT
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#define CONFIG_CMD_PXE
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#define CONFIG_BOARD_IMG_ADDR_R 0x80000000
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#ifdef CONFIG_NAND_DAVINCI
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#define CONFIG_ENV_SIZE (16 << 10)
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x180000
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#define CONFIG_ENV_RANGE 0x040000
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#define CONFIG_ENV_OFFSET_REDUND 0x1c0000
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#define CONFIG_ENV_RANGE 0x020000
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#undef CONFIG_ENV_IS_IN_FLASH
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#endif
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@@ -220,6 +219,7 @@
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/* Defines for SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_SIMPLE
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#define CONFIG_SPL_NAND_LOAD
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@@ -229,7 +229,7 @@
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#define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds"
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#define CONFIG_SPL_STACK (0x00010000 + 0x7f00)
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#define CONFIG_SPL_TEXT_BASE 0x0000020 /*CONFIG_SYS_SRAM_START*/
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#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/
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#define CONFIG_SPL_MAX_SIZE 12320
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#ifndef CONFIG_SPL_BUILD
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@@ -274,6 +274,7 @@
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000
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#define CONFIG_SYS_NAND_U_BOOT_ERA_SIZE 0x100000
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/* for UBL header */
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#define CONFIG_SYS_UBL_BLOCK (CONFIG_SYS_NAND_PAGE_SIZE)
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@@ -429,7 +430,7 @@
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" 0 3000;nandrbl uboot\0" \
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"writeuboot=nandrbl uboot;" \
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"nand erase " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
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xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) \
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xstr(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
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";nand write " xstr(DVN4XX_UBOOT_ADDR_R_UBOOT) \
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" " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
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xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
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@@ -466,14 +467,14 @@
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"nand write ${img_addr_r} 0 3000;nandrbl uboot\0" \
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"img_writeuboot=nandrbl uboot;" \
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"nand erase " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
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xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) \
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xstr(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
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";nand write ${img_addr_r} " \
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xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
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xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
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"img_writedfenv=ubi part ubi 2048;" \
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"ubi write ${img_addr_r} default ${filesize}\0" \
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"img_volume=rootfs1\0" \
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"img_writeramdisk=ubi part ubi 2048;ubifsmount ${img_volume};" \
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"img_writeramdisk=ubi part ubi 2048;" \
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"ubi write ${img_addr_r} ${img_volume} ${filesize}\0" \
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"load_img=tftp ${fit_addr_r} ${img_file}\0" \
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"net_nfs=run load_kernel; " \
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@@ -35,7 +35,7 @@
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP34XX 1 /* which is a 34XX */
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#define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */
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#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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@@ -327,7 +327,7 @@
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#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
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#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
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#define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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/* NAND boot config */
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@@ -351,4 +351,15 @@
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
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/* SPL OS boot options */
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#define CONFIG_SPL_OS_BOOT
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#define CONFIG_SPL_OS_BOOT_KEY 26
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#define CONFIG_CMD_SPL
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
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#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
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0x400000)
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
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#endif /* __CONFIG_H */
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@@ -30,6 +30,8 @@
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#define CONFIG_IXP425 1
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#define CONFIG_DVLHOST 1
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#define CONFIG_MACH_TYPE 1343
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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@@ -48,6 +48,7 @@
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_TEXT_BASE 0xc1080000
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#define CONFIG_DA8XX_GPIO
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/*
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* Memory Info
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@@ -167,6 +168,7 @@
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#define CONFIG_CMD_SAVES
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_GPIO
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#ifdef CONFIG_CMD_BDI
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#define CONFIG_CLOCKS
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@@ -113,7 +113,7 @@
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_SST
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#define CONFIG_SPI_FLASH_CS (1 | 121 << 8)
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#define CONFIG_SF_DEFAULT_CS (1 | 121 << 8)
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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#define CONFIG_SF_DEFAULT_SPEED 25000000
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@@ -240,7 +240,7 @@
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x90000000
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#define CONFIG_SYS_MEMTEST_END 0x10000
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#define CONFIG_SYS_MEMTEST_END 0x90010000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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@@ -41,6 +41,9 @@
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_BOOTCOUNT_LIMIT
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#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
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#define CONFIG_MISC_INIT_R
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#define CONFIG_SCSI_AHCI
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#define CONFIG_SCSI_AHCI_PLAT
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@@ -90,12 +93,6 @@
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#define CONFIG_SYS_LOAD_ADDR 0x800000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdtaddr_r=0x600000\0" \
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"pxefile_addr_r=0x700000\0" \
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"kernel_addr_r=0x800000\0" \
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"ramdisk_addr_r=0x01000000\0" \
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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@@ -115,12 +112,16 @@
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#define CONFIG_SYS_MEMTEST_START 0x100000
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
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/* Room required on the stack for the environment data */
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_ENV_IS_NOWHERE
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/* Environment data setup
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*/
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#define CONFIG_ENV_IS_IN_NVRAM
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#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
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#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
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#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
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#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_SYS_TEXT_BASE 0x00001000
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#define CONFIG_SYS_TEXT_BASE 0x00008000
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#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
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#define CONFIG_SKIP_LOWLEVEL_INIT
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@@ -140,6 +140,7 @@
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*/
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_MMC_BOUNCE_BUFFER
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MXS_MMC
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#endif
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@@ -252,7 +253,7 @@
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SPI_FLASH_CS 2
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#define CONFIG_SF_DEFAULT_CS 2
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SF_DEFAULT_SPEED 24000000
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@@ -39,6 +39,16 @@
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#define V_PROMPT "mt_ventoux => "
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#define CONFIG_SYS_PROMPT V_PROMPT
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/*
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* Set its own mtdparts, different from common
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*/
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#undef MTDIDS_DEFAULT
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#undef MTDPARTS_DEFAULT
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
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"1m(u-boot),256k(env1)," \
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"256k(env2),8m(ubisystem),-(rootfs)"
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/*
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* FPGA
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*/
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@@ -138,6 +138,7 @@
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MMC_BOUNCE_BUFFER
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#define CONFIG_MXS_MMC
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#endif
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@@ -186,6 +187,8 @@
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/* SPI Flash */
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SF_DEFAULT_BUS 2
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#define CONFIG_SF_DEFAULT_CS 0
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/* this may vary and depends on the installed chip */
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#define CONFIG_SPI_FLASH_SST
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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@@ -141,7 +141,7 @@
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x10000
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#define CONFIG_SYS_MEMTEST_END 0x80010000
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/* default load address */
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#define CONFIG_SYS_LOAD_ADDR 0x81000000
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@@ -199,7 +199,7 @@
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x90000000
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#define CONFIG_SYS_MEMTEST_END 0x10000
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#define CONFIG_SYS_MEMTEST_END 0x90010000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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@@ -161,7 +161,7 @@
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x70000000
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#define CONFIG_SYS_MEMTEST_END 0x10000
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#define CONFIG_SYS_MEMTEST_END 0x70010000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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@@ -149,7 +149,7 @@
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x70000000
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#define CONFIG_SYS_MEMTEST_END 0x10000
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#define CONFIG_SYS_MEMTEST_END 0x70010000
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|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
|
||||
|
||||
@@ -28,11 +28,14 @@
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#define CONFIG_MACH_TYPE 3769
|
||||
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_INITRD_TAG
|
||||
#define CONFIG_REVISION_TAG
|
||||
|
||||
/* Size of malloc() pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
|
||||
@@ -64,6 +67,7 @@
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
@@ -80,6 +84,19 @@
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_MICREL
|
||||
|
||||
/* USB Configs */
|
||||
#define CONFIG_CMD_USB
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_MX6
|
||||
#define CONFIG_USB_STORAGE
|
||||
#define CONFIG_USB_HOST_ETHER
|
||||
#define CONFIG_USB_ETHER_ASIX
|
||||
#define CONFIG_USB_ETHER_SMSC95XX
|
||||
#define CONFIG_MXC_USB_PORT 1
|
||||
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
||||
#define CONFIG_MXC_USB_FLAGS 0
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
|
||||
@@ -1,197 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2004
|
||||
* Texas Instruments.
|
||||
* Kshitij Gupta <kshitij@ti.com>
|
||||
* Configuration settings for the TI OMAP 1610 H2 board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
|
||||
#define CONFIG_OMAP 1 /* in a TI OMAP core */
|
||||
#define CONFIG_OMAP1610 1 /* which is in a 1610 */
|
||||
#define CONFIG_H2_OMAP1610 1 /* on an H2 Board */
|
||||
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_H2
|
||||
|
||||
/* input clock of PLL */
|
||||
/* the OMAP1610 H2 has 12MHz input clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 12000000
|
||||
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
|
||||
#define CONFIG_MISC_INIT_R
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_LAN91C96
|
||||
#define CONFIG_LAN91C96_BASE 0x04000300
|
||||
#define CONFIG_LAN91C96_EXT_PHY
|
||||
|
||||
/*
|
||||
* NS16550 Configuration
|
||||
*/
|
||||
#define CONFIG_SYS_NS16550
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
|
||||
#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
|
||||
#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */
|
||||
|
||||
/*
|
||||
* select serial console configuration
|
||||
*/
|
||||
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 H2 */
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_DHCP
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_SUBNETMASK
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
|
||||
|
||||
#include <configs/omap1510.h>
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp"
|
||||
#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
|
||||
#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
|
||||
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
|
||||
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_SYS_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
|
||||
|
||||
/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
|
||||
* DPLL1. This time is further subdivided by a local divisor.
|
||||
*/
|
||||
#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
|
||||
#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
|
||||
#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Stack sizes
|
||||
*
|
||||
* The stack sizes are set up in start.S using the settings below
|
||||
*/
|
||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
|
||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Physical Memory Map
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
|
||||
#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
|
||||
|
||||
#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
|
||||
#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
|
||||
|
||||
#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned long omap_flash_base; /* set in flash__init */
|
||||
#endif
|
||||
#define CONFIG_SYS_FLASH_BASE omap_flash_base
|
||||
|
||||
#elif defined(CONFIG_CS0_BOOT)
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0
|
||||
|
||||
#else
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1
|
||||
|
||||
#endif
|
||||
|
||||
#define PHYS_SRAM 0x20000000
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization
|
||||
*/
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
|
||||
/* addr of environment */
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
|
||||
|
||||
/* timeout values are in ticks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
@@ -1,202 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2003
|
||||
* Texas Instruments.
|
||||
* Kshitij Gupta <kshitij@ti.com>
|
||||
* Configuation settings for the TI OMAP Innovator board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
|
||||
#define CONFIG_OMAP 1 /* in a TI OMAP core */
|
||||
#define CONFIG_OMAP1610 1 /* which is in a 1610 */
|
||||
#define CONFIG_INNOVATOROMAP1610 1 /* a Innovator Board */
|
||||
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_INNOVATOR
|
||||
|
||||
/* input clock of PLL */
|
||||
/* the OMAP1610 Innovator has 12MHz input clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 12000000
|
||||
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
|
||||
#define CONFIG_MISC_INIT_R
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
/*
|
||||
*/
|
||||
#define CONFIG_LAN91C96
|
||||
#define CONFIG_LAN91C96_BASE 0x04000300
|
||||
#define CONFIG_LAN91C96_EXT_PHY
|
||||
|
||||
/*
|
||||
* NS16550 Configuration
|
||||
*/
|
||||
#define CONFIG_SYS_NS16550
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
|
||||
#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
|
||||
#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
|
||||
|
||||
/*
|
||||
* select serial console configuration
|
||||
*/
|
||||
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 Innovator */
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_DHCP
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_SUBNETMASK
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
|
||||
|
||||
#include <configs/omap1510.h>
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
|
||||
root=/dev/nfs rw nfsroot=157.87.82.48:\
|
||||
/home/a0875451/mwd/myfs/target ip=dhcp"
|
||||
#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
|
||||
#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
|
||||
#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
|
||||
#define CONFIG_BOOTFILE "uImage" /* file to load */
|
||||
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
|
||||
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_SYS_PROMPT "OMAP1610 Innovator # " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
|
||||
|
||||
/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
|
||||
* DPLL1. This time is further subdivided by a local divisor.
|
||||
*/
|
||||
#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
|
||||
#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
|
||||
#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Stack sizes
|
||||
*
|
||||
* The stack sizes are set up in start.S using the settings below
|
||||
*/
|
||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
|
||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Physical Memory Map
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
|
||||
#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
|
||||
|
||||
#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
|
||||
#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
|
||||
|
||||
#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned long omap_flash_base; /* set in flash__init */
|
||||
#endif
|
||||
#define CONFIG_SYS_FLASH_BASE omap_flash_base
|
||||
|
||||
#elif defined(CONFIG_CS0_BOOT)
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0
|
||||
|
||||
#else
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1
|
||||
|
||||
#endif
|
||||
|
||||
#define PHYS_SRAM 0x20000000
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization
|
||||
*/
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
|
||||
/* addr of environment */
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
|
||||
|
||||
/* timeout values are in ticks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
@@ -33,6 +33,8 @@
|
||||
#define CONFIG_IXP425 1 /* This is an IXP425 CPU */
|
||||
#define CONFIG_PDNB3 1 /* on an PDNB3 board */
|
||||
|
||||
#define CONFIG_MACH_TYPE 1002
|
||||
|
||||
#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
|
||||
#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
|
||||
|
||||
|
||||
@@ -27,6 +27,11 @@
|
||||
#include <asm/sizes.h>
|
||||
#include "tegra2-common.h"
|
||||
|
||||
/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */
|
||||
#define CONFIG_DEFAULT_DEVICE_TREE tegra2-seaboard
|
||||
#define CONFIG_OF_CONTROL
|
||||
#define CONFIG_OF_SEPARATE
|
||||
|
||||
/* High-level configuration options */
|
||||
#define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M"
|
||||
#define V_PROMPT "Tegra2 (SeaBoard) # "
|
||||
@@ -54,6 +59,14 @@
|
||||
#define CONFIG_CMD_SF
|
||||
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_TEGRA_I2C
|
||||
#define CONFIG_SYS_I2C_INIT_BOARD
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_MAX_I2C_BUS 4
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_CMD_I2C
|
||||
|
||||
/* SD/MMC */
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
@@ -72,4 +85,11 @@
|
||||
|
||||
#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
|
||||
#define CONFIG_ENV_OFFSET (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
|
||||
|
||||
/* USB Host support */
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_TEGRA
|
||||
#define CONFIG_USB_STORAGE
|
||||
#define CONFIG_CMD_USB
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@@ -84,6 +84,19 @@
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
|
||||
115200}
|
||||
|
||||
/*
|
||||
* This parameter affects a TXFILLTUNING field that controls how much data is
|
||||
* sent to the latency fifo before it is sent to the wire. Without this
|
||||
* parameter, the default (2) causes occasional Data Buffer Errors in OUT
|
||||
* packets depending on the buffer address and size.
|
||||
*/
|
||||
#define CONFIG_USB_EHCI_TXFIFO_THRESH 10
|
||||
#define CONFIG_EHCI_IS_TDI
|
||||
#define CONFIG_EHCI_DCACHE
|
||||
|
||||
/* Total I2C ports on Tegra2 */
|
||||
#define TEGRA_I2C_NUM_CONTROLLERS 4
|
||||
|
||||
/* include default commands */
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
|
||||
@@ -51,4 +51,16 @@
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \
|
||||
"bootcmd=run nandboot\0"
|
||||
|
||||
/* SPL OS boot options */
|
||||
#define CONFIG_CMD_SPL
|
||||
#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
|
||||
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
|
||||
#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
|
||||
0x600000)
|
||||
#define CONFIG_SPL_OS_BOOT
|
||||
#define CONFIG_SPL_OS_BOOT_KEY 55
|
||||
|
||||
#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
|
||||
#define CONFIG_SPL_BOARD_INIT
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@@ -27,6 +27,11 @@
|
||||
#include <asm/sizes.h>
|
||||
#include "tegra2-common.h"
|
||||
|
||||
/* Enable fdt support for Ventana. Flash the image in u-boot-dtb.bin */
|
||||
#define CONFIG_DEFAULT_DEVICE_TREE tegra2-seaboard
|
||||
#define CONFIG_OF_CONTROL
|
||||
#define CONFIG_OF_SEPARATE
|
||||
|
||||
/* High-level configuration options */
|
||||
#define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M"
|
||||
#define V_PROMPT "Tegra2 (Ventana) # "
|
||||
|
||||
@@ -72,7 +72,7 @@
|
||||
* Use gpio 4 pin 25 as chip select for SPI flash
|
||||
* This corresponds to gpio 121
|
||||
*/
|
||||
#define CONFIG_SPI_FLASH_CS (1 | (121 << 8))
|
||||
#define CONFIG_SF_DEFAULT_CS (1 | (121 << 8))
|
||||
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
|
||||
#define CONFIG_SF_DEFAULT_SPEED 25000000
|
||||
|
||||
|
||||
@@ -45,7 +45,8 @@
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \
|
||||
"if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\
|
||||
"then " \
|
||||
"source 0xa0000000; " \
|
||||
"else " \
|
||||
"bootm 0x60000; " \
|
||||
@@ -85,7 +86,8 @@
|
||||
*/
|
||||
#ifdef CONFIG_CMD_MMC
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_PXA_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_PXA_MMC_GENERIC
|
||||
#define CONFIG_SYS_MMC_BASE 0xF0000000
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_EXT2
|
||||
@@ -161,6 +163,12 @@ unsigned char zipitz2_spi_read(void);
|
||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SRAM Map
|
||||
*/
|
||||
#define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */
|
||||
#define PHYS_SRAM_SIZE 0x00040000 /* 256k */
|
||||
|
||||
/*
|
||||
* DRAM Map
|
||||
*/
|
||||
@@ -177,7 +185,7 @@ unsigned char zipitz2_spi_read(void);
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048)
|
||||
|
||||
/*
|
||||
* NOR FLASH
|
||||
|
||||
Reference in New Issue
Block a user