leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

bootm: Align cache flush begin address

Browse Source 
commit b4d956f6bc ("bootm: Align cache flush end address correctly")
aligns the end address of the cache flush operation to a cache-line size to
ensure lower-layers in the code accept the range provided and flush.

A similar action should be taken for the begin address of a cache flush
operation. The load address may not be aligned to a cache-line boundary, so
ensure the passed address is aligned.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reported-by: Breno Matheus Lima <brenomatheus@gmail.com>
Suggested-by: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bryan O'Donoghue 2018-04-15 11:48:17 +01:00 committed by Tom Rini
parent 721881c417
commit bbac9222dc
1 changed files with 7 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
common/bootm.c
View File

@ -434,6 +434,8 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
ulong blob_end = os.end;
ulong image_start = os.image_start;
ulong image_len = os.image_len;
ulong flush_start = ALIGN_DOWN(load, ARCH_DMA_MINALIGN);
ulong flush_len = *load_end - load;
bool no_overlap;
void *load_buf, *image_buf;
int err;
@ -447,7 +449,11 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE);
return err;
}
flush_cache(load, ALIGN(*load_end - load, ARCH_DMA_MINALIGN));
if (flush_start < load)
flush_len += load - flush_start;
flush_cache(flush_start, ALIGN(flush_len, ARCH_DMA_MINALIGN));
debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end);
bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);