From bc2ad9f04dd9d15e7134f7e1b6386d1995772d69 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Sun, 8 Feb 2015 20:06:05 +0100 Subject: [PATCH 001/222] lsxl: use default load addresses for legacy boot The load addresses for the bootcmd_legacy script were taken from the original bootloader from Buffalo. But newer kernels are too big and the uncompressing will overwrite parts of the initial ramdisk. Therefore, we switch to the load addresses which are also used by the other boot script. Signed-off-by: Michael Walle --- include/configs/lsxl.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index a14bfe3a85..6c8e369861 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -127,9 +127,9 @@ "ramdisk_addr=0x01000000\0" \ "fdt_addr=0x01ff0000\0" \ "bootcmd_legacy=ide reset " \ - "&& load ide ${hdpart} 0x00100000 /uImage.buffalo " \ - "&& load ide ${hdpart} 0x00800000 /initrd.buffalo " \ - "&& bootm 0x00100000 0x00800000\0" \ + "&& load ide ${hdpart} ${kernel_addr} /uImage.buffalo " \ + "&& load ide ${hdpart} ${ramdisk_addr} /initrd.buffalo "\ + "&& bootm ${kernel_addr} ${ramdisk_addr}\0" \ "bootcmd_net=bootp ${kernel_addr} uImage " \ "&& tftpboot ${ramdisk_addr} uInitrd " \ "&& tftpboot ${fdt_addr} " CONFIG_FDTFILE " " \ From 145df6fe2a5897cfda0ca2992d0e08cdb9cc0cde Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Sun, 8 Feb 2015 20:06:06 +0100 Subject: [PATCH 002/222] lsxl: place the dtb below the inital ramdisk The dtb was loaded at a memory address after the initial ramdisk. Thus a large ramdisk would overwrite the dtb. Move it to "ramdisk_start - 64k". 64k should be enough for the device tree blob. Also the kernel documentation arm/Booting suggests to put the dtb before the initial ramdisk. Signed-off-by: Michael Walle --- include/configs/lsxl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 6c8e369861..dff90250a0 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -125,7 +125,7 @@ "hdpart=0:1\0" \ "kernel_addr=0x00800000\0" \ "ramdisk_addr=0x01000000\0" \ - "fdt_addr=0x01ff0000\0" \ + "fdt_addr=0x00ff0000\0" \ "bootcmd_legacy=ide reset " \ "&& load ide ${hdpart} ${kernel_addr} /uImage.buffalo " \ "&& load ide ${hdpart} ${ramdisk_addr} /initrd.buffalo "\ From 4fe49d7becc2dfb7288f8b265e0976428b64323c Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Sun, 8 Feb 2015 20:06:07 +0100 Subject: [PATCH 003/222] lsxl: switch from bootm to bootz for boot commands Use the bootz command to load zImages in case of any new boot scripts. Only the legacy one will still use bootm. Apart form the fact, that this will simplify the image generation process, it saves one copy of the kernel image: Common practice is to generate an uImage with a loading address of 0x8000. This uImage contains a compressed zImage, which will unpack the kernel image to the beginning of the RAM. But because there is already the compressed image the uncompressor first relocates the compressed image to a higher location. The load address is encoded into the uImage which is generated by the distributions and thus cannot be easily changed. By using the bootz command we can load the compressed image to a higher memory address and the decompressor doesn't have to reloacte the image. Signed-off-by: Michael Walle --- include/configs/lsxl.h | 34 +++++++++++++++++++++------------- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index dff90250a0..c354c29296 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -56,6 +56,7 @@ * Commands configuration */ #include +#define CONFIG_CMD_BOOTZ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_ENV @@ -78,6 +79,9 @@ */ #include "mv-common.h" +/* loading initramfs images without uimage header */ +#define CONFIG_SUPPORT_RAW_INITRD + /* ST M25P40 */ #undef CONFIG_SPI_FLASH_MACRONIX #define CONFIG_SPI_FLASH_STMICRO @@ -130,22 +134,26 @@ "&& load ide ${hdpart} ${kernel_addr} /uImage.buffalo " \ "&& load ide ${hdpart} ${ramdisk_addr} /initrd.buffalo "\ "&& bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "bootcmd_net=bootp ${kernel_addr} uImage " \ - "&& tftpboot ${ramdisk_addr} uInitrd " \ + "bootcmd_net=bootp ${kernel_addr} vmlinuz " \ + "&& tftpboot ${ramdisk_addr} initrd.img " \ + "&& setenv ramdisk_len ${filesize} " \ "&& tftpboot ${fdt_addr} " CONFIG_FDTFILE " " \ - "&& bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "&& bootz ${kernel_addr} " \ + "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \ "bootcmd_hdd=ide reset " \ - "&& load ide ${hdpart} ${kernel_addr} /uImage " \ - "&& load ide ${hdpart} ${ramdisk_addr} /uInitrd " \ - "&& load ide ${hdpart} ${fdt_addr} " \ - "/" CONFIG_FDTFILE " " \ - "&& bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "&& load ide ${hdpart} ${kernel_addr} /vmlinuz " \ + "&& load ide ${hdpart} ${ramdisk_addr} /initrd.img " \ + "&& setenv ramdisk_len ${filesize} " \ + "&& load ide ${hdpart} ${fdt_addr} /dtb " \ + "&& bootz ${kernel_addr} " \ + "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \ "bootcmd_usb=usb start " \ - "&& load usb 0:1 ${kernel_addr} /uImage " \ - "&& load usb 0:1 ${ramdisk_addr} /uInitrd " \ - "&& load usb 0:1 ${fdt_addr} " \ - "/" CONFIG_FDTFILE " " \ - "&& bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "&& load usb 0:1 ${kernel_addr} /vmlinuz " \ + "&& load usb 0:1 ${ramdisk_addr} /initrd.img " \ + "&& setenv ramdisk_len ${filesize} " \ + "&& load usb 0:1 ${fdt_addr} " CONFIG_FDTFILE " " \ + "&& bootz ${kernel_addr} " \ + "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \ "bootcmd_rescue=run config_nc_dhcp; run nc\0" \ "eraseenv=sf probe 0 " \ "&& sf erase " __stringify(CONFIG_ENV_OFFSET) \ From 9009798df20f60fd53679b537fcb4df3460b7cf8 Mon Sep 17 00:00:00 2001 From: Chris Kuethe Date: Wed, 4 Feb 2015 19:16:14 -0800 Subject: [PATCH 004/222] RSA depends on DM Discovered while experimenting with signature checking on vexpress which doesn't typically use DM. Acked-by: Simon Glass --- Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/Kconfig b/Kconfig index 9af31e3e77..09e2bbe66a 100644 --- a/Kconfig +++ b/Kconfig @@ -118,6 +118,7 @@ config FIT_VERBOSE config FIT_SIGNATURE bool "Enable signature verification of FIT uImages" depends on FIT + depends on DM select RSA help This option enables signature verification of FIT uImages, From b922a5f94d960b0464f81b439c34707071095565 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Tue, 3 Feb 2015 13:18:49 -0600 Subject: [PATCH 005/222] dm: Prevent "demo hello" and "demo status" segfaults Segfaults can occur when a mandatory argument is not provided to "demo hello" and "demo status". Eg: => demo hello Segmentation fault (core dumped) Add a check to ensure all required arguments are provided. Signed-off-by: Peter Tyser Acked-by: Simon Glass --- common/cmd_demo.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/common/cmd_demo.c b/common/cmd_demo.c index bcb34d9045..8a10bdf42a 100644 --- a/common/cmd_demo.c +++ b/common/cmd_demo.c @@ -97,7 +97,9 @@ static int do_demo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ARRAY_SIZE(demo_commands)); argc -= 2; argv += 2; - if (!demo_cmd || argc > demo_cmd->maxargs) + + if ((!demo_cmd || argc > demo_cmd->maxargs) || + ((demo_cmd->name[0] != 'l') && (argc < 1))) return CMD_RET_USAGE; if (argc) { From d895821f4c3c21f034780814cb73842b7219c4f2 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Sat, 31 Jan 2015 14:47:34 +0800 Subject: [PATCH 006/222] gpio: at91: Fix getting address of private data Use dev_get_priv() rather than dev_get_platdata() to get correct address of private data. Signed-off-by: Axel Lin Acked-by: Simon Glass --- drivers/gpio/at91_gpio.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index 6129c020ea..22fbd63098 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -451,7 +451,7 @@ struct at91_port_priv { /* set GPIO pin 'gpio' as an input */ static int at91_gpio_direction_input(struct udevice *dev, unsigned offset) { - struct at91_port_priv *port = dev_get_platdata(dev); + struct at91_port_priv *port = dev_get_priv(dev); at91_set_port_input(port->regs, offset, 0); @@ -462,7 +462,7 @@ static int at91_gpio_direction_input(struct udevice *dev, unsigned offset) static int at91_gpio_direction_output(struct udevice *dev, unsigned offset, int value) { - struct at91_port_priv *port = dev_get_platdata(dev); + struct at91_port_priv *port = dev_get_priv(dev); at91_set_port_output(port->regs, offset, value); @@ -472,7 +472,7 @@ static int at91_gpio_direction_output(struct udevice *dev, unsigned offset, /* read GPIO IN value of pin 'gpio' */ static int at91_gpio_get_value(struct udevice *dev, unsigned offset) { - struct at91_port_priv *port = dev_get_platdata(dev); + struct at91_port_priv *port = dev_get_priv(dev); return at91_get_port_value(port->regs, offset); } @@ -481,7 +481,7 @@ static int at91_gpio_get_value(struct udevice *dev, unsigned offset) static int at91_gpio_set_value(struct udevice *dev, unsigned offset, int value) { - struct at91_port_priv *port = dev_get_platdata(dev); + struct at91_port_priv *port = dev_get_priv(dev); at91_set_port_value(port->regs, offset, value); @@ -490,7 +490,7 @@ static int at91_gpio_set_value(struct udevice *dev, unsigned offset, static int at91_gpio_get_function(struct udevice *dev, unsigned offset) { - struct at91_port_priv *port = dev_get_platdata(dev); + struct at91_port_priv *port = dev_get_priv(dev); /* GPIOF_FUNC is not implemented yet */ if (at91_get_port_output(port->regs, offset)) From 26c0472cb07bc23e21fc8148565f7f2be746a8a0 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Sat, 31 Jan 2015 22:23:38 +0800 Subject: [PATCH 007/222] gpio: omap: Pass correct argument to _get_gpio_direction() Pass bank rather than bank->base to _get_gpio_direction(). Signed-off-by: Axel Lin Acked-by: Simon Glass --- drivers/gpio/omap_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index f3a7ccb51e..19fc451079 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -291,7 +291,7 @@ static int omap_gpio_get_function(struct udevice *dev, unsigned offset) struct gpio_bank *bank = dev_get_priv(dev); /* GPIOF_FUNC is not implemented yet */ - if (_get_gpio_direction(bank->base, offset) == OMAP_GPIO_DIR_OUT) + if (_get_gpio_direction(bank, offset) == OMAP_GPIO_DIR_OUT) return GPIOF_OUTPUT; else return GPIOF_INPUT; From a3e757a5d295329b504123f0995b35cf694c7613 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Tue, 27 Jan 2015 13:36:35 +0100 Subject: [PATCH 008/222] i2c: s3c24x0: reduce transmission status timeout If no device is connected to I2C bus, the i2c probe command can take a lot of time for probe each address. This commit reduces the busy timeout to 10ms for standard and high speed modes. This doesn't break the transmission an also allow for properly probe the devices. Signed-off-by: Przemyslaw Marczak Changes v3: - new commit, after split the next one Tested-by: Simon Glass --- drivers/i2c/s3c24x0_i2c.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c index 0dd1abcf80..b4ee33f7da 100644 --- a/drivers/i2c/s3c24x0_i2c.c +++ b/drivers/i2c/s3c24x0_i2c.c @@ -112,9 +112,9 @@ #define I2C_START_STOP 0x20 /* START / STOP */ #define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */ -#define I2C_TIMEOUT_MS 1000 /* 1 second */ +#define I2C_TIMEOUT_MS 10 /* 10 ms */ -#define HSI2C_TIMEOUT_US 100000 /* 100 ms, finer granularity */ +#define HSI2C_TIMEOUT_US 10000 /* 10 ms, finer granularity */ /* To support VCMA9 boards and other who dont define max_i2c_num */ From 2c8571703a3aacfb09defc35c42c6250a6746d58 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 4 Feb 2015 13:05:50 +0100 Subject: [PATCH 009/222] malloc_simple: Return NULL on malloc failure rather then calling panic() All callers of malloc should already do error checking, and may even be able to continue without the alloc succeeding. Moreover, common/malloc_simple.c is the only user of .rodata.str1.1 in common/built-in.o when building the SPL, triggering this gcc bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303 Causing .rodata to grow with e.g. 0xc21 bytes, nullifying all benefits of using malloc_simple in the first place. Signed-off-by: Hans de Goede Acked-by: Simon Glass --- common/malloc_simple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/malloc_simple.c b/common/malloc_simple.c index afdacff80d..64ae0365af 100644 --- a/common/malloc_simple.c +++ b/common/malloc_simple.c @@ -19,7 +19,7 @@ void *malloc_simple(size_t bytes) new_ptr = gd->malloc_ptr + bytes; if (new_ptr > gd->malloc_limit) - panic("Out of pre-reloc memory"); + return NULL; ptr = map_sysmem(gd->malloc_base + gd->malloc_ptr, bytes); gd->malloc_ptr = ALIGN(new_ptr, sizeof(new_ptr)); return ptr; From 74d0186766a3899d3838286dcdb40fd6bdcbd49a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:34 -0700 Subject: [PATCH 010/222] Introduce board_init_f_mem() to handle early memory layout At present on some architectures we set up the following before calling board_init_f(): - global_data - stack - early malloc memory Adding the code to support early malloc and global data setup to every arch's assembler start-up is a pain. Also this code is not actually architecture-specific. We can use common code for all architectures and with a bit of care we can write this code in C. Add a new function to deal with this. It should be called after memory is available, with a pointer to the top of the area that should be used before relocation. The function will set things up and return the lowest memory address that it allocated/used. That can then be set as the top of the stack. Note that on some archs this function will use the stack, so the stack pointer should be set to same value as is pased to board_init_f_mem(). A margin of 128 bytes will be left for this stack, so that it is not overwritten. This means that 64 bytes is wasted by this early call. This is not strictly necessary on several more modern archs, so we could remove this at the cost of some arch-dependent code. With this function there is no-longer any need for the assembler code to zero global_data or set up the early malloc pointers. Signed-off-by: Simon Glass --- common/board_f.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/common/board_f.c b/common/board_f.c index bdad36b260..2c10215a17 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -1075,4 +1075,22 @@ void board_init_f_r(void) /* NOTREACHED - board_init_r() does not return */ hang(); } +#else +ulong board_init_f_mem(ulong top) +{ + /* Leave space for the stack we are running with now */ + top -= 0x40; + + top -= sizeof(struct global_data); + top = ALIGN(top, 16); + gd = (struct global_data *)top; + memset((void *)gd, '\0', sizeof(*gd)); + +#ifdef CONFIG_SYS_MALLOC_F_LEN + top -= CONFIG_SYS_MALLOC_F_LEN; + gd->malloc_base = top; +#endif + + return top; +} #endif /* CONFIG_X86 */ From c1c615735f5f3348a9df0623e366c7182506aebd Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:35 -0700 Subject: [PATCH 011/222] powerpc: Permit device tree control of U-Boot (CONFIG_OF_CONTROL) Enable this in the Kconfig so that PowerPC boards can use device tree to configure U-Boot. Signed-off-by: Simon Glass --- arch/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/Kconfig b/arch/Kconfig index 132123bcaf..3d419bca3e 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -40,6 +40,7 @@ config OPENRISC config PPC bool "PowerPC architecture" select HAVE_PRIVATE_LIBGCC + select SUPPORT_OF_CONTROL config SANDBOX bool "Sandbox" From 0bca284b1795942ac8fdd1646f04f49e478f0bcc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:36 -0700 Subject: [PATCH 012/222] powerpc: ppc4xx: canyonlands: config: Tidy up CONFIGs and config.mk Many CONFIG options have an unnecessary value of 1. CONFIG_440 is set in the various board config files. Also simplify the CONFIG_440 check in config.mk Signed-off-by: Simon Glass --- arch/powerpc/cpu/ppc4xx/config.mk | 5 +---- board/amcc/canyonlands/config.mk | 2 -- include/configs/canyonlands.h | 34 +++++++++++++++---------------- 3 files changed, 18 insertions(+), 23 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/config.mk b/arch/powerpc/cpu/ppc4xx/config.mk index f87c9dc49b..9cb41bb3b5 100644 --- a/arch/powerpc/cpu/ppc4xx/config.mk +++ b/arch/powerpc/cpu/ppc4xx/config.mk @@ -7,10 +7,7 @@ PLATFORM_CPPFLAGS += -mstring -msoft-float -cfg=$(srctree)/include/configs/$(CONFIG_SYS_CONFIG_NAME:"%"=%).h -is440:=$(shell grep CONFIG_440 $(cfg)) - -ifneq (,$(findstring CONFIG_440,$(is440))) +ifneq (,$(CONFIG_440)) PLATFORM_CPPFLAGS += -Wa,-m440 -mcpu=440 else PLATFORM_CPPFLAGS += -Wa,-m405 -mcpu=405 diff --git a/board/amcc/canyonlands/config.mk b/board/amcc/canyonlands/config.mk index 63b8973700..5cc90d2050 100644 --- a/board/amcc/canyonlands/config.mk +++ b/board/amcc/canyonlands/config.mk @@ -8,8 +8,6 @@ # AMCC 460EX/460GT Evaluation Board (Canyonlands) board # -PLATFORM_CPPFLAGS += -DCONFIG_440=1 - ifeq ($(debug),1) PLATFORM_CPPFLAGS += -DDEBUG endif diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 8eeb15c0e1..7b1f368375 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -19,10 +19,10 @@ * and Arches dual (460GT) */ #ifdef CONFIG_CANYONLANDS -#define CONFIG_460EX 1 /* Specific PPC460EX */ +#define CONFIG_460EX /* Specific PPC460EX */ #define CONFIG_HOSTNAME canyonlands #else -#define CONFIG_460GT 1 /* Specific PPC460GT */ +#define CONFIG_460GT /* Specific PPC460GT */ #ifdef CONFIG_GLACIER #define CONFIG_HOSTNAME glacier #else @@ -32,7 +32,7 @@ #endif #endif -#define CONFIG_440 1 +#define CONFIG_440 #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFFF80000 @@ -45,10 +45,10 @@ #define CONFIG_SYS_CLK_FREQ 66666667 /* external freq to pll */ -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ -#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */ -#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ -#define CONFIG_BOARD_TYPES 1 /* support board types */ +#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* Call board_early_init_r */ +#define CONFIG_MISC_INIT_R /* Call misc_init_r */ +#define CONFIG_BOARD_TYPES /* support board types */ /*----------------------------------------------------------------------- * Base addresses -- Note these are effective addresses where the @@ -134,7 +134,7 @@ *----------------------------------------------------------------------*/ #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ +#define CONFIG_SYS_FLASH_CFI_AMD_RESET /* Use AMD (Spansion) reset cmd */ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ @@ -172,9 +172,9 @@ * I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot * code. */ -#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ +#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */ #define SPD_EEPROM_ADDRESS {0x50, 0x51} /* SPD i2c spd addresses*/ -#define CONFIG_DDR_ECC 1 /* with ECC support */ +#define CONFIG_DDR_ECC /* with ECC support */ #define CONFIG_DDR_RQDC_FIXED 0x80000038 /* fixed value for RQDC */ #else /* defined(CONFIG_ARCHES) */ @@ -262,8 +262,8 @@ #define CONFIG_4xx_CONFIG_BLOCKSIZE 16 /* I2C SYSMON (LM75, AD7414 is almost compatible) */ -#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ -#define CONFIG_DTT_AD7414 1 /* use AD7414 */ +#define CONFIG_DTT_LM75 /* ON Semi's LM75 */ +#define CONFIG_DTT_AD7414 /* use AD7414 */ #define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ #define CONFIG_SYS_DTT_MAX_TEMP 70 #define CONFIG_SYS_DTT_LOW_TEMP -30 @@ -275,14 +275,14 @@ #if !defined(CONFIG_ARCHES) /* RTC configuration */ -#define CONFIG_RTC_M41T62 1 +#define CONFIG_RTC_M41T62 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 #endif /*----------------------------------------------------------------------- * Ethernet *----------------------------------------------------------------------*/ -#define CONFIG_IBM_EMAC4_V4 1 +#define CONFIG_IBM_EMAC4_V4 #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 @@ -322,9 +322,9 @@ #define CONFIG_GPCS_PHY2_ADDR 0xC #endif /* !defined(CONFIG_ARCHES) */ -#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_PHY_DYNAMIC_ANEG 1 +#define CONFIG_PHY_RESET /* reset phy upon startup */ +#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ +#define CONFIG_PHY_DYNAMIC_ANEG /*----------------------------------------------------------------------- * USB-OHCI From 6566041c0bf9523becf5292e45a0f5c3686ebdd4 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:37 -0700 Subject: [PATCH 013/222] powerpc: ppc4xx: Move CANYONLANDS/GLACIER/ARCHES to Kconfig Move these options to Kconfig and remove them from the CONFIG files. Signed-off-by: Simon Glass --- board/amcc/canyonlands/Kconfig | 20 ++++++++++++++++++++ configs/arches_defconfig | 2 +- configs/canyonlands_defconfig | 2 +- configs/glacier_defconfig | 2 +- include/configs/canyonlands.h | 2 ++ 5 files changed, 25 insertions(+), 3 deletions(-) diff --git a/board/amcc/canyonlands/Kconfig b/board/amcc/canyonlands/Kconfig index 530a6efd60..0fc687739c 100644 --- a/board/amcc/canyonlands/Kconfig +++ b/board/amcc/canyonlands/Kconfig @@ -9,4 +9,24 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "canyonlands" +choice BOARD_TYPE + prompt "Select which board to build for" + +config CANYONLANDS + bool "Glacier" + help + Select this to build for the Canyonlands 460EX board. + +config GLACIER + bool "Glacier" + help + Select this to build for the Glacier 460GT board. + +config ARCHES + bool "Arches" + help + Select this to build for the Arches dual 460GT board. + +endchoice + endif diff --git a/configs/arches_defconfig b/configs/arches_defconfig index 18d0a140da..60e6ef9098 100644 --- a/configs/arches_defconfig +++ b/configs/arches_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS="ARCHES" CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y +CONFIG_ARCHES=y diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig index 09b9ab9330..37a2b4d796 100644 --- a/configs/canyonlands_defconfig +++ b/configs/canyonlands_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS="CANYONLANDS" CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y +CONFIG_CANYONLANDS=y diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig index 2a66bfb08c..436b9f8d03 100644 --- a/configs/glacier_defconfig +++ b/configs/glacier_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS="GLACIER" CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y +CONFIG_GLACIER=y diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 7b1f368375..ed790ccaf3 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -11,6 +11,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include + /*----------------------------------------------------------------------- * High Level Configuration Options *----------------------------------------------------------------------*/ From 00cca639d56e791e5bea16b0e77d9540651132fe Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:38 -0700 Subject: [PATCH 014/222] powerpc: ppc4xx: Add ramboot config for glacier Add a new ramboot config for glacier so that it is possible to test U-Boot loaded over Ethernet instead of using JTAG. Signed-off-by: Simon Glass --- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 8 +++ board/amcc/canyonlands/MAINTAINERS | 1 + board/amcc/canyonlands/u-boot-ram.lds | 79 ++++++++++++++++++++++++++ configs/glacier_ramboot_defconfig | 5 ++ 4 files changed, 93 insertions(+) create mode 100644 board/amcc/canyonlands/u-boot-ram.lds create mode 100644 configs/glacier_ramboot_defconfig diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index 71bb9d776f..7202c3fc46 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -424,6 +424,14 @@ phys_size_t initdram(int board_type) int write_recovery; phys_size_t dram_size = 0; + if (IS_ENABLED(CONFIG_SYS_RAMBOOT)) { + /* + * Reduce RAM size to avoid overwriting memory used by + * current stack? Not sure what is happening. + */ + return sdram_memsize() / 2; + } + num_dimm_banks = sizeof(iic0_dimm_addr); /*------------------------------------------------------------------ diff --git a/board/amcc/canyonlands/MAINTAINERS b/board/amcc/canyonlands/MAINTAINERS index 52bf004f6c..8be8a52a3a 100644 --- a/board/amcc/canyonlands/MAINTAINERS +++ b/board/amcc/canyonlands/MAINTAINERS @@ -6,3 +6,4 @@ F: include/configs/canyonlands.h F: configs/arches_defconfig F: configs/canyonlands_defconfig F: configs/glacier_defconfig +F: configs/glacier_ramboot_defconfig diff --git a/board/amcc/canyonlands/u-boot-ram.lds b/board/amcc/canyonlands/u-boot-ram.lds new file mode 100644 index 0000000000..67652569f4 --- /dev/null +++ b/board/amcc/canyonlands/u-boot-ram.lds @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2009 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_ARCH(powerpc) +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .text : + { + arch/powerpc/cpu/ppc4xx/start.o (.text*) + board/amcc/canyonlands/init.o (.text*) + + *(.text*) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + KEEP(*(.got)) + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data*) + *(.sdata*) + } + _edata = .; + PROVIDE (edata = .); + + . = .; + + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.bss*) + *(.sbss*) + *(COMMON) + . = ALIGN(4); + } + + __bss_end = . ; + PROVIDE (end = .); +} diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig new file mode 100644 index 0000000000..4fc23038e8 --- /dev/null +++ b/configs/glacier_ramboot_defconfig @@ -0,0 +1,5 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/canyonlands/u-boot-ram.lds" +CONFIG_PPC=y +CONFIG_4xx=y +CONFIG_TARGET_CANYONLANDS=y +CONFIG_GLACIER=y From 1d60f2b9860d3ba3563718d479a455495197f00d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:39 -0700 Subject: [PATCH 015/222] powerpc: ppc4xx: canyonlands: Move to generic board Switch to generic board so that this board will not be broken/removed. Signed-off-by: Simon Glass --- arch/powerpc/cpu/ppc4xx/cpu_init.c | 2 ++ include/configs/canyonlands.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c index e5a0e21e36..5f5c72002e 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu_init.c +++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c @@ -450,10 +450,12 @@ cpu_init_f (void) PLB4Ax_ACR_RDP_4DEEP); #endif /* CONFIG_440SP/SPE || CONFIG_460EX/GT || CONFIG_405EX */ +#ifndef CONFIG_SYS_GENERIC_BOARD gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); /* Clear initial global data */ memset((void *)gd, 0, sizeof(gd_t)); +#endif } /* diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index ed790ccaf3..7a1499d2e3 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -13,6 +13,8 @@ #include +#define CONFIG_SYS_GENERIC_BOARD + /*----------------------------------------------------------------------- * High Level Configuration Options *----------------------------------------------------------------------*/ From 281aea45f8a237a1072116d4910cd86f4586f24b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:41 -0700 Subject: [PATCH 016/222] powerpc: ppc4xx: dts: Bring in canyonlands device tree files The canyonlands.h config file works with canyonlands, glacier and arches boards. Bring in the device tree files for these from Linux 3.17. Signed-off-by: Simon Glass --- arch/powerpc/dts/Makefile | 11 + arch/powerpc/dts/arches.dts | 339 ++++++++++++++++++ arch/powerpc/dts/canyonlands.dts | 555 +++++++++++++++++++++++++++++ arch/powerpc/dts/glacier.dts | 579 +++++++++++++++++++++++++++++++ 4 files changed, 1484 insertions(+) create mode 100644 arch/powerpc/dts/Makefile create mode 100644 arch/powerpc/dts/arches.dts create mode 100644 arch/powerpc/dts/canyonlands.dts create mode 100644 arch/powerpc/dts/glacier.dts diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile new file mode 100644 index 0000000000..ad104b9315 --- /dev/null +++ b/arch/powerpc/dts/Makefile @@ -0,0 +1,11 @@ +dtb-$(CONFIG_TARGET_CANYONLANDS) += arches.dtb canyonlands.dtb glacier.dtb + +targets += $(dtb-y) + +DTC_FLAGS += -R 4 -p 0x1000 + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb diff --git a/arch/powerpc/dts/arches.dts b/arch/powerpc/dts/arches.dts new file mode 100644 index 0000000000..bd5ebfde2b --- /dev/null +++ b/arch/powerpc/dts/arches.dts @@ -0,0 +1,339 @@ +/* + * Device Tree Source for AMCC Arches (dual 460GT board) + * + * (C) Copyright 2008 Applied Micro Circuits Corporation + * Victor Gallardo + * Adam Graham + * + * Based on the glacier.dts file + * Stefan Roese + * Copyright 2008 DENX Software Engineering + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "amcc,arches"; + compatible = "amcc,arches"; + dcr-parent = <&{/cpus/cpu@0}>; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + ethernet2 = &EMAC2; + serial0 = &UART0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,460GT"; + reg = <0x00000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + timebase-frequency = <0>; /* Filled in by U-Boot */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; + dcr-controller; + dcr-access-method = "native"; + next-level-cache = <&L2C0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0x0c0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0x0d0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC2: interrupt-controller2 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <2>; + dcr-reg = <0x0e0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC3: interrupt-controller3 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <3>; + dcr-reg = <0x0f0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + SDR0: sdr { + compatible = "ibm,sdr-460gt"; + dcr-reg = <0x00e 0x002>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-460gt"; + dcr-reg = <0x00c 0x002>; + }; + + L2C0: l2c { + compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; + dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ + 0x030 0x008>; /* L2 cache DCR's */ + cache-line-size = <32>; /* 32 bytes */ + cache-size = <262144>; /* L2, 256K */ + interrupt-parent = <&UIC1>; + interrupts = <11 1>; + }; + + plb { + compatible = "ibm,plb-460gt", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by U-Boot */ + + SDRAM0: sdram { + compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; + dcr-reg = <0x010 0x002>; + }; + + CRYPTO: crypto@180000 { + compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto"; + reg = <4 0x00180000 0x80400>; + interrupt-parent = <&UIC0>; + interrupts = <0x1d 0x4>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; + dcr-reg = <0x180 0x062>; + num-tx-chans = <3>; + num-rx-chans = <24>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-parent = <&UIC2>; + interrupts = < /*TXEOB*/ 0x6 0x4 + /*RXEOB*/ 0x7 0x4 + /*SERR*/ 0x3 0x4 + /*TXDE*/ 0x4 0x4 + /*RXDE*/ 0x5 0x4>; + desc-base-addr-high = <0x8>; + }; + + POB0: opb { + compatible = "ibm,opb-460gt", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + + EBC0: ebc { + compatible = "ibm,ebc-460gt", "ibm,ebc"; + dcr-reg = <0x012 0x002>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by U-Boot */ + /* ranges property is supplied by U-Boot */ + interrupts = <0x6 0x4>; + interrupt-parent = <&UIC1>; + + nor_flash@0,0 { + compatible = "amd,s29gl256n", "cfi-flash"; + bank-width = <2>; + reg = <0x00000000 0x00000000 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "kernel"; + reg = <0x00000000 0x001e0000>; + }; + partition@1e0000 { + label = "dtb"; + reg = <0x001e0000 0x00020000>; + }; + partition@200000 { + label = "root"; + reg = <0x00200000 0x00200000>; + }; + partition@400000 { + label = "user"; + reg = <0x00400000 0x01b60000>; + }; + partition@1f60000 { + label = "env"; + reg = <0x01f60000 0x00040000>; + }; + partition@1fa0000 { + label = "u-boot"; + reg = <0x01fa0000 0x00060000>; + }; + }; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <0x1 0x4>; + }; + + IIC0: i2c@ef600700 { + compatible = "ibm,iic-460gt", "ibm,iic"; + reg = <0xef600700 0x00000014>; + interrupt-parent = <&UIC0>; + interrupts = <0x2 0x4>; + #address-cells = <1>; + #size-cells = <0>; + sttm@4a { + compatible = "ad,ad7414"; + reg = <0x4a>; + interrupt-parent = <&UIC1>; + interrupts = <0x0 0x8>; + }; + }; + + IIC1: i2c@ef600800 { + compatible = "ibm,iic-460gt", "ibm,iic"; + reg = <0xef600800 0x00000014>; + interrupt-parent = <&UIC0>; + interrupts = <0x3 0x4>; + }; + + TAH0: emac-tah@ef601350 { + compatible = "ibm,tah-460gt", "ibm,tah"; + reg = <0xef601350 0x00000030>; + }; + + TAH1: emac-tah@ef601450 { + compatible = "ibm,tah-460gt", "ibm,tah"; + reg = <0xef601450 0x00000030>; + }; + + EMAC0: ethernet@ef600e00 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4sync"; + interrupt-parent = <&EMAC0>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef600e00 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + phy-mode = "sgmii"; + phy-map = <0xffffffff>; + gpcs-address = <0x0000000a>; + tah-device = <&TAH0>; + tah-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + }; + + EMAC1: ethernet@ef600f00 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4sync"; + interrupt-parent = <&EMAC1>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef600f00 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <1>; + mal-rx-channel = <8>; + cell-index = <1>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + phy-mode = "sgmii"; + phy-map = <0x00000000>; + gpcs-address = <0x0000000b>; + tah-device = <&TAH1>; + tah-channel = <1>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + + EMAC2: ethernet@ef601100 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4sync"; + interrupt-parent = <&EMAC2>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef601100 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <2>; + mal-rx-channel = <16>; + cell-index = <2>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + tx-fifo-size-gige = <16384>; /* emac2&3 only */ + phy-mode = "sgmii"; + phy-map = <0x00000001>; + gpcs-address = <0x0000000C>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + }; + }; +}; diff --git a/arch/powerpc/dts/canyonlands.dts b/arch/powerpc/dts/canyonlands.dts new file mode 100644 index 0000000000..2ec9762e48 --- /dev/null +++ b/arch/powerpc/dts/canyonlands.dts @@ -0,0 +1,555 @@ +/* + * Device Tree Source for AMCC Canyonlands (460EX) + * + * Copyright 2008-2009 DENX Software Engineering, Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "amcc,canyonlands"; + compatible = "amcc,canyonlands"; + dcr-parent = <&{/cpus/cpu@0}>; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + serial0 = &UART0; + serial1 = &UART1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,460EX"; + reg = <0x00000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + timebase-frequency = <0>; /* Filled in by U-Boot */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; + dcr-controller; + dcr-access-method = "native"; + next-level-cache = <&L2C0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0x0c0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0x0d0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC2: interrupt-controller2 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <2>; + dcr-reg = <0x0e0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC3: interrupt-controller3 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <3>; + dcr-reg = <0x0f0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + SDR0: sdr { + compatible = "ibm,sdr-460ex"; + dcr-reg = <0x00e 0x002>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-460ex"; + dcr-reg = <0x00c 0x002>; + }; + + CPM0: cpm { + compatible = "ibm,cpm"; + dcr-access-method = "native"; + dcr-reg = <0x160 0x003>; + unused-units = <0x00000100>; + idle-doze = <0x02000000>; + standby = <0xfeff791d>; + }; + + L2C0: l2c { + compatible = "ibm,l2-cache-460ex", "ibm,l2-cache"; + dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ + 0x030 0x008>; /* L2 cache DCR's */ + cache-line-size = <32>; /* 32 bytes */ + cache-size = <262144>; /* L2, 256K */ + interrupt-parent = <&UIC1>; + interrupts = <11 1>; + }; + + plb { + compatible = "ibm,plb-460ex", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by U-Boot */ + + SDRAM0: sdram { + compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; + dcr-reg = <0x010 0x002>; + }; + + CRYPTO: crypto@180000 { + compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; + reg = <4 0x00180000 0x80400>; + interrupt-parent = <&UIC0>; + interrupts = <0x1d 0x4>; + }; + + HWRNG: hwrng@110000 { + compatible = "amcc,ppc460ex-rng", "ppc4xx-rng"; + reg = <4 0x00110000 0x50>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; + dcr-reg = <0x180 0x062>; + num-tx-chans = <2>; + num-rx-chans = <16>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-parent = <&UIC2>; + interrupts = < /*TXEOB*/ 0x6 0x4 + /*RXEOB*/ 0x7 0x4 + /*SERR*/ 0x3 0x4 + /*TXDE*/ 0x4 0x4 + /*RXDE*/ 0x5 0x4>; + }; + + USB0: ehci@bffd0400 { + compatible = "ibm,usb-ehci-460ex", "usb-ehci"; + interrupt-parent = <&UIC2>; + interrupts = <0x1d 4>; + reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>; + }; + + USB1: usb@bffd0000 { + compatible = "ohci-le"; + reg = <4 0xbffd0000 0x60>; + interrupt-parent = <&UIC2>; + interrupts = <0x1e 4>; + }; + + USBOTG0: usbotg@bff80000 { + compatible = "amcc,dwc-otg"; + reg = <0x4 0xbff80000 0x10000>; + interrupt-parent = <&USBOTG0>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupts = <0x0 0x1 0x2>; + interrupt-map = ; + }; + + SATA0: sata@bffd1000 { + compatible = "amcc,sata-460ex"; + reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>; + interrupt-parent = <&UIC3>; + interrupts = <0x0 0x4 /* SATA */ + 0x5 0x4>; /* AHBDMA */ + }; + + POB0: opb { + compatible = "ibm,opb-460ex", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + + EBC0: ebc { + compatible = "ibm,ebc-460ex", "ibm,ebc"; + dcr-reg = <0x012 0x002>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by U-Boot */ + /* ranges property is supplied by U-Boot */ + interrupts = <0x6 0x4>; + interrupt-parent = <&UIC1>; + + nor_flash@0,0 { + compatible = "amd,s29gl512n", "cfi-flash"; + bank-width = <2>; + reg = <0x00000000 0x00000000 0x04000000>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "kernel"; + reg = <0x00000000 0x001e0000>; + }; + partition@1e0000 { + label = "dtb"; + reg = <0x001e0000 0x00020000>; + }; + partition@200000 { + label = "ramdisk"; + reg = <0x00200000 0x01400000>; + }; + partition@1600000 { + label = "jffs2"; + reg = <0x01600000 0x00400000>; + }; + partition@1a00000 { + label = "user"; + reg = <0x01a00000 0x02560000>; + }; + partition@3f60000 { + label = "env"; + reg = <0x03f60000 0x00040000>; + }; + partition@3fa0000 { + label = "u-boot"; + reg = <0x03fa0000 0x00060000>; + }; + }; + + cpld@2,0 { + compatible = "amcc,ppc460ex-bcsr"; + reg = <2 0x0 0x9>; + }; + + ndfc@3,0 { + compatible = "ibm,ndfc"; + reg = <0x00000003 0x00000000 0x00002000>; + ccr = <0x00001000>; + bank-settings = <0x80002222>; + #address-cells = <1>; + #size-cells = <1>; + + nand { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + }; + partition@100000 { + label = "user"; + reg = <0x00000000 0x03f00000>; + }; + }; + }; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <0x1 0x4>; + }; + + UART1: serial@ef600400 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC0>; + interrupts = <0x1 0x4>; + }; + + IIC0: i2c@ef600700 { + compatible = "ibm,iic-460ex", "ibm,iic"; + reg = <0xef600700 0x00000014>; + interrupt-parent = <&UIC0>; + interrupts = <0x2 0x4>; + #address-cells = <1>; + #size-cells = <0>; + rtc@68 { + compatible = "stm,m41t80"; + reg = <0x68>; + interrupt-parent = <&UIC2>; + interrupts = <0x19 0x8>; + }; + sttm@48 { + compatible = "ad,ad7414"; + reg = <0x48>; + interrupt-parent = <&UIC1>; + interrupts = <0x14 0x8>; + }; + }; + + IIC1: i2c@ef600800 { + compatible = "ibm,iic-460ex", "ibm,iic"; + reg = <0xef600800 0x00000014>; + interrupt-parent = <&UIC0>; + interrupts = <0x3 0x4>; + }; + + GPIO0: gpio@ef600b00 { + compatible = "ibm,ppc4xx-gpio"; + reg = <0xef600b00 0x00000048>; + gpio-controller; + }; + + ZMII0: emac-zmii@ef600d00 { + compatible = "ibm,zmii-460ex", "ibm,zmii"; + reg = <0xef600d00 0x0000000c>; + }; + + RGMII0: emac-rgmii@ef601500 { + compatible = "ibm,rgmii-460ex", "ibm,rgmii"; + reg = <0xef601500 0x00000008>; + has-mdio; + }; + + TAH0: emac-tah@ef601350 { + compatible = "ibm,tah-460ex", "ibm,tah"; + reg = <0xef601350 0x00000030>; + }; + + TAH1: emac-tah@ef601450 { + compatible = "ibm,tah-460ex", "ibm,tah"; + reg = <0xef601450 0x00000030>; + }; + + EMAC0: ethernet@ef600e00 { + device_type = "network"; + compatible = "ibm,emac-460ex", "ibm,emac4sync"; + interrupt-parent = <&EMAC0>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef600e00 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + phy-mode = "rgmii"; + phy-map = <0x00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <0>; + tah-device = <&TAH0>; + tah-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + }; + + EMAC1: ethernet@ef600f00 { + device_type = "network"; + compatible = "ibm,emac-460ex", "ibm,emac4sync"; + interrupt-parent = <&EMAC1>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef600f00 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <1>; + mal-rx-channel = <8>; + cell-index = <1>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + phy-mode = "rgmii"; + phy-map = <0x00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <1>; + tah-device = <&TAH1>; + tah-channel = <1>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + }; + + PCIX0: pci@c0ec00000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix"; + primary; + large-inbound-windows; + enable-msi-hole; + reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ + 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ + 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ + 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ + 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 + 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000 + 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; + + /* This drives busses 0 to 0x3f */ + bus-range = <0x0 0x3f>; + + /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ + interrupt-map-mask = <0x0 0x0 0x0 0x0>; + interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; + }; + + PCIE0: pciex@d00000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <0x0>; /* port number */ + reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ + 0x0000000c 0x08010000 0x00001000>; /* Registers */ + dcr-reg = <0x100 0x020>; + sdr-base = <0x300>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 + 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; + + /* This drives busses 40 to 0x7f */ + bus-range = <0x40 0x7f>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = < + 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; + }; + + PCIE1: pciex@d20000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <0x1>; /* port number */ + reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ + 0x0000000c 0x08011000 0x00001000>; /* Registers */ + dcr-reg = <0x120 0x020>; + sdr-base = <0x340>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 + 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; + + /* This drives busses 80 to 0xbf */ + bus-range = <0x80 0xbf>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = < + 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; + }; + + MSI: ppc4xx-msi@C10000000 { + compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; + reg = < 0xC 0x10000000 0x100>; + sdr-base = <0x36C>; + msi-data = <0x00000000>; + msi-mask = <0x44440000>; + interrupt-count = <3>; + interrupts = <0 1 2 3>; + interrupt-parent = <&UIC3>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0 &UIC3 0x18 1 + 1 &UIC3 0x19 1 + 2 &UIC3 0x1A 1 + 3 &UIC3 0x1B 1>; + }; + }; +}; diff --git a/arch/powerpc/dts/glacier.dts b/arch/powerpc/dts/glacier.dts new file mode 100644 index 0000000000..3e7ce2c9e6 --- /dev/null +++ b/arch/powerpc/dts/glacier.dts @@ -0,0 +1,579 @@ +/* + * Device Tree Source for AMCC Glacier (460GT) + * + * Copyright 2008-2010 DENX Software Engineering, Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "amcc,glacier"; + compatible = "amcc,glacier"; + dcr-parent = <&{/cpus/cpu@0}>; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + ethernet2 = &EMAC2; + ethernet3 = &EMAC3; + serial0 = &UART0; + serial1 = &UART1; + }; + + chosen { + stdout-path = &UART0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,460GT"; + reg = <0x00000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + timebase-frequency = <0>; /* Filled in by U-Boot */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; + dcr-controller; + dcr-access-method = "native"; + next-level-cache = <&L2C0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0x0c0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0x0d0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC2: interrupt-controller2 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <2>; + dcr-reg = <0x0e0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC3: interrupt-controller3 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <3>; + dcr-reg = <0x0f0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + SDR0: sdr { + compatible = "ibm,sdr-460gt"; + dcr-reg = <0x00e 0x002>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-460gt"; + dcr-reg = <0x00c 0x002>; + }; + + L2C0: l2c { + compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; + dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ + 0x030 0x008>; /* L2 cache DCR's */ + cache-line-size = <32>; /* 32 bytes */ + cache-size = <262144>; /* L2, 256K */ + interrupt-parent = <&UIC1>; + interrupts = <11 1>; + }; + + plb { + compatible = "ibm,plb-460gt", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by U-Boot */ + + SDRAM0: sdram { + compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; + dcr-reg = <0x010 0x002>; + }; + + CRYPTO: crypto@180000 { + compatible = "amcc,ppc460gt-crypto", "amcc,ppc460ex-crypto", + "amcc,ppc4xx-crypto"; + reg = <4 0x00180000 0x80400>; + interrupt-parent = <&UIC0>; + interrupts = <0x1d 0x4>; + }; + + HWRNG: hwrng@110000 { + compatible = "amcc,ppc460ex-rng", "ppc4xx-rng"; + reg = <4 0x00110000 0x50>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; + dcr-reg = <0x180 0x062>; + num-tx-chans = <4>; + num-rx-chans = <32>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-parent = <&UIC2>; + interrupts = < /*TXEOB*/ 0x6 0x4 + /*RXEOB*/ 0x7 0x4 + /*SERR*/ 0x3 0x4 + /*TXDE*/ 0x4 0x4 + /*RXDE*/ 0x5 0x4>; + desc-base-addr-high = <0x8>; + }; + + POB0: opb { + compatible = "ibm,opb-460gt", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + + EBC0: ebc { + compatible = "ibm,ebc-460gt", "ibm,ebc"; + dcr-reg = <0x012 0x002>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by U-Boot */ + /* ranges property is supplied by U-Boot */ + interrupts = <0x6 0x4>; + interrupt-parent = <&UIC1>; + + nor_flash@0,0 { + compatible = "amd,s29gl512n", "cfi-flash"; + bank-width = <2>; + reg = <0x00000000 0x00000000 0x04000000>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "kernel"; + reg = <0x00000000 0x001e0000>; + }; + partition@1e0000 { + label = "dtb"; + reg = <0x001e0000 0x00020000>; + }; + partition@200000 { + label = "ramdisk"; + reg = <0x00200000 0x01400000>; + }; + partition@1600000 { + label = "jffs2"; + reg = <0x01600000 0x00400000>; + }; + partition@1a00000 { + label = "user"; + reg = <0x01a00000 0x02560000>; + }; + partition@3f60000 { + label = "env"; + reg = <0x03f60000 0x00040000>; + }; + partition@3fa0000 { + label = "u-boot"; + reg = <0x03fa0000 0x00060000>; + }; + }; + + ndfc@3,0 { + compatible = "ibm,ndfc"; + reg = <0x00000003 0x00000000 0x00002000>; + ccr = <0x00001000>; + bank-settings = <0x80002222>; + #address-cells = <1>; + #size-cells = <1>; + + nand { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + }; + partition@100000 { + label = "user"; + reg = <0x00000000 0x03f00000>; + }; + }; + }; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + reg-shift = <0>; + compatible = "ns16550"; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <0x1 0x4>; + }; + + UART1: serial@ef600400 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC0>; + interrupts = <0x1 0x4>; + }; + + UART2: serial@ef600500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600500 0x00000008>; + virtual-reg = <0xef600500>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <28 0x4>; + }; + + UART3: serial@ef600600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600600 0x00000008>; + virtual-reg = <0xef600600>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <29 0x4>; + }; + + IIC0: i2c@ef600700 { + compatible = "ibm,iic-460gt", "ibm,iic"; + reg = <0xef600700 0x00000014>; + interrupt-parent = <&UIC0>; + interrupts = <0x2 0x4>; + #address-cells = <1>; + #size-cells = <0>; + rtc@68 { + compatible = "stm,m41t80"; + reg = <0x68>; + interrupt-parent = <&UIC2>; + interrupts = <0x19 0x8>; + }; + sttm@48 { + compatible = "ad,ad7414"; + reg = <0x48>; + interrupt-parent = <&UIC1>; + interrupts = <0x14 0x8>; + }; + }; + + IIC1: i2c@ef600800 { + compatible = "ibm,iic-460gt", "ibm,iic"; + reg = <0xef600800 0x00000014>; + interrupt-parent = <&UIC0>; + interrupts = <0x3 0x4>; + }; + + ZMII0: emac-zmii@ef600d00 { + compatible = "ibm,zmii-460gt", "ibm,zmii"; + reg = <0xef600d00 0x0000000c>; + }; + + RGMII0: emac-rgmii@ef601500 { + compatible = "ibm,rgmii-460gt", "ibm,rgmii"; + reg = <0xef601500 0x00000008>; + has-mdio; + }; + + RGMII1: emac-rgmii@ef601600 { + compatible = "ibm,rgmii-460gt", "ibm,rgmii"; + reg = <0xef601600 0x00000008>; + has-mdio; + }; + + TAH0: emac-tah@ef601350 { + compatible = "ibm,tah-460gt", "ibm,tah"; + reg = <0xef601350 0x00000030>; + }; + + TAH1: emac-tah@ef601450 { + compatible = "ibm,tah-460gt", "ibm,tah"; + reg = <0xef601450 0x00000030>; + }; + + EMAC0: ethernet@ef600e00 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4sync"; + interrupt-parent = <&EMAC0>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef600e00 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + phy-mode = "rgmii"; + phy-map = <0x00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <0>; + tah-device = <&TAH0>; + tah-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + }; + + EMAC1: ethernet@ef600f00 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4sync"; + interrupt-parent = <&EMAC1>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef600f00 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <1>; + mal-rx-channel = <8>; + cell-index = <1>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + phy-mode = "rgmii"; + phy-map = <0x00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <1>; + tah-device = <&TAH1>; + tah-channel = <1>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + + EMAC2: ethernet@ef601100 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4sync"; + interrupt-parent = <&EMAC2>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef601100 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <2>; + mal-rx-channel = <16>; + cell-index = <2>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + tx-fifo-size-gige = <16384>; /* emac2&3 only */ + phy-mode = "rgmii"; + phy-map = <0x00000000>; + rgmii-device = <&RGMII1>; + rgmii-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + + EMAC3: ethernet@ef601200 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4sync"; + interrupt-parent = <&EMAC3>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef601200 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <3>; + mal-rx-channel = <24>; + cell-index = <3>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + rx-fifo-size-gige = <16384>; + tx-fifo-size-gige = <16384>; /* emac2&3 only */ + phy-mode = "rgmii"; + phy-map = <0x00000000>; + rgmii-device = <&RGMII1>; + rgmii-channel = <1>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + }; + + PCIX0: pci@c0ec00000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix"; + primary; + large-inbound-windows; + enable-msi-hole; + reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ + 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ + 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ + 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ + 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 + 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000 + 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; + + /* This drives busses 0 to 0x3f */ + bus-range = <0x0 0x3f>; + + /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ + interrupt-map-mask = <0x0 0x0 0x0 0x0>; + interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; + }; + + PCIE0: pciex@d00000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <0x0>; /* port number */ + reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ + 0x0000000c 0x08010000 0x00001000>; /* Registers */ + dcr-reg = <0x100 0x020>; + sdr-base = <0x300>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 + 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; + + /* This drives busses 40 to 0x7f */ + bus-range = <0x40 0x7f>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = < + 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; + }; + + PCIE1: pciex@d20000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <0x1>; /* port number */ + reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ + 0x0000000c 0x08011000 0x00001000>; /* Registers */ + dcr-reg = <0x120 0x020>; + sdr-base = <0x340>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 + 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; + + /* This drives busses 80 to 0xbf */ + bus-range = <0x80 0xbf>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = < + 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; + }; + }; +}; From 36ec4c021a56209be87b9fe7c2865fd95a820f63 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:42 -0700 Subject: [PATCH 017/222] powerpc: ppc4xx: Call board_init_f_mem() for generic board Call this function to set up our early memory. Signed-off-by: Simon Glass --- arch/powerpc/cpu/ppc4xx/start.S | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 09a02d771c..7a0f0d25d1 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -760,6 +760,15 @@ _start: #endif bl cpu_init_f /* run low-level CPU init code (from Flash) */ +#ifdef CONFIG_SYS_GENERIC_BOARD + mr r3, r1 + bl board_init_f_mem + mr r1, r3 + li r0,0 + stwu r0, -4(r1) + stwu r0, -4(r1) +#endif + li r3, 0 bl board_init_f /* NOTREACHED - board_init_f() does not return */ @@ -1027,7 +1036,14 @@ _start: GET_GOT /* initialize GOT access */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ - +#ifdef CONFIG_SYS_GENERIC_BOARD + mr r3, r1 + bl board_init_f_mem + mr r1, r3 + stwu r0, -4(r1) + stwu r0, -4(r1) +#endif + li r3, 0 bl board_init_f /* run first part of init code (from Flash) */ /* NOTREACHED - board_init_f() does not return */ From 86bedaebb570c2a111cdcafbf310f95b1bd58a14 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:43 -0700 Subject: [PATCH 018/222] powerpc: ppc4xx: Add a gpio.h header file This is required at present for device tree control. The ppc4xx does support GPIOs but does not seem to have a proper driver. So this file is empty. Signed-off-by: Simon Glass --- arch/powerpc/include/asm/arch-ppc4xx/gpio.h | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 arch/powerpc/include/asm/arch-ppc4xx/gpio.h diff --git a/arch/powerpc/include/asm/arch-ppc4xx/gpio.h b/arch/powerpc/include/asm/arch-ppc4xx/gpio.h new file mode 100644 index 0000000000..3d960c3f1f --- /dev/null +++ b/arch/powerpc/include/asm/arch-ppc4xx/gpio.h @@ -0,0 +1,7 @@ +/* + * (C) Copyright 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* This is empty for now as we don't support the generic GPIO interface */ From 0de36f8b62f5f9897f9434f4c3f5739117370694 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:44 -0700 Subject: [PATCH 019/222] powerpc: ppc4xx: Allow the end of u-boot.bin to be found Define an _end symbol indicating the end of u-boot.bin. Also add some dummy words into the link script to ensure that u-boot.bin will always extend that far. There may be a better way of doing this. Signed-off-by: Simon Glass --- arch/powerpc/cpu/ppc4xx/u-boot.lds | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds index 87731785ec..198050853a 100644 --- a/arch/powerpc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -76,9 +76,13 @@ SECTIONS . = ALIGN(256); __init_begin = .; .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); + .data.init : { + *(.data.init) + . = ALIGN(256); + LONG(0) LONG(0) /* Extend u-boot.bin to here */ + } __init_end = .; + _end = .; #ifndef CONFIG_SPL #ifdef CONFIG_440 From 43301741fc3455704204df100bf73a4c2f15b697 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:45 -0700 Subject: [PATCH 020/222] powerpc: ppc4xx: Use CONFIG_OF_CONTROL for canyonlands boards Enable CONFIG_OF_CONTROL so that U-Boot on these three boards uses a device tree for its configuration. Signed-off-by: Simon Glass --- board/amcc/canyonlands/u-boot-ram.lds | 10 ++++++++-- configs/arches_defconfig | 3 +++ configs/canyonlands_defconfig | 3 +++ configs/glacier_defconfig | 3 +++ configs/glacier_ramboot_defconfig | 3 +++ 5 files changed, 20 insertions(+), 2 deletions(-) diff --git a/board/amcc/canyonlands/u-boot-ram.lds b/board/amcc/canyonlands/u-boot-ram.lds index 67652569f4..1750c74a19 100644 --- a/board/amcc/canyonlands/u-boot-ram.lds +++ b/board/amcc/canyonlands/u-boot-ram.lds @@ -12,6 +12,7 @@ SECTIONS . = + SIZEOF_HEADERS; .text : { + _image_copy_start = .; arch/powerpc/cpu/ppc4xx/start.o (.text*) board/amcc/canyonlands/init.o (.text*) @@ -61,9 +62,14 @@ SECTIONS . = ALIGN(256); __init_begin = .; .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); + .data.init : { + *(.data.init) + . = ALIGN(256); + LONG(0) LONG(0) /* Extend u-boot.bin to here */ + } __init_end = .; + _end = .; + _image_binary_end = .; __bss_start = .; .bss (NOLOAD) : diff --git a/configs/arches_defconfig b/configs/arches_defconfig index 60e6ef9098..30c6932358 100644 --- a/configs/arches_defconfig +++ b/configs/arches_defconfig @@ -2,3 +2,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y CONFIG_ARCHES=y +CONFIG_DEFAULT_DEVICE_TREE="arches" +CONFIG_OF_CONTROL=y +CONFIG_OF_SEPARATE=y diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig index 37a2b4d796..6f6cf14811 100644 --- a/configs/canyonlands_defconfig +++ b/configs/canyonlands_defconfig @@ -2,3 +2,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y CONFIG_CANYONLANDS=y +CONFIG_DEFAULT_DEVICE_TREE="canyonlands" +CONFIG_OF_CONTROL=y +CONFIG_OF_SEPARATE=y diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig index 436b9f8d03..e67fa32f56 100644 --- a/configs/glacier_defconfig +++ b/configs/glacier_defconfig @@ -2,3 +2,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y CONFIG_GLACIER=y +CONFIG_DEFAULT_DEVICE_TREE="glacier" +CONFIG_OF_CONTROL=y +CONFIG_OF_SEPARATE=y diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig index 4fc23038e8..e5b402e747 100644 --- a/configs/glacier_ramboot_defconfig +++ b/configs/glacier_ramboot_defconfig @@ -3,3 +3,6 @@ CONFIG_PPC=y CONFIG_4xx=y CONFIG_TARGET_CANYONLANDS=y CONFIG_GLACIER=y +CONFIG_DEFAULT_DEVICE_TREE="glacier" +CONFIG_OF_CONTROL=y +CONFIG_OF_SEPARATE=y From 0e7806d24a77179053c64ba481b3857805e061c8 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:46 -0700 Subject: [PATCH 021/222] ppc: amcc: Omit unneeded ns16550 CONFIG if using driver model This comes from the device tree or a call to get_uart_clock(). Signed-off-by: Simon Glass --- arch/powerpc/include/asm/ppc460ex_gt.h | 2 ++ include/configs/amcc-common.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/powerpc/include/asm/ppc460ex_gt.h b/arch/powerpc/include/asm/ppc460ex_gt.h index f41df0da6a..ea019aafdb 100644 --- a/arch/powerpc/include/asm/ppc460ex_gt.h +++ b/arch/powerpc/include/asm/ppc460ex_gt.h @@ -19,10 +19,12 @@ /* Memory mapped registers */ #define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */ +#ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400) #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_PERIPHERAL_BASE + 0x0500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_PERIPHERAL_BASE + 0x0600) +#endif #define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0b00) #define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0c00) diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 2aea89937a..73e1b0afa8 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -20,8 +20,10 @@ */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL +#ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_serial_clock() +#endif #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} From fad486ce51b7ae96f5004e50249c675d5ac20136 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:47 -0700 Subject: [PATCH 022/222] powerpc: Add serial driver for driver model This uses the ns16550 driver but sets up the clock at run-time. It does not seem to be available in the device tree. Signed-off-by: Simon Glass --- drivers/serial/Makefile | 1 + drivers/serial/serial_ppc.c | 40 +++++++++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) create mode 100644 drivers/serial/serial_ppc.c diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 4cc00cd2f8..63b0cbf5da 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -8,6 +8,7 @@ ifdef CONFIG_DM_SERIAL obj-y += serial-uclass.o obj-$(CONFIG_PL01X_SERIAL) += serial_pl01x.o +obj-$(CONFIG_PPC) += serial_ppc.o else obj-y += serial.o obj-$(CONFIG_PL010_SERIAL) += serial_pl01x.o diff --git a/drivers/serial/serial_ppc.c b/drivers/serial/serial_ppc.c new file mode 100644 index 0000000000..47141c64eb --- /dev/null +++ b/drivers/serial/serial_ppc.c @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +static const struct udevice_id ppc_serial_ids[] = { + { .compatible = "ns16550" }, + { } +}; + +static int ppc_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct ns16550_platdata *plat = dev_get_platdata(dev); + int ret; + + ret = ns16550_serial_ofdata_to_platdata(dev); + if (ret) + return ret; + plat->clock = get_serial_clock(); + + return 0; +} + +U_BOOT_DRIVER(serial_ns16550) = { + .name = "serial_ppc", + .id = UCLASS_SERIAL, + .of_match = ppc_serial_ids, + .ofdata_to_platdata = ppc_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), + .priv_auto_alloc_size = sizeof(struct NS16550), + .probe = ns16550_serial_probe, + .ops = &ns16550_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; From 5d418fdb99abb1f8e165c358087b90c46dcb5c00 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:48 -0700 Subject: [PATCH 023/222] dm: powerpc: ppc4xx: Move glacier to use driver model for serial Adjust Kconfig to default to driver model for glacier, canyonlands and arches. Signed-off-by: Simon Glass --- board/amcc/canyonlands/Kconfig | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/board/amcc/canyonlands/Kconfig b/board/amcc/canyonlands/Kconfig index 0fc687739c..de709148b3 100644 --- a/board/amcc/canyonlands/Kconfig +++ b/board/amcc/canyonlands/Kconfig @@ -29,4 +29,18 @@ config ARCHES endchoice +config DM + default y + +config DM_SERIAL + default y + +config SYS_MALLOC_F + bool + default y + +config SYS_MALLOC_F_LEN + hex + default 0x400 + endif From 0df09047fadc7f3d097a132120da8f10278e4a0d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 11:51:49 -0700 Subject: [PATCH 024/222] powerpc: Add linkage.h file This permits us to use linux/linkage.h on PowerPC machines. Signed-off-by: Simon Glass --- arch/powerpc/include/asm/linkage.h | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 arch/powerpc/include/asm/linkage.h diff --git a/arch/powerpc/include/asm/linkage.h b/arch/powerpc/include/asm/linkage.h new file mode 100644 index 0000000000..559b42ed3b --- /dev/null +++ b/arch/powerpc/include/asm/linkage.h @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* We don't need anything here at present */ From f693e7f5140382ba6cb76e532852efb5ccfb7c9a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 7 Feb 2015 11:51:50 -0700 Subject: [PATCH 025/222] powerpc: ppc4xx: Change from OF_SEPARATE to OF_EMBED This is necessary, as ppc4xx has the reset vector located at the end of the U-Boot image. This needs to be flashed to the end of the NOR flash. Adding the dtb to the main U-Boot image will break booting on ppc4xx. This patch now embeds the dtb in the U-Boot image instead. Signed-off-by: Stefan Roese Cc: Simon Glass Reviewed-by: Simon Glass Signed-off-by: Simon Glass --- configs/canyonlands_defconfig | 2 +- configs/glacier_defconfig | 2 +- configs/glacier_ramboot_defconfig | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig index 6f6cf14811..44d4fbdb9d 100644 --- a/configs/canyonlands_defconfig +++ b/configs/canyonlands_defconfig @@ -4,4 +4,4 @@ CONFIG_TARGET_CANYONLANDS=y CONFIG_CANYONLANDS=y CONFIG_DEFAULT_DEVICE_TREE="canyonlands" CONFIG_OF_CONTROL=y -CONFIG_OF_SEPARATE=y +CONFIG_OF_EMBED=y diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig index e67fa32f56..d318f82c4c 100644 --- a/configs/glacier_defconfig +++ b/configs/glacier_defconfig @@ -4,4 +4,4 @@ CONFIG_TARGET_CANYONLANDS=y CONFIG_GLACIER=y CONFIG_DEFAULT_DEVICE_TREE="glacier" CONFIG_OF_CONTROL=y -CONFIG_OF_SEPARATE=y +CONFIG_OF_EMBED=y diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig index e5b402e747..f8363b2e23 100644 --- a/configs/glacier_ramboot_defconfig +++ b/configs/glacier_ramboot_defconfig @@ -5,4 +5,4 @@ CONFIG_TARGET_CANYONLANDS=y CONFIG_GLACIER=y CONFIG_DEFAULT_DEVICE_TREE="glacier" CONFIG_OF_CONTROL=y -CONFIG_OF_SEPARATE=y +CONFIG_OF_EMBED=y From 275029074d0adeece0c9e38be0cc61bdfa390b18 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 7 Feb 2015 11:51:51 -0700 Subject: [PATCH 026/222] powerpc: ppc4xx: Add defaults for DT based booting to really work These additional nodes need to be provided to get U-Boot to boot correctly on the Canyonlands / Glacier board: - chosen path to the console-uart - reg-shift set to 0 in the uart device nodes Signed-off-by: Stefan Roese Cc: Simon Glass Reviewed-by: Simon Glass Signed-off-by: Simon Glass --- arch/powerpc/dts/canyonlands.dts | 6 ++++++ arch/powerpc/dts/glacier.dts | 3 +++ 2 files changed, 9 insertions(+) diff --git a/arch/powerpc/dts/canyonlands.dts b/arch/powerpc/dts/canyonlands.dts index 2ec9762e48..0a2f5d7649 100644 --- a/arch/powerpc/dts/canyonlands.dts +++ b/arch/powerpc/dts/canyonlands.dts @@ -22,6 +22,10 @@ serial1 = &UART1; }; + chosen { + stdout-path = &UART0; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -280,6 +284,7 @@ UART0: serial@ef600300 { device_type = "serial"; + reg-shift = <0>; compatible = "ns16550"; reg = <0xef600300 0x00000008>; virtual-reg = <0xef600300>; @@ -291,6 +296,7 @@ UART1: serial@ef600400 { device_type = "serial"; + reg-shift = <0>; compatible = "ns16550"; reg = <0xef600400 0x00000008>; virtual-reg = <0xef600400>; diff --git a/arch/powerpc/dts/glacier.dts b/arch/powerpc/dts/glacier.dts index 3e7ce2c9e6..bb4e819e91 100644 --- a/arch/powerpc/dts/glacier.dts +++ b/arch/powerpc/dts/glacier.dts @@ -251,6 +251,7 @@ UART1: serial@ef600400 { device_type = "serial"; + reg-shift = <0>; compatible = "ns16550"; reg = <0xef600400 0x00000008>; virtual-reg = <0xef600400>; @@ -262,6 +263,7 @@ UART2: serial@ef600500 { device_type = "serial"; + reg-shift = <0>; compatible = "ns16550"; reg = <0xef600500 0x00000008>; virtual-reg = <0xef600500>; @@ -273,6 +275,7 @@ UART3: serial@ef600600 { device_type = "serial"; + reg-shift = <0>; compatible = "ns16550"; reg = <0xef600600 0x00000008>; virtual-reg = <0xef600600>; From 360334a1786c2ef8753239818ca295211b2d5aa8 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 7 Feb 2015 11:51:52 -0700 Subject: [PATCH 027/222] powerpc: ppc4xx: Enable CONFIG_DISPLAY_BOARDINFO This also displays the "Board:" line in the bootup text with the generic board support code. Signed-off-by: Stefan Roese Cc: Simon Glass Reviewed-by: Simon Glass Signed-off-by: Simon Glass --- board/amcc/canyonlands/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/amcc/canyonlands/Kconfig b/board/amcc/canyonlands/Kconfig index de709148b3..848e08fbba 100644 --- a/board/amcc/canyonlands/Kconfig +++ b/board/amcc/canyonlands/Kconfig @@ -29,6 +29,10 @@ config ARCHES endchoice +config DISPLAY_BOARDINFO + bool + default y + config DM default y From 0da0fcd51f6566d84eb24cbbd4c8ad784c702849 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 19 Jan 2015 22:16:08 -0700 Subject: [PATCH 028/222] net: Use new checksum functions Drop the old checksum functions in favour of the new ones. Signed-off-by: Simon Glass Acked-by: Joe Hershberger --- include/net.h | 4 ---- net/net.c | 25 ++----------------------- net/ping.c | 10 ++++------ 3 files changed, 6 insertions(+), 33 deletions(-) diff --git a/include/net.h b/include/net.h index 73ea88b42d..43e3d28729 100644 --- a/include/net.h +++ b/include/net.h @@ -512,10 +512,6 @@ unsigned add_ip_checksums(unsigned offset, unsigned sum, unsigned new_sum); */ int ip_checksum_ok(const void *addr, unsigned nbytes); -/* Checksum */ -extern int NetCksumOk(uchar *, int); /* Return true if cksum OK */ -extern uint NetCksum(uchar *, int); /* Calculate the checksum */ - /* Callbacks */ extern rxhand_f *net_get_udp_handler(void); /* Get UDP RX packet handler */ extern void net_set_udp_handler(rxhand_f *); /* Set UDP RX packet handler */ diff --git a/net/net.c b/net/net.c index 2bea07b3cd..b60ce6242c 100644 --- a/net/net.c +++ b/net/net.c @@ -1086,7 +1086,7 @@ NetReceive(uchar *inpkt, int len) if ((ip->ip_hl_v & 0x0f) > 0x05) return; /* Check the Checksum of the header */ - if (!NetCksumOk((uchar *)ip, IP_HDR_SIZE / 2)) { + if (!ip_checksum_ok((uchar *)ip, IP_HDR_SIZE)) { debug("checksum bad\n"); return; } @@ -1290,27 +1290,6 @@ common: } /**********************************************************************/ -int -NetCksumOk(uchar *ptr, int len) -{ - return !((NetCksum(ptr, len) + 1) & 0xfffe); -} - - -unsigned -NetCksum(uchar *ptr, int len) -{ - ulong xsum; - ushort *p = (ushort *)ptr; - - xsum = 0; - while (len-- > 0) - xsum += *p++; - xsum = (xsum & 0xffff) + (xsum >> 16); - xsum = (xsum & 0xffff) + (xsum >> 16); - return xsum & 0xffff; -} - int NetEthHdrSize(void) { @@ -1410,7 +1389,7 @@ void net_set_udp_header(uchar *pkt, IPaddr_t dest, int dport, int sport, net_set_ip_header(pkt, dest, NetOurIP); ip->ip_len = htons(IP_UDP_HDR_SIZE + len); ip->ip_p = IPPROTO_UDP; - ip->ip_sum = ~NetCksum((uchar *)ip, IP_HDR_SIZE >> 1); + ip->ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE); ip->udp_src = htons(sport); ip->udp_dst = htons(dport); diff --git a/net/ping.c b/net/ping.c index 2be56ed929..366f51825f 100644 --- a/net/ping.c +++ b/net/ping.c @@ -29,14 +29,14 @@ static void set_icmp_header(uchar *pkt, IPaddr_t dest) ip->ip_len = htons(IP_ICMP_HDR_SIZE); ip->ip_p = IPPROTO_ICMP; - ip->ip_sum = ~NetCksum((uchar *)ip, IP_HDR_SIZE >> 1); + ip->ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE); icmp->type = ICMP_ECHO_REQUEST; icmp->code = 0; icmp->checksum = 0; icmp->un.echo.id = 0; icmp->un.echo.sequence = htons(PingSeqNo++); - icmp->checksum = ~NetCksum((uchar *)icmp, ICMP_HDR_SIZE >> 1); + icmp->checksum = compute_ip_checksum(icmp, ICMP_HDR_SIZE); } static int ping_send(void) @@ -101,13 +101,11 @@ void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) ip->ip_off = 0; NetCopyIP((void *)&ip->ip_dst, &ip->ip_src); NetCopyIP((void *)&ip->ip_src, &NetOurIP); - ip->ip_sum = ~NetCksum((uchar *)ip, - IP_HDR_SIZE >> 1); + ip->ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE); icmph->type = ICMP_ECHO_REPLY; icmph->checksum = 0; - icmph->checksum = ~NetCksum((uchar *)icmph, - (len - IP_HDR_SIZE) >> 1); + icmph->checksum = compute_ip_checksum(icmph, len - IP_HDR_SIZE); NetSendPacket((uchar *)et, eth_hdr_size + len); return; /* default: From ca88b9b93916f66c6737527aa955d2c1b4758080 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:32 -0700 Subject: [PATCH 029/222] dm: i2c: Add a dm_ prefix to driver model bus speed functions As with i2c_read() and i2c_write(), add a dm_ prefix to the driver model versions of these functions to avoid conflicts. Signed-off-by: Simon Glass Acked-by: Heiko Schocher --- common/cmd_i2c.c | 4 ++-- drivers/i2c/i2c-uclass.c | 11 +++-------- include/i2c.h | 8 ++++---- test/dm/i2c.c | 6 +++--- 4 files changed, 12 insertions(+), 17 deletions(-) diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 7c3ad00fdf..fe8f77aaec 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -1730,7 +1730,7 @@ static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const #endif if (argc == 1) { #ifdef CONFIG_DM_I2C - speed = i2c_get_bus_speed(bus); + speed = dm_i2c_get_bus_speed(bus); #else speed = i2c_get_bus_speed(); #endif @@ -1740,7 +1740,7 @@ static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const speed = simple_strtoul(argv[1], NULL, 10); printf("Setting bus speed to %d Hz\n", speed); #ifdef CONFIG_DM_I2C - ret = i2c_set_bus_speed(bus, speed); + ret = dm_i2c_set_bus_speed(bus, speed); #else ret = i2c_set_bus_speed(speed); #endif diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index eafa457845..a6991bf875 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -325,7 +325,7 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, return ret; } -int i2c_set_bus_speed(struct udevice *bus, unsigned int speed) +int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) { struct dm_i2c_ops *ops = i2c_get_ops(bus); struct dm_i2c_bus *i2c = bus->uclass_priv; @@ -346,12 +346,7 @@ int i2c_set_bus_speed(struct udevice *bus, unsigned int speed) return 0; } -/* - * i2c_get_bus_speed: - * - * Returns speed of selected I2C bus in Hz - */ -int i2c_get_bus_speed(struct udevice *bus) +int dm_i2c_get_bus_speed(struct udevice *bus) { struct dm_i2c_ops *ops = i2c_get_ops(bus); struct dm_i2c_bus *i2c = bus->uclass_priv; @@ -440,7 +435,7 @@ static int i2c_post_probe(struct udevice *dev) i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "clock-frequency", 100000); - return i2c_set_bus_speed(dev, i2c->speed_hz); + return dm_i2c_set_bus_speed(dev, i2c->speed_hz); } static int i2c_post_bind(struct udevice *dev) diff --git a/include/i2c.h b/include/i2c.h index 27fe00f173..1635e9ac06 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -125,21 +125,21 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, struct udevice **devp); /** - * i2c_set_bus_speed() - set the speed of a bus + * dm_i2c_set_bus_speed() - set the speed of a bus * * @bus: Bus to adjust * @speed: Requested speed in Hz * @return 0 if OK, -EINVAL for invalid values */ -int i2c_set_bus_speed(struct udevice *bus, unsigned int speed); +int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed); /** - * i2c_get_bus_speed() - get the speed of a bus + * dm_i2c_get_bus_speed() - get the speed of a bus * * @bus: Bus to check * @return speed of selected I2C bus in Hz, -ve on error */ -int i2c_get_bus_speed(struct udevice *bus); +int dm_i2c_get_bus_speed(struct udevice *bus); /** * i2c_set_chip_flags() - set flags for a chip diff --git a/test/dm/i2c.c b/test/dm/i2c.c index ef88372d56..541b73b803 100644 --- a/test/dm/i2c.c +++ b/test/dm/i2c.c @@ -67,10 +67,10 @@ static int dm_test_i2c_speed(struct dm_test_state *dms) ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus)); ut_assertok(i2c_get_chip(bus, chip, 1, &dev)); - ut_assertok(i2c_set_bus_speed(bus, 100000)); + ut_assertok(dm_i2c_set_bus_speed(bus, 100000)); ut_assertok(dm_i2c_read(dev, 0, buf, 5)); - ut_assertok(i2c_set_bus_speed(bus, 400000)); - ut_asserteq(400000, i2c_get_bus_speed(bus)); + ut_assertok(dm_i2c_set_bus_speed(bus, 400000)); + ut_asserteq(400000, dm_i2c_get_bus_speed(bus)); ut_assertok(dm_i2c_read(dev, 0, buf, 5)); ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5)); From fffff7268b6c30dc7058d3615021628d4f60fac5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:33 -0700 Subject: [PATCH 030/222] dm: i2c: Make API accessible even without CONFIG_DM Make the driver model I2C API available always, even if driver model is not enabled. This allows for a 'soft' switch-over, where drivers can use the new structures in code which is compiled but not yet used. This makes migration easier in some cases. Fix up the existing drivers which define their own 'struct i2c_msg'. Signed-off-by: Simon Glass Acked-by: Heiko Schocher --- drivers/i2c/adi_i2c.c | 6 +++--- drivers/i2c/kona_i2c.c | 16 ++++++++-------- drivers/i2c/mv_i2c.c | 10 +++++----- include/i2c.h | 5 +---- 4 files changed, 17 insertions(+), 20 deletions(-) diff --git a/drivers/i2c/adi_i2c.c b/drivers/i2c/adi_i2c.c index 20495b1d7f..c58f14a36e 100644 --- a/drivers/i2c/adi_i2c.c +++ b/drivers/i2c/adi_i2c.c @@ -63,7 +63,7 @@ struct twi_regs { #endif /* All transfers are described by this data structure */ -struct i2c_msg { +struct adi_i2c_msg { u8 flags; #define I2C_M_COMBO 0x4 #define I2C_M_STOP 0x2 @@ -81,7 +81,7 @@ struct i2c_msg { * wait_for_completion - manage the actual i2c transfer * @msg: the i2c msg */ -static int wait_for_completion(struct twi_regs *twi, struct i2c_msg *msg) +static int wait_for_completion(struct twi_regs *twi, struct adi_i2c_msg *msg) { u16 int_stat, ctl; ulong timebase = get_timer(0); @@ -151,7 +151,7 @@ static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr, (addr >> 8), (addr >> 16), }; - struct i2c_msg msg = { + struct adi_i2c_msg msg = { .flags = flags | (len >= 0xff ? I2C_M_STOP : 0), .buf = buffer, .len = len, diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c index 5eab338cfc..9af496bbb1 100644 --- a/drivers/i2c/kona_i2c.c +++ b/drivers/i2c/kona_i2c.c @@ -156,7 +156,7 @@ static struct bcm_kona_i2c_dev g_i2c_devs[CONFIG_SYS_MAX_I2C_BUS] = { #define I2C_M_RD 0x0001 /* read data */ #define I2C_M_NOSTART 0x4000 /* no restart between msgs */ -struct i2c_msg { +struct kona_i2c_msg { uint16_t addr; uint16_t flags; uint16_t len; @@ -297,7 +297,7 @@ static int bcm_kona_i2c_read_fifo_single(struct bcm_kona_i2c_dev *dev, /* Read any amount of data using the RX FIFO from the i2c bus */ static int bcm_kona_i2c_read_fifo(struct bcm_kona_i2c_dev *dev, - struct i2c_msg *msg) + struct kona_i2c_msg *msg) { unsigned int bytes_to_read = MAX_RX_FIFO_SIZE; unsigned int last_byte_nak = 0; @@ -392,7 +392,7 @@ static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev, /* Write any amount of data using TX FIFO to the i2c bus */ static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev *dev, - struct i2c_msg *msg) + struct kona_i2c_msg *msg) { unsigned int bytes_to_write = MAX_TX_FIFO_SIZE; unsigned int bytes_written = 0; @@ -418,7 +418,7 @@ static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev *dev, /* Send i2c address */ static int bcm_kona_i2c_do_addr(struct bcm_kona_i2c_dev *dev, - struct i2c_msg *msg) + struct kona_i2c_msg *msg) { unsigned char addr; @@ -480,9 +480,9 @@ static void bcm_kona_i2c_config_timing(struct bcm_kona_i2c_dev *dev) /* Master transfer function */ static int bcm_kona_i2c_xfer(struct bcm_kona_i2c_dev *dev, - struct i2c_msg msgs[], int num) + struct kona_i2c_msg msgs[], int num) { - struct i2c_msg *pmsg; + struct kona_i2c_msg *pmsg; int rc = 0; int i; @@ -635,7 +635,7 @@ static int kona_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, int alen, uchar *buffer, int len) { /* msg[0] writes the addr, msg[1] reads the data */ - struct i2c_msg msg[2]; + struct kona_i2c_msg msg[2]; unsigned char msgbuf0[64]; struct bcm_kona_i2c_dev *dev = kona_get_dev(adap); @@ -663,7 +663,7 @@ static int kona_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, static int kona_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, int alen, uchar *buffer, int len) { - struct i2c_msg msg[1]; + struct kona_i2c_msg msg[1]; unsigned char msgbuf0[64]; unsigned int i; struct bcm_kona_i2c_dev *dev = kona_get_dev(adap); diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c index dac346334d..e65cce0d8e 100644 --- a/drivers/i2c/mv_i2c.c +++ b/drivers/i2c/mv_i2c.c @@ -31,7 +31,7 @@ #endif /* All transfers are described by this data structure */ -struct i2c_msg { +struct mv_i2c_msg { u8 condition; u8 acknack; u8 direction; @@ -157,7 +157,7 @@ static int i2c_isr_set_cleared(unsigned long set_mask, * -5: illegal parameters * -6: bus is busy and couldn't be aquired */ -int i2c_transfer(struct i2c_msg *msg) +int i2c_transfer(struct mv_i2c_msg *msg) { int ret; @@ -286,7 +286,7 @@ void i2c_init(int speed, int slaveaddr) */ int i2c_probe(uchar chip) { - struct i2c_msg msg; + struct mv_i2c_msg msg; i2c_reset(); @@ -322,7 +322,7 @@ int i2c_probe(uchar chip) */ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) { - struct i2c_msg msg; + struct mv_i2c_msg msg; u8 addr_bytes[3]; /* lowest...highest byte of data address */ PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " @@ -410,7 +410,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) */ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) { - struct i2c_msg msg; + struct mv_i2c_msg msg; u8 addr_bytes[3]; /* lowest...highest byte of data address */ PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " diff --git a/include/i2c.h b/include/i2c.h index 1635e9ac06..31b038991e 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -25,14 +25,13 @@ * enough as to be incompatible for compilation purposes. */ -#ifdef CONFIG_DM_I2C - enum dm_i2c_chip_flags { DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ }; +struct udevice; /** * struct dm_i2c_chip - information about an i2c chip * @@ -439,8 +438,6 @@ int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, int i2c_chip_ofdata_to_platdata(const void *blob, int node, struct dm_i2c_chip *chip); -#endif - #ifndef CONFIG_DM_I2C /* From 2a4eeadd56e0760b33c7ebef383c105479a93cac Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:34 -0700 Subject: [PATCH 031/222] dm: Add Kconfig for driver/demo Add a suitable Kconfig for this directory. Signed-off-by: Simon Glass Reviewed-by: Masahiro Yamada --- drivers/Kconfig | 2 ++ drivers/demo/Kconfig | 26 ++++++++++++++++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 drivers/demo/Kconfig diff --git a/drivers/Kconfig b/drivers/Kconfig index 128736dae3..021293e798 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -2,6 +2,8 @@ menu "Device Drivers" source "drivers/core/Kconfig" +source "drivers/demo/Kconfig" + source "drivers/pci/Kconfig" source "drivers/pcmcia/Kconfig" diff --git a/drivers/demo/Kconfig b/drivers/demo/Kconfig new file mode 100644 index 0000000000..7a8ce18555 --- /dev/null +++ b/drivers/demo/Kconfig @@ -0,0 +1,26 @@ +config DM_DEMO + bool "Enable demo uclass support" + depends on DM + help + This uclass allows you to play around with driver model. It provides + an interface to a couple of demo devices. You can access it using + the 'demo' command or by calling the uclass functions from your + own code. + +config DM_DEMO_SIMPLE + bool "Enable simple demo device for driver model" + depends on DM_DEMO + help + This device allows you to play around with driver model. It prints + a message when the 'demo hello' command is executed which targets + this device. It can be used to help understand how driver model + works. + +config DM_DEMO_SHAPE + bool "Enable shape demo device for driver model" + depends on DM_DEMO + help + This device allows you to play around with driver model. It prints + a shape when the 'demo hello' command is executed which targets + this device. It can be used to help understand how driver model + works. From f94a1bed07e2af1c46ddcf2046cddd979ebfd994 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:35 -0700 Subject: [PATCH 032/222] dm: Expand and complete Kconfig in drivers/ Expand the help messages for each driver. Add missing Kconfig for I2C, SPI flash and thermal. Signed-off-by: Simon Glass Reviewed-by: Masahiro Yamada --- doc/driver-model/spi-howto.txt | 4 ++-- drivers/Kconfig | 2 ++ drivers/core/Kconfig | 6 ++++-- drivers/gpio/Kconfig | 7 +++++-- drivers/i2c/Kconfig | 12 ++++++++++-- drivers/misc/Kconfig | 9 +++++++++ drivers/mtd/Kconfig | 2 ++ drivers/mtd/spi/Kconfig | 14 ++++++++++++++ drivers/serial/Kconfig | 6 ++++-- drivers/spi/Kconfig | 10 ++++++++-- drivers/thermal/Kconfig | 7 +++++++ 11 files changed, 67 insertions(+), 12 deletions(-) create mode 100644 drivers/mtd/spi/Kconfig create mode 100644 drivers/thermal/Kconfig diff --git a/doc/driver-model/spi-howto.txt b/doc/driver-model/spi-howto.txt index 5bc29ad65c..ee4abf4a8b 100644 --- a/doc/driver-model/spi-howto.txt +++ b/doc/driver-model/spi-howto.txt @@ -40,8 +40,8 @@ with only minor changes: Add these to your board config: -#define CONFIG_DM_SPI -#define CONFIG_DM_SPI_FLASH +CONFIG_DM_SPI +CONFIG_DM_SPI_FLASH 2. Add the skeleton diff --git a/drivers/Kconfig b/drivers/Kconfig index 021293e798..dcce532e2d 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -50,4 +50,6 @@ source "drivers/dma/Kconfig" source "drivers/crypto/Kconfig" +source "drivers/thermal/Kconfig" + endmenu diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index d2799dc861..dc32385e85 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -2,5 +2,7 @@ config DM bool "Enable Driver Model" depends on !SPL_BUILD help - This config option enables Driver Model. - To use legacy drivers, say N. + This config option enables Driver Model. This brings in the core + support, including scanning of platform data on start-up. If + CONFIG_OF_CONTROL is enabled, the device tree will be scanned also + when available. diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d21302f8da..b609e73bba 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -2,5 +2,8 @@ config DM_GPIO bool "Enable Driver Model for GPIO drivers" depends on DM help - If you want to use driver model for GPIO drivers, say Y. - To use legacy GPIO drivers, say N. + Enable driver model for GPIO access. The standard GPIO + interface (gpio_get_value(), etc.) is then implemented by + the GPIO uclass. Drivers provide methods to query the + particular GPIOs that they provide. The uclass interface + is defined in include/asm-generic/gpio.h. diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 202ea5d679..2cc776c73f 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -2,8 +2,16 @@ config DM_I2C bool "Enable Driver Model for I2C drivers" depends on DM help - If you want to use driver model for I2C drivers, say Y. - To use legacy I2C drivers, say N. + Enable driver model for I2C. This SPI flash interface + (spi_flash_probe(), spi_flash_write(), etc.) is then + implemented by the SPI flash uclass. There is one standard + SPI flash driver which knows how to probe most chips + supported by U-Boot. The uclass interface is defined in + include/spi_flash.h, but is currently fully compatible + with the old interface to avoid confusion and duplication + during the transition parent. SPI and SPI flash must be + enabled together (it is not possible to use driver model + for one and not the other). config SYS_I2C_UNIPHIER bool "UniPhier I2C driver" diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index e69de29bb2..813d1c24b9 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -0,0 +1,9 @@ +config DM_CROS_EC + bool "Enable Driver Model for Chrome OS EC" + depends on DM + help + Enable driver model for the Chrome OS EC interface. This + allows the cros_ec SPI driver to operate with CONFIG_DM_SPI + but otherwise makes few changes. Since cros_ec also supports + I2C and LPC (which don't support driver model yet), a full + conversion is not yet possible. diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 415ab4eba9..59278d1eef 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -1 +1,3 @@ source "drivers/mtd/nand/Kconfig" + +source "drivers/mtd/spi/Kconfig" diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig new file mode 100644 index 0000000000..2dc46b4b34 --- /dev/null +++ b/drivers/mtd/spi/Kconfig @@ -0,0 +1,14 @@ +config DM_SPI_FLASH + bool "Enable Driver Model for SPI flash" + depends on DM && SPI + help + Enable driver model for SPI flash. This SPI flash interface + (spi_flash_probe(), spi_flash_write(), etc.) is then + implemented by the SPI flash uclass. There is one standard + SPI flash driver which knows how to probe most chips + supported by U-Boot. The uclass interface is defined in + include/spi_flash.h, but is currently fully compatible + with the old interface to avoid confusion and duplication + during the transition parent. SPI and SPI flash must be + enabled together (it is not possible to use driver model + for one and not the other). diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index a0b6e02b54..c94353ba6a 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -2,8 +2,10 @@ config DM_SERIAL bool "Enable Driver Model for serial drivers" depends on DM help - If you want to use driver model for serial drivers, say Y. - To use legacy serial drivers, say N. + Enable driver model for serial. This replaces + drivers/serial/serial.c with the serial uclass, which + implements serial_putc() etc. The uclass interface is + defined in include/serial.h. config UNIPHIER_SERIAL bool "UniPhier on-chip UART support" diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index e1678e63e6..7ae2727cf7 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -2,5 +2,11 @@ config DM_SPI bool "Enable Driver Model for SPI drivers" depends on DM help - If you want to use driver model for SPI drivers, say Y. - To use legacy SPI drivers, say N. + Enable driver model for SPI. The SPI slave interface + (spi_setup_slave(), spi_xfer(), etc.) is then implemented by + the SPI uclass. Drivers provide methods to access the SPI + buses that they control. The uclass interface is defined in + include/spi.h. The existing spi_slave structure is attached + as 'parent data' to every slave on each bus. Slaves + typically use driver-private data instead of extending the + spi_slave structure. diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig new file mode 100644 index 0000000000..3c6b36d1cf --- /dev/null +++ b/drivers/thermal/Kconfig @@ -0,0 +1,7 @@ +config DM_THERMAL + bool "Driver support for thermal devices" + help + Enable support for temporary-sensing devices. Some SoCs have on-chip + temperature sensors to permit warnings, speed throttling or even + automatic power-off when the temperature gets too high or low. Other + devices may be discrete but connected on a suitable bus. From 91a91ff804d50d7a4b7560d10fa6863fc4c04307 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:36 -0700 Subject: [PATCH 033/222] dm: Add Kconfig options for driver model SPL support The SPL support cannot be enabled yet, but we can add the Kconfig options in preparation for this. Signed-off-by: Simon Glass --- drivers/core/Kconfig | 44 +++++++++++++++++++++++++++++++++++++++ include/config_defaults.h | 6 ++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index dc32385e85..f0d611007a 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -6,3 +6,47 @@ config DM support, including scanning of platform data on start-up. If CONFIG_OF_CONTROL is enabled, the device tree will be scanned also when available. + +config SPL_DM + bool "Enable Driver Model for SPL" + depends on DM && SPL + help + Enable driver model in SPL. You will need to provide a + suitable malloc() implementation. If you are not using the + full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START, + consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you + must provide CONFIG_SYS_MALLOC_F_LEN to set the size. + In most cases driver model will only allocate a few uclasses + and devices in SPL, so 1KB should be enable. See + CONFIG_SYS_MALLOC_F_LEN for more details on how to enable it. + +config DM_WARN + bool "Enable warnings in driver model" + help + The dm_warn() function can use up quite a bit of space for its + strings. By default this is disabled for SPL builds to save space. + This will cause dm_warn() to be compiled out - it will do nothing + when called. + depends on DM + default y if !SPL_BUILD + default n if SPL_BUILD + +config DM_DEVICE_REMOVE + bool "Support device removal" + help + We can save some code space by dropping support for removing a + device. This is not normally required in SPL, so by default this + option is disabled for SPL. + depends on DM + default y if !SPL_BUILD + default n if SPL_BUILD + +config DM_STDIO + bool "Support stdio registration" + help + Normally serial drivers register with stdio so that they can be used + as normal output devices. In SPL we don't normally use stdio, so + we can omit this feature. + depends on DM + default y if !SPL_BUILD + default n if SPL_BUILD diff --git a/include/config_defaults.h b/include/config_defaults.h index 4d49315044..fa99838957 100644 --- a/include/config_defaults.h +++ b/include/config_defaults.h @@ -21,9 +21,15 @@ #define CONFIG_PARTITIONS 1 #ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_DM_WARN #define CONFIG_DM_WARN +#endif +#ifndef CONFIG_DM_DEVICE_REMOVE #define CONFIG_DM_DEVICE_REMOVE +#endif +#ifndef CONFIG_DM_STDIO #define CONFIG_DM_STDIO #endif +#endif #endif From 1967982a959609d663a1c25e4473a3209671e3aa Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:37 -0700 Subject: [PATCH 034/222] dm: test: Add a Kconfig file Add a file to control driver model test features. Signed-off-by: Simon Glass Reviewed-by: Masahiro Yamada --- Kconfig | 2 ++ test/Kconfig | 1 + test/dm/Kconfig | 8 ++++++++ 3 files changed, 11 insertions(+) create mode 100644 test/Kconfig create mode 100644 test/dm/Kconfig diff --git a/Kconfig b/Kconfig index 09e2bbe66a..6112a7778e 100644 --- a/Kconfig +++ b/Kconfig @@ -166,3 +166,5 @@ source "drivers/Kconfig" source "fs/Kconfig" source "lib/Kconfig" + +source "test/Kconfig" diff --git a/test/Kconfig b/test/Kconfig new file mode 100644 index 0000000000..1fb1716a4a --- /dev/null +++ b/test/Kconfig @@ -0,0 +1 @@ +source "test/dm/Kconfig" diff --git a/test/dm/Kconfig b/test/dm/Kconfig new file mode 100644 index 0000000000..a9d0298e0d --- /dev/null +++ b/test/dm/Kconfig @@ -0,0 +1,8 @@ +config DM_TEST + bool "Enable driver model test command" + depends on SANDBOX && CMD_DM + help + This enables the 'dm test' command which runs a series of unit + tests on the driver model code. Each subsystem (uclass) is tested. + If all is well then all tests pass although there will be a few + messages printed along the way. From f058f154a9cad41b8cc97ce85b9308051ff297b9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:38 -0700 Subject: [PATCH 035/222] dm: Add CMD_DM and CMD_DEMO to Kconfig Add Kconfig settings for these two options. Signed-off-by: Simon Glass Reviewed-by: Masahiro Yamada --- common/Kconfig | 23 +++++++++++++++++++++++ include/configs/sandbox.h | 1 - include/configs/sunxi-common.h | 1 - include/configs/ti_am335x_common.h | 1 - include/configs/uniphier.h | 2 -- 5 files changed, 23 insertions(+), 5 deletions(-) diff --git a/common/Kconfig b/common/Kconfig index fd84fa08bd..2ca002de27 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -153,6 +153,29 @@ endmenu menu "Device access commands" +config CMD_DM + bool "dm - Access to driver model information" + depends on DM + default y + help + Provides access to driver model data structures and information, + such as a list of devices, list of uclasses and the state of each + device (e.g. activated). This is not required for operation, but + can be useful to see the state of driver model for debugging or + interest. + +config CMD_DEMO + bool "demo - Demonstration commands for driver model" + depends on DM + help + Provides a 'demo' command which can be used to play around with + driver model. To use this properly you will need to enable one or + both of the demo devices (DM_DEMO_SHAPE and DM_DEMO_SIMPLE). + Otherwise you will always get an empty list of devices. The demo + devices are defined in the sandbox device tree, so the easiest + option is to use sandbox and pass the -d point to sandbox's + u-boot.dtb file. + config CMD_LOADB bool "loadb" help diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index e9d3f3226b..deff4d648c 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -24,7 +24,6 @@ #define CONFIG_BOOTSTAGE #define CONFIG_BOOTSTAGE_REPORT #define CONFIG_CMD_DEMO -#define CONFIG_CMD_DM #define CONFIG_DM_DEMO #define CONFIG_DM_DEMO_SIMPLE #define CONFIG_DM_DEMO_SHAPE diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index cea52dbf7b..325120da2e 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -28,7 +28,6 @@ #define CONFIG_SYS_TEXT_BASE 0x4a000000 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM) -# define CONFIG_CMD_DM # define CONFIG_DM_GPIO # define CONFIG_DM_SERIAL # define CONFIG_DW_SERIAL diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 598526bf95..35332b5ed8 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -23,7 +23,6 @@ #ifndef CONFIG_DM # define CONFIG_DM #endif -# define CONFIG_CMD_DM # define CONFIG_DM_GPIO # define CONFIG_DM_SERIAL # define CONFIG_OMAP_SERIAL diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 9420e6b48b..6f4ecc9b04 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -192,8 +192,6 @@ #define CONFIG_FAT_WRITE #define CONFIG_DOS_PARTITION -#define CONFIG_CMD_DM - /* memtest works on */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) From 34e609ca82d8846dc1fcee485e9a2ad71060f77f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:39 -0700 Subject: [PATCH 036/222] dm: Move Raspberry Pi driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config header and use Kconfig instead. Signed-off-by: Simon Glass --- arch/arm/Kconfig | 2 ++ arch/arm/cpu/arm1176/bcm2835/Kconfig | 12 ++++++++++++ include/configs/rpi.h | 6 ------ 3 files changed, 14 insertions(+), 6 deletions(-) create mode 100644 arch/arm/cpu/arm1176/bcm2835/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1f1ccad10a..41f3220580 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -839,6 +839,8 @@ endchoice source "arch/arm/cpu/arm926ejs/davinci/Kconfig" +source "arch/arm/cpu/arm1176/bcm2835/Kconfig" + source "arch/arm/cpu/armv7/exynos/Kconfig" source "arch/arm/cpu/armv7/highbank/Kconfig" diff --git a/arch/arm/cpu/arm1176/bcm2835/Kconfig b/arch/arm/cpu/arm1176/bcm2835/Kconfig new file mode 100644 index 0000000000..94f57d732f --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/Kconfig @@ -0,0 +1,12 @@ +if TARGET_RPI + +config DM + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +endif diff --git a/include/configs/rpi.h b/include/configs/rpi.h index c94f411202..ea19ad8d07 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -30,12 +30,6 @@ */ #define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 -/* Enable driver model */ -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO -#define CONFIG_DM_SERIAL - /* Memory layout */ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x00000000 From aab7e80d5fbc3aeb5feddae88c9cbb649d23345a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:40 -0700 Subject: [PATCH 037/222] dm: exynos: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- arch/arm/cpu/armv7/exynos/Kconfig | 15 +++++++++++++++ board/samsung/goni/Kconfig | 9 +++++++++ board/samsung/smdk5420/Kconfig | 6 ++++++ board/samsung/smdkc100/Kconfig | 9 +++++++++ include/configs/exynos-common.h | 6 ------ include/configs/peach-pi.h | 1 - include/configs/peach-pit.h | 1 - include/configs/s5p_goni.h | 4 ---- include/configs/smdkc100.h | 4 ---- 9 files changed, 39 insertions(+), 16 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index 7fcb5d2094..17ad567c19 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -65,6 +65,21 @@ endchoice config SYS_SOC default "exynos" +config DM + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + +config DM_SPI + default y if !SPL_BUILD + +config DM_SPI_FLASH + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + source "board/samsung/smdkv310/Kconfig" source "board/samsung/trats/Kconfig" source "board/samsung/universal_c210/Kconfig" diff --git a/board/samsung/goni/Kconfig b/board/samsung/goni/Kconfig index cbbf5a9315..2c5d3fc3be 100644 --- a/board/samsung/goni/Kconfig +++ b/board/samsung/goni/Kconfig @@ -12,4 +12,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "s5p_goni" +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + endif diff --git a/board/samsung/smdk5420/Kconfig b/board/samsung/smdk5420/Kconfig index a9d62fffa5..576abaea69 100644 --- a/board/samsung/smdk5420/Kconfig +++ b/board/samsung/smdk5420/Kconfig @@ -22,6 +22,9 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "peach-pi" +config DM_CROS_EC + default y + endif if TARGET_PEACH_PIT @@ -35,6 +38,9 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "peach-pit" +config DM_CROS_EC + default y + endif if TARGET_SMDK5420 diff --git a/board/samsung/smdkc100/Kconfig b/board/samsung/smdkc100/Kconfig index d2157b4d05..996fe3cc45 100644 --- a/board/samsung/smdkc100/Kconfig +++ b/board/samsung/smdkc100/Kconfig @@ -12,4 +12,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "smdkc100" +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + endif diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 1f3ee55098..2c4f35af9f 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -17,12 +17,6 @@ #include #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO -#define CONFIG_DM_SERIAL -#define CONFIG_DM_SPI -#define CONFIG_DM_SPI_FLASH #define CONFIG_ARCH_CPU_INIT #define CONFIG_DISPLAY_CPUINFO diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index a1c980d320..f724164d89 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -44,7 +44,6 @@ #define CONFIG_POWER_TPS65090_EC #define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */ -#define CONFIG_DM_CROS_EC #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_EXYNOS diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index 6516a72764..de12a9e1b1 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -44,7 +44,6 @@ #define CONFIG_POWER_TPS65090_EC #define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */ -#define CONFIG_DM_CROS_EC #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_EXYNOS diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index dfa2e07948..26167a4ece 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -290,9 +290,5 @@ #define CONFIG_OF_LIBFDT #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO -#define CONFIG_DM_SERIAL #endif /* __CONFIG_H */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 982d0dcea3..a7eb33ed43 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -224,9 +224,5 @@ #define CONFIG_OF_LIBFDT #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO -#define CONFIG_DM_SERIAL #endif /* __CONFIG_H */ From 9a89d50d8eca3db64ecd71db2d3273a5c57bbdb1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:41 -0700 Subject: [PATCH 038/222] dm: x86: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- arch/x86/Kconfig | 9 +++++++++ include/configs/x86-common.h | 5 ----- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index fef11f3552..bb3ff4393e 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -67,6 +67,15 @@ config TARGET_GALILEO endchoice +config DM + default y + +config DM_GPIO + default y + +config DM_SERIAL + default y + config RAMBASE hex default 0x100000 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 062e6c2219..277a95c199 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -22,11 +22,6 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO -#define CONFIG_DM_SERIAL - #define CONFIG_LMB #define CONFIG_OF_LIBFDT From d7a4b2e42e6f782c304e2ba0d6d48c2c77ccd8bf Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:42 -0700 Subject: [PATCH 039/222] dm: tegra: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- arch/arm/cpu/armv7/tegra-common/Kconfig | 18 ++++++++++++++++++ include/configs/tegra-common.h | 10 ---------- 2 files changed, 18 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv7/tegra-common/Kconfig b/arch/arm/cpu/armv7/tegra-common/Kconfig index 1446452c23..93dc7320c9 100644 --- a/arch/arm/cpu/armv7/tegra-common/Kconfig +++ b/arch/arm/cpu/armv7/tegra-common/Kconfig @@ -20,6 +20,24 @@ endchoice config USE_PRIVATE_LIBGCC default y if SPL_BUILD +config DM + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + +config DM_SPI + default y if !SPL_BUILD + +config DM_SPI_FLASH + default y if !SPL_BUILD + +config DM_I2C + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + source "arch/arm/cpu/armv7/tegra20/Kconfig" source "arch/arm/cpu/armv7/tegra30/Kconfig" source "arch/arm/cpu/armv7/tegra114/Kconfig" diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 8f1e370915..ef25980252 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -18,16 +18,6 @@ #include /* get chip and board defs */ -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO -#ifndef CONFIG_SPL_BUILD -#define CONFIG_DM_SERIAL -#endif -#define CONFIG_DM_SPI -#define CONFIG_DM_SPI_FLASH -#define CONFIG_DM_I2C - #define CONFIG_SYS_TIMER_RATE 1000000 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE From 001646c478429f7ee1e9a4aff667ad9ed3bc4ee4 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:44 -0700 Subject: [PATCH 040/222] dm: omap3: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- arch/arm/cpu/armv7/omap3/Kconfig | 9 +++++++++ board/compulab/cm_t335/Kconfig | 9 +++++++++ board/gumstix/pepper/Kconfig | 9 +++++++++ board/isee/igep0033/Kconfig | 9 +++++++++ board/phytec/pcm051/Kconfig | 9 +++++++++ board/silica/pengwyn/Kconfig | 9 +++++++++ board/ti/am335x/Kconfig | 10 ++++++++++ configs/am3517_crane_defconfig | 3 +++ configs/am3517_evm_defconfig | 3 +++ configs/cm_t3517_defconfig | 3 +++ configs/cm_t35_defconfig | 3 +++ configs/devkit8000_defconfig | 3 +++ configs/dig297_defconfig | 3 +++ configs/eco5pk_defconfig | 3 +++ configs/mcx_defconfig | 3 +++ configs/mt_ventoux_defconfig | 3 +++ configs/nokia_rx51_defconfig | 3 +++ configs/omap3_beagle_defconfig | 3 +++ configs/omap3_evm_defconfig | 3 +++ configs/omap3_evm_quick_mmc_defconfig | 3 +++ configs/omap3_evm_quick_nand_defconfig | 3 +++ configs/omap3_ha_defconfig | 3 +++ configs/omap3_logic_defconfig | 3 +++ configs/omap3_mvblx_defconfig | 3 +++ configs/omap3_pandora_defconfig | 3 +++ configs/omap3_sdp3430_defconfig | 3 +++ configs/tao3530_defconfig | 3 +++ configs/tricorder_defconfig | 3 +++ configs/tricorder_flash_defconfig | 3 +++ configs/twister_defconfig | 3 +++ include/configs/nokia_rx51.h | 1 + include/configs/ti_am335x_common.h | 5 ----- include/configs/ti_omap3_common.h | 4 ---- 33 files changed, 134 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index a029379a4f..2fe323230f 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -93,6 +93,15 @@ config TARGET_TWISTER endchoice +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if DM && !SPL_BUILD + +config DM_SERIAL + default y if DM && !SPL_BUILD + config SYS_SOC default "omap3" diff --git a/board/compulab/cm_t335/Kconfig b/board/compulab/cm_t335/Kconfig index 683efde764..aadbfbc84d 100644 --- a/board/compulab/cm_t335/Kconfig +++ b/board/compulab/cm_t335/Kconfig @@ -12,4 +12,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "cm_t335" +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + endif diff --git a/board/gumstix/pepper/Kconfig b/board/gumstix/pepper/Kconfig index 6f94612fe2..3099a9eae1 100644 --- a/board/gumstix/pepper/Kconfig +++ b/board/gumstix/pepper/Kconfig @@ -12,4 +12,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "pepper" +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + endif diff --git a/board/isee/igep0033/Kconfig b/board/isee/igep0033/Kconfig index e989e4b15c..2fe2ef1706 100644 --- a/board/isee/igep0033/Kconfig +++ b/board/isee/igep0033/Kconfig @@ -12,4 +12,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "am335x_igep0033" +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + endif diff --git a/board/phytec/pcm051/Kconfig b/board/phytec/pcm051/Kconfig index 2cc0d8872d..65094cf9fd 100644 --- a/board/phytec/pcm051/Kconfig +++ b/board/phytec/pcm051/Kconfig @@ -12,4 +12,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "pcm051" +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + endif diff --git a/board/silica/pengwyn/Kconfig b/board/silica/pengwyn/Kconfig index f2e1098f62..6ecda8041c 100644 --- a/board/silica/pengwyn/Kconfig +++ b/board/silica/pengwyn/Kconfig @@ -12,4 +12,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "pengwyn" +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if !SPL_BUILD + +config DM_SERIAL + default y if !SPL_BUILD + endif diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index 1ddbb2c67c..d6581ac468 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -37,4 +37,14 @@ config NOR_BOOT booted via NOR. In this case we will enable certain pinmux early as the ROM only partially sets up pinmux. We also default to using NOR for environment. + +config DM + default y if !SPL_BUILD + +config DM_GPIO + default y if DM && !SPL_BUILD + +config DM_SERIAL + default y if DM && !SPL_BUILD + endif diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig index cf9d8c7120..33b63c7e0e 100644 --- a/configs/am3517_crane_defconfig +++ b/configs/am3517_crane_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_AM3517_CRANE=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 2336f1ed82..7558b89e49 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_AM3517_EVM=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig index 4000d2c75d..6eb37c0695 100644 --- a/configs/cm_t3517_defconfig +++ b/configs/cm_t3517_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=n +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_CM_T3517=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig index 2bb616fb90..84a6fb0efa 100644 --- a/configs/cm_t35_defconfig +++ b/configs/cm_t35_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_CM_T35=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 578ae74bba..05a8700759 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_DEVKIT8000=y +CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_DM_GPIO=y diff --git a/configs/dig297_defconfig b/configs/dig297_defconfig index 95bc353926..0d182900f9 100644 --- a/configs/dig297_defconfig +++ b/configs/dig297_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_DIG297=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig index e45bdadf3f..e07df8bbd4 100644 --- a/configs/eco5pk_defconfig +++ b/configs/eco5pk_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_ECO5PK=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index c2031f85b7..6566d40c19 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_MCX=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index a0678bb823..a4747c6256 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_MT_VENTOUX=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index e03f586880..20a51e1d2f 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_NOKIA_RX51=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index a3e4c2c6d6..5a2d20b0df 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -3,3 +3,6 @@ CONFIG_SYS_EXTRA_OPTIONS="NAND" +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_OMAP3_BEAGLE=y +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DM_SERIAL=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index c749aa74b7..3bb191135e 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_OMAP3_EVM=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_evm_quick_mmc_defconfig b/configs/omap3_evm_quick_mmc_defconfig index e89bb82ac9..4e1471bac8 100644 --- a/configs/omap3_evm_quick_mmc_defconfig +++ b/configs/omap3_evm_quick_mmc_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_OMAP3_EVM_QUICK_MMC=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_evm_quick_nand_defconfig b/configs/omap3_evm_quick_nand_defconfig index e70fddd794..f98672f862 100644 --- a/configs/omap3_evm_quick_nand_defconfig +++ b/configs/omap3_evm_quick_nand_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_OMAP3_EVM_QUICK_NAND=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig index 50bffa90a2..1a8b1b4e9e 100644 --- a/configs/omap3_ha_defconfig +++ b/configs/omap3_ha_defconfig @@ -3,3 +3,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA" +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_TAO3530=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 5f2c063b6e..790ccbaa34 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_LOGIC=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_mvblx_defconfig b/configs/omap3_mvblx_defconfig index fb6edc252a..b75f51323e 100644 --- a/configs/omap3_mvblx_defconfig +++ b/configs/omap3_mvblx_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_MVBLX=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig index bf285378a3..dd0f17c20c 100644 --- a/configs/omap3_pandora_defconfig +++ b/configs/omap3_pandora_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_PANDORA=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/omap3_sdp3430_defconfig b/configs/omap3_sdp3430_defconfig index 1172c2adc5..b3a8745a02 100644 --- a/configs/omap3_sdp3430_defconfig +++ b/configs/omap3_sdp3430_defconfig @@ -1,3 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_OMAP3_SDP3430=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig index a5113890ef..39ed872349 100644 --- a/configs/tao3530_defconfig +++ b/configs/tao3530_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_TAO3530=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig index 7ea5e02f5e..3efe8290d9 100644 --- a/configs/tricorder_defconfig +++ b/configs/tricorder_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_TRICORDER=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig index f6e1c464aa..8f999ff621 100644 --- a/configs/tricorder_flash_defconfig +++ b/configs/tricorder_flash_defconfig @@ -3,3 +3,6 @@ CONFIG_SYS_EXTRA_OPTIONS="FLASHCARD" +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_TRICORDER=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/configs/twister_defconfig b/configs/twister_defconfig index 902373601a..d21a551f95 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_OMAP34XX=y +S:CONFIG_TARGET_TWISTER=y +CONFIG_DM=n +CONFIG_DM_SERIAL=n +CONFIG_DM_GPIO=n diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 46fc91e5e1..6e1f501b64 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -72,6 +72,7 @@ #define CONFIG_UBI_SIZE (512 << 10) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \ (128 << 10)) +#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* * Hardware drivers diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 35332b5ed8..4ce9d49c18 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -20,11 +20,6 @@ #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC #ifndef CONFIG_SPL_BUILD -#ifndef CONFIG_DM -# define CONFIG_DM -#endif -# define CONFIG_DM_GPIO -# define CONFIG_DM_SERIAL # define CONFIG_OMAP_SERIAL # define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 3c634ee680..77211de9a5 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -19,10 +19,6 @@ #include #ifndef CONFIG_SPL_BUILD -# define CONFIG_DM -# define CONFIG_CMD_DM -# define CONFIG_DM_GPIO -# define CONFIG_DM_SERIAL # define CONFIG_OMAP_SERIAL # define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif From f4aae59fdfc161cbcd3bc628af100d305d739033 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:45 -0700 Subject: [PATCH 041/222] dm: sandbox: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- arch/sandbox/Kconfig | 24 ++++++++++++++++++++++++ include/configs/sandbox.h | 11 ----------- 2 files changed, 24 insertions(+), 11 deletions(-) diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 3057325b47..2098b9c323 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -10,4 +10,28 @@ config SYS_BOARD config SYS_CONFIG_NAME default "sandbox" +config DM + default y + +config DM_GPIO + default y + +config DM_SERIAL + default y + +config DM_CROS_EC + default y + +config DM_SPI + default y + +config DM_SPI_FLASH + default y + +config DM_I2C + default y + +config DM_TEST + default y + endmenu diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index deff4d648c..bff01708f6 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -23,14 +23,6 @@ #define CONFIG_BOOTSTAGE #define CONFIG_BOOTSTAGE_REPORT -#define CONFIG_CMD_DEMO -#define CONFIG_DM_DEMO -#define CONFIG_DM_DEMO_SIMPLE -#define CONFIG_DM_DEMO_SHAPE -#define CONFIG_DM_GPIO -#define CONFIG_DM_TEST -#define CONFIG_DM_SERIAL -#define CONFIG_DM_CROS_EC #define CONFIG_SYS_STDIO_DEREGISTER @@ -95,8 +87,6 @@ #define CONFIG_CMD_SF_TEST #define CONFIG_CMD_SPI #define CONFIG_SPI_FLASH -#define CONFIG_DM_SPI -#define CONFIG_DM_SPI_FLASH #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SPI_FLASH_EON #define CONFIG_SPI_FLASH_GIGADEVICE @@ -107,7 +97,6 @@ #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND -#define CONFIG_DM_I2C #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C_SANDBOX #define CONFIG_I2C_EDID From 7b051c5235d6c82cbb396e4419e8d90c7d7635e7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:46 -0700 Subject: [PATCH 042/222] dm: sunxi: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass Acked-by: Ian Campbell --- configs/Linksprite_pcDuino3_fdt_defconfig | 2 ++ include/configs/sunxi-common.h | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/Linksprite_pcDuino3_fdt_defconfig b/configs/Linksprite_pcDuino3_fdt_defconfig index 3b6dfa6fa6..cfed375fc2 100644 --- a/configs/Linksprite_pcDuino3_fdt_defconfig +++ b/configs/Linksprite_pcDuino3_fdt_defconfig @@ -2,6 +2,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPH(2),USB_EHCI" CONFIG_FDTFILE="sun7i-a20-pcduino3.dtb" CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_OF_CONTROL=y CONFIG_OF_SEPARATE=y diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 325120da2e..0c5c18cb30 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_TEXT_BASE 0x4a000000 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM) -# define CONFIG_DM_GPIO -# define CONFIG_DM_SERIAL # define CONFIG_DW_SERIAL # define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif From 70c45aeb433d1c4c8f970927aba0cd45d701a7ae Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:47 -0700 Subject: [PATCH 043/222] dm: mx6: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- configs/cm_fx6_defconfig | 3 +++ include/configs/cm_fx6.h | 4 ---- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 3c0d64fecb..d2ebf692f3 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -2,3 +2,6 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL" +S:CONFIG_ARM=y +S:CONFIG_TARGET_CM_FX6=y +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DM_SERIAL=y diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 1f64495055..4008306944 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -21,13 +21,9 @@ #define CONFIG_MACH_TYPE 4273 #ifndef CONFIG_SPL_BUILD -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO #define CONFIG_CMD_GPIO -#define CONFIG_DM_SERIAL #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif From 0f36f957f4108d2d1d935e3076b7ae91f4e65a7d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Feb 2015 21:41:49 -0700 Subject: [PATCH 044/222] dm: socfpga: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- configs/socfpga_socrates_defconfig | 3 +++ include/configs/socfpga_common.h | 7 ------- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 0f3896d5f0..888bbb6c6f 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -3,3 +3,6 @@ CONFIG_SPL=y +S:CONFIG_TARGET_SOCFPGA_CYCLONE5=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" +CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 6b1f967c44..ee227fef0f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -190,10 +190,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); * QSPI support */ #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ -#define CONFIG_CMD_DM -#define CONFIG_DM -#define CONFIG_DM_SPI -#define CONFIG_DM_SPI_FLASH #define CONFIG_CADENCE_QSPI /* Enable multiple SPI NOR flash manufacturers */ #define CONFIG_SPI_FLASH /* SPI flash subsystem */ @@ -210,9 +206,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ -#define CONFIG_CMD_DM -#define CONFIG_DM -#define CONFIG_DM_SPI #define CONFIG_DESIGNWARE_SPI #define CONFIG_CMD_SPI #endif From 59088e4a762d5ea2791b6ecd39c81765ba4c4546 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Thu, 12 Feb 2015 13:48:04 +0900 Subject: [PATCH 045/222] dm: sh: serial: Add support driver model This adds driver model support with this driver. This was tested by Koelsch board and Gose board. Signed-off-by: Nobuhiro Iwamatsu Acked-by: Simon Glass --- drivers/serial/serial_sh.c | 347 ++++++++++++++++++--------- drivers/serial/serial_sh.h | 30 ++- include/dm/platform_data/serial_sh.h | 37 +++ 3 files changed, 288 insertions(+), 126 deletions(-) create mode 100644 include/dm/platform_data/serial_sh.h diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 7c1f271376..3641c9f834 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -1,18 +1,216 @@ /* * SuperH SCIF device driver. * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu + * Copyright (C) 2007,2008,2010, 2014 Nobuhiro Iwamatsu * Copyright (C) 2002 - 2008 Paul Mundt * * SPDX-License-Identifier: GPL-2.0+ */ #include +#include +#include #include #include -#include "serial_sh.h" #include #include +#include +#include "serial_sh.h" + +#if defined(CONFIG_CPU_SH7760) || \ + defined(CONFIG_CPU_SH7780) || \ + defined(CONFIG_CPU_SH7785) || \ + defined(CONFIG_CPU_SH7786) +static int scif_rxfill(struct uart_port *port) +{ + return sci_in(port, SCRFDR) & 0xff; +} +#elif defined(CONFIG_CPU_SH7763) +static int scif_rxfill(struct uart_port *port) +{ + if ((port->mapbase == 0xffe00000) || + (port->mapbase == 0xffe08000)) { + /* SCIF0/1*/ + return sci_in(port, SCRFDR) & 0xff; + } else { + /* SCIF2 */ + return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; + } +} +#elif defined(CONFIG_ARCH_SH7372) +static int scif_rxfill(struct uart_port *port) +{ + if (port->type == PORT_SCIFA) + return sci_in(port, SCFDR) & SCIF_RFDC_MASK; + else + return sci_in(port, SCRFDR); +} +#else +static int scif_rxfill(struct uart_port *port) +{ + return sci_in(port, SCFDR) & SCIF_RFDC_MASK; +} +#endif + +static void sh_serial_init_generic(struct uart_port *port) +{ + sci_out(port, SCSCR , SCSCR_INIT(port)); + sci_out(port, SCSCR , SCSCR_INIT(port)); + sci_out(port, SCSMR, 0); + sci_out(port, SCSMR, 0); + sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST); + sci_in(port, SCFCR); + sci_out(port, SCFCR, 0); +} + +static void +sh_serial_setbrg_generic(struct uart_port *port, int clk, int baudrate) +{ + if (port->clk_mode == EXT_CLK) { + unsigned short dl = DL_VALUE(baudrate, clk); + sci_out(port, DL, dl); + /* Need wait: Clock * 1/dl $B!_(B 1/16 */ + udelay((1000000 * dl * 16 / clk) * 1000 + 1); + } else { + sci_out(port, SCBRR, SCBRR_VALUE(baudrate, clk)); + } +} + +static void handle_error(struct uart_port *port) +{ + sci_in(port, SCxSR); + sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); + sci_in(port, SCLSR); + sci_out(port, SCLSR, 0x00); +} + +static int serial_raw_putc(struct uart_port *port, const char c) +{ + /* Tx fifo is empty */ + if (!(sci_in(port, SCxSR) & SCxSR_TEND(port))) + return -EAGAIN; + + sci_out(port, SCxTDR, c); + sci_out(port, SCxSR, sci_in(port, SCxSR) & ~SCxSR_TEND(port)); + + return 0; +} + +static int serial_rx_fifo_level(struct uart_port *port) +{ + return scif_rxfill(port); +} + +static int sh_serial_tstc_generic(struct uart_port *port) +{ + if (sci_in(port, SCxSR) & SCIF_ERRORS) { + handle_error(port); + return 0; + } + + return serial_rx_fifo_level(port) ? 1 : 0; +} + +static int serial_getc_check(struct uart_port *port) +{ + unsigned short status; + + status = sci_in(port, SCxSR); + + if (status & SCIF_ERRORS) + handle_error(port); + if (sci_in(port, SCLSR) & SCxSR_ORER(port)) + handle_error(port); + return status & (SCIF_DR | SCxSR_RDxF(port)); +} + +static int sh_serial_getc_generic(struct uart_port *port) +{ + unsigned short status; + char ch; + + if (!serial_getc_check(port)) + return -EAGAIN; + + ch = sci_in(port, SCxRDR); + status = sci_in(port, SCxSR); + + sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); + + if (status & SCIF_ERRORS) + handle_error(port); + + if (sci_in(port, SCLSR) & SCxSR_ORER(port)) + handle_error(port); + + return ch; +} + +#ifdef CONFIG_DM_SERIAL + +static int sh_serial_pending(struct udevice *dev, bool input) +{ + struct uart_port *priv = dev_get_priv(dev); + + return sh_serial_tstc_generic(priv); +} + +static int sh_serial_putc(struct udevice *dev, const char ch) +{ + struct uart_port *priv = dev_get_priv(dev); + + return serial_raw_putc(priv, ch); +} + +static int sh_serial_getc(struct udevice *dev) +{ + struct uart_port *priv = dev_get_priv(dev); + + return sh_serial_getc_generic(priv); +} + +static int sh_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct sh_serial_platdata *plat = dev_get_platdata(dev); + struct uart_port *priv = dev_get_priv(dev); + + sh_serial_setbrg_generic(priv, plat->clk, baudrate); + + return 0; +} + +static int sh_serial_probe(struct udevice *dev) +{ + struct sh_serial_platdata *plat = dev_get_platdata(dev); + struct uart_port *priv = dev_get_priv(dev); + + priv->membase = (unsigned char *)plat->base; + priv->mapbase = plat->base; + priv->type = plat->type; + priv->clk_mode = plat->clk_mode; + + sh_serial_init_generic(priv); + + return 0; +} + +static const struct dm_serial_ops sh_serial_ops = { + .putc = sh_serial_putc, + .pending = sh_serial_pending, + .getc = sh_serial_getc, + .setbrg = sh_serial_setbrg, +}; + +U_BOOT_DRIVER(serial_sh) = { + .name = "serial_sh", + .id = UCLASS_SERIAL, + .probe = sh_serial_probe, + .ops = &sh_serial_ops, + .flags = DM_FLAG_PRE_RELOC, + .priv_auto_alloc_size = sizeof(struct uart_port), +}; + +#else /* CONFIG_DM_SERIAL */ #if defined(CONFIG_CONS_SCIF0) # define SCIF_BASE SCIF0_BASE @@ -41,148 +239,66 @@ #endif static struct uart_port sh_sci = { - .membase = (unsigned char*)SCIF_BASE, + .membase = (unsigned char *)SCIF_BASE, .mapbase = SCIF_BASE, .type = SCIF_BASE_PORT, +#ifdef CONFIG_SCIF_USE_EXT_CLK + .clk_mode = EXT_CLK, +#endif }; static void sh_serial_setbrg(void) { DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_SCIF_USE_EXT_CLK - unsigned short dl = DL_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ); - sci_out(&sh_sci, DL, dl); - /* Need wait: Clock * 1/dl $B!_(B 1/16 */ - udelay((1000000 * dl * 16 / CONFIG_SYS_CLK_FREQ) * 1000 + 1); -#else - sci_out(&sh_sci, SCBRR, - SCBRR_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ)); -#endif + struct uart_port *port = &sh_sci; + + sh_serial_setbrg_generic(port, CONFIG_SH_SCIF_CLK_FREQ, gd->baudrate); } static int sh_serial_init(void) { - sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci)); - sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci)); - sci_out(&sh_sci, SCSMR, 0); - sci_out(&sh_sci, SCSMR, 0); - sci_out(&sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST); - sci_in(&sh_sci, SCFCR); - sci_out(&sh_sci, SCFCR, 0); + struct uart_port *port = &sh_sci; + sh_serial_init_generic(port); serial_setbrg(); + return 0; } -#if defined(CONFIG_CPU_SH7760) || \ - defined(CONFIG_CPU_SH7780) || \ - defined(CONFIG_CPU_SH7785) || \ - defined(CONFIG_CPU_SH7786) -static int scif_rxfill(struct uart_port *port) -{ - return sci_in(port, SCRFDR) & 0xff; -} -#elif defined(CONFIG_CPU_SH7763) -static int scif_rxfill(struct uart_port *port) -{ - if ((port->mapbase == 0xffe00000) || - (port->mapbase == 0xffe08000)) { - /* SCIF0/1*/ - return sci_in(port, SCRFDR) & 0xff; - } else { - /* SCIF2 */ - return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; - } -} -#elif defined(CONFIG_ARCH_SH7372) -static int scif_rxfill(struct uart_port *port) -{ - if (port->type == PORT_SCIFA) - return sci_in(port, SCFDR) & SCIF_RFDC_MASK; - else - return sci_in(port, SCRFDR); -} -#else -static int scif_rxfill(struct uart_port *port) -{ - return sci_in(port, SCFDR) & SCIF_RFDC_MASK; -} -#endif - -static int serial_rx_fifo_level(void) -{ - return scif_rxfill(&sh_sci); -} - -static void handle_error(void) -{ - sci_in(&sh_sci, SCxSR); - sci_out(&sh_sci, SCxSR, SCxSR_ERROR_CLEAR(&sh_sci)); - sci_in(&sh_sci, SCLSR); - sci_out(&sh_sci, SCLSR, 0x00); -} - -static void serial_raw_putc(const char c) -{ - while (1) { - /* Tx fifo is empty */ - if (sci_in(&sh_sci, SCxSR) & SCxSR_TEND(&sh_sci)) - break; - } - - sci_out(&sh_sci, SCxTDR, c); - sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TEND(&sh_sci)); -} - static void sh_serial_putc(const char c) { - if (c == '\n') - serial_raw_putc('\r'); - serial_raw_putc(c); + struct uart_port *port = &sh_sci; + + if (c == '\n') { + while (1) { + if (serial_raw_putc(port, '\r') != -EAGAIN) + break; + } + } + while (1) { + if (serial_raw_putc(port, c) != -EAGAIN) + break; + } } static int sh_serial_tstc(void) { - if (sci_in(&sh_sci, SCxSR) & SCIF_ERRORS) { - handle_error(); - return 0; - } + struct uart_port *port = &sh_sci; - return serial_rx_fifo_level() ? 1 : 0; -} - - -static int serial_getc_check(void) -{ - unsigned short status; - - status = sci_in(&sh_sci, SCxSR); - - if (status & SCIF_ERRORS) - handle_error(); - if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci)) - handle_error(); - return status & (SCIF_DR | SCxSR_RDxF(&sh_sci)); + return sh_serial_tstc_generic(port); } static int sh_serial_getc(void) { - unsigned short status; - char ch; + struct uart_port *port = &sh_sci; + int ch; - while (!serial_getc_check()) - ; + while (1) { + ch = sh_serial_getc_generic(port); + if (ch != -EAGAIN) + break; + } - ch = sci_in(&sh_sci, SCxRDR); - status = sci_in(&sh_sci, SCxSR); - - sci_out(&sh_sci, SCxSR, SCxSR_RDxF_CLEAR(&sh_sci)); - - if (status & SCIF_ERRORS) - handle_error(); - - if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci)) - handle_error(); return ch; } @@ -206,3 +322,4 @@ __weak struct serial_device *default_serial_console(void) { return &sh_serial_drv; } +#endif /* CONFIG_DM_SERIAL */ diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index ef88c8f273..528aa7351d 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -2,18 +2,16 @@ * Copy and modify from linux/drivers/serial/sh-sci.h */ +#include + struct uart_port { unsigned long iobase; /* in/out[bwl] */ unsigned char *membase; /* read/write[bwl] */ unsigned long mapbase; /* for ioremap */ - unsigned int type; /* port type */ + enum sh_serial_type type; /* port type */ + enum sh_clk_mode clk_mode; /* clock mode */ }; -#define PORT_SCI 52 -#define PORT_SCIF 53 -#define PORT_SCIFA 83 -#define PORT_SCIFB 93 - #if defined(CONFIG_H83007) || defined(CONFIG_H83068) #include #endif @@ -526,6 +524,7 @@ SCIF_FNS(SCFDR, 0x1c, 16) SCIF_FNS(SCxTDR, 0x20, 8) SCIF_FNS(SCxRDR, 0x24, 8) SCIF_FNS(SCLSR, 0x00, 0) +SCIF_FNS(DL, 0x00, 0) /* dummy */ #elif defined(CONFIG_ARCH_SH7372) || \ defined(CONFIG_R8A7740) SCIF_FNS(SCSMR, 0x00, 16) @@ -541,6 +540,7 @@ SCIF_FNS(SCRFDR, 0x3c, 16) SCIx_FNS(SCxTDR, 0x20, 8, 0x40, 8) SCIx_FNS(SCxRDR, 0x24, 8, 0x60, 8) SCIF_FNS(SCLSR, 0x00, 0) +SCIF_FNS(DL, 0x00, 0) /* dummy */ #elif defined(CONFIG_CPU_SH7723) ||\ defined(CONFIG_CPU_SH7724) SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) @@ -555,6 +555,7 @@ SCIF_FNS(SCFER, 0x10, 16) SCIF_FNS(SCFCR, 0x18, 16) SCIF_FNS(SCFDR, 0x1c, 16) SCIF_FNS(SCLSR, 0x24, 16) +SCIF_FNS(DL, 0x00, 0) /* dummy */ #else /* reg SCI/SH3 SCI/SH4 SCIF/SH3 SCIF/SH4 SCI/H8*/ /* name off sz off sz off sz off sz off sz*/ @@ -583,18 +584,21 @@ SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) SCIF_FNS(SCLSR, 0, 0, 0x28, 16) #else + SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) #if defined(CONFIG_CPU_SH7722) SCIF_FNS(SCSPTR, 0, 0, 0, 0) #else SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) #endif +SCIF_FNS(SCLSR, 0, 0, 0x24, 16) +#endif #if defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) SCIF_FNS(DL, 0, 0, 0x30, 16) SCIF_FNS(CKS, 0, 0, 0x34, 16) -#endif -SCIF_FNS(SCLSR, 0, 0, 0x24, 16) +#else +SCIF_FNS(DL, 0, 0, 0x0, 0) /* dummy */ #endif #endif #define sci_in(port, reg) sci_##reg##_in(port) @@ -725,14 +729,14 @@ static inline int sci_rxd_in(struct uart_port *port) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) #elif defined(CONFIG_CPU_SH7723) ||\ defined(CONFIG_CPU_SH7724) -static inline int scbrr_calc(struct uart_port port, int bps, int clk) +static inline int scbrr_calc(struct uart_port *port, int bps, int clk) { - if (port.type == PORT_SCIF) + if (port->type == PORT_SCIF) return (clk+16*bps)/(32*bps)-1; else return ((clk*2)+16*bps)/(16*bps)-1; } -#define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk) +#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk) #elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ @@ -742,3 +746,7 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk) #else /* Generic SH */ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif + +#ifndef DL_VALUE +#define DL_VALUE(bps, clk) 0 +#endif diff --git a/include/dm/platform_data/serial_sh.h b/include/dm/platform_data/serial_sh.h new file mode 100644 index 0000000000..0271ad67b3 --- /dev/null +++ b/include/dm/platform_data/serial_sh.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2014 Nobuhiro Iwamatsu + * Copyright (c) 2014 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __serial_sh_h +#define __serial_sh_h + +enum sh_clk_mode { + INT_CLK, + EXT_CLK, +}; + +enum sh_serial_type { + PORT_SCI, + PORT_SCIF, + PORT_SCIFA, + PORT_SCIFB, +}; + +/* + * Information about SCIF port + * + * @base: Register base address + * @clk: Input clock rate, used for calculating the baud rate divisor + * @clk_mode: Clock mode, set internal (INT) or external (EXT) + * @type: Type of SCIF + */ +struct sh_serial_platdata { + unsigned long base; + unsigned int clk; + enum sh_clk_mode clk_mode; + enum sh_serial_type type; +}; +#endif /* __serial_sh_h */ From 757fe635df1c5fc9448db84e458482cf63f0fd21 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 11 Feb 2015 16:32:57 -0700 Subject: [PATCH 046/222] dm: at91: Drop use of ATMEL_PIO_PORTS in the header file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With driver model the number of PIO ports is defined by platform data, so remove it from the header file. Signed-off-by: Simon Glass Acked-by: Andreas Bießmann --- arch/arm/include/asm/arch-at91/at91_pio.h | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h index 50464ffe8e..301227880a 100644 --- a/arch/arm/include/asm/arch-at91/at91_pio.h +++ b/arch/arm/include/asm/arch-at91/at91_pio.h @@ -114,14 +114,10 @@ typedef union at91_pio { at91_port_t pioa; at91_port_t piob; at91_port_t pioc; - #if (ATMEL_PIO_PORTS > 3) - at91_port_t piod; - #endif - #if (ATMEL_PIO_PORTS > 4) - at91_port_t pioe; - #endif - } ; - at91_port_t port[ATMEL_PIO_PORTS]; + at91_port_t piod; /* not present in all hardware */ + at91_port_t pioe;/* not present in all hardware */ + }; + at91_port_t port[5]; } at91_pio_t; #ifdef CONFIG_AT91_GPIO From ad885e45702029362575cec27e4808585c279832 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 11 Feb 2015 16:32:58 -0700 Subject: [PATCH 047/222] dm: at91: snapper: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- configs/snapper9260_defconfig | 3 +++ configs/snapper9g20_defconfig | 3 +++ include/configs/snapper9260.h | 4 ---- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 7055e2a13b..035146c657 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -1,3 +1,6 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_ARM=y CONFIG_TARGET_SNAPPER9260=y +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DM_SERIAL=y diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 2faae15930..66c44ccf78 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -1,3 +1,6 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" CONFIG_ARM=y CONFIG_TARGET_SNAPPER9260=y +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DM_SERIAL=y diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 9fa644f7c2..712f9b74ce 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -21,10 +21,6 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_DM -#define CONFIG_CMD_DM -#define CONFIG_DM_GPIO -#define CONFIG_DM_SERIAL #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* CPU */ From b724bd7d63498449d3960bbd3075ba94d7152890 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 11 Feb 2015 16:32:59 -0700 Subject: [PATCH 048/222] dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to Kconfig Move this option to Kconfig and update all boards. Signed-off-by: Simon Glass --- Kconfig | 19 +++++++++++++++++++ arch/arm/cpu/armv7/exynos/Kconfig | 6 ++++++ arch/arm/cpu/armv7/omap3/Kconfig | 6 ++++++ arch/arm/cpu/armv7/tegra-common/Kconfig | 6 ++++++ arch/arm/cpu/armv7/uniphier/Kconfig | 6 ++++++ arch/x86/Kconfig | 6 ++++++ board/ti/am335x/Kconfig | 6 ++++++ configs/Linksprite_pcDuino3_fdt_defconfig | 2 ++ configs/am335x_igep0033_defconfig | 2 ++ configs/cm_fx6_defconfig | 2 ++ configs/cm_t335_defconfig | 2 ++ configs/gwventana_defconfig | 2 ++ configs/mx6dlsabreauto_defconfig | 2 ++ configs/mx6qsabreauto_defconfig | 2 ++ configs/mx6qsabresd_defconfig | 2 ++ configs/mx6sxsabresd_defconfig | 2 ++ configs/nokia_rx51_defconfig | 2 ++ configs/pcm051_rev1_defconfig | 2 ++ configs/pcm051_rev3_defconfig | 2 ++ configs/pengwyn_defconfig | 2 ++ configs/pepper_defconfig | 2 ++ configs/rpi_defconfig | 2 ++ configs/s5p_goni_defconfig | 2 ++ configs/sandbox_defconfig | 2 ++ configs/smdkc100_defconfig | 2 ++ configs/snapper9260_defconfig | 2 ++ configs/snapper9g20_defconfig | 2 ++ configs/stv0991_defconfig | 2 ++ include/configs/cm_fx6.h | 3 --- include/configs/exynos-common.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/mx6sabre_common.h | 1 - include/configs/mx6sxsabresd.h | 1 - include/configs/nokia_rx51.h | 1 - include/configs/novena.h | 1 - include/configs/rpi.h | 1 - include/configs/s5p_goni.h | 1 - include/configs/sandbox.h | 1 - include/configs/smdkc100.h | 3 --- include/configs/snapper9260.h | 1 - include/configs/stv0991.h | 1 - include/configs/sunxi-common.h | 1 - include/configs/tegra-common.h | 1 - include/configs/ti_am335x_common.h | 1 - include/configs/ti_omap3_common.h | 1 - include/configs/uniphier.h | 2 -- include/configs/x86-common.h | 1 - 47 files changed, 97 insertions(+), 24 deletions(-) diff --git a/Kconfig b/Kconfig index 6112a7778e..75bab7f6cc 100644 --- a/Kconfig +++ b/Kconfig @@ -56,6 +56,25 @@ config CC_OPTIMIZE_FOR_SIZE This option is enabled by default for U-Boot. +config SYS_MALLOC_F + bool "Enable malloc() pool before relocation" + default 0x400 + help + Before relocation memory is very limited on many platforms. Still, + we can provide a small malloc() pool if needed. Driver model in + particular needs this to operate, so that it can allocate the + initial serial device and any others that are needed. + +config SYS_MALLOC_F_LEN + hex "Size of malloc() pool before relocation" + depends on SYS_MALLOC_F + default 0x400 + help + Before relocation memory is very limited on many platforms. Still, + we can provide a small malloc() pool if needed. Driver model in + particular needs this to operate, so that it can allocate the + initial serial device and any others that are needed. + menuconfig EXPERT bool "Configure standard U-Boot features (expert users)" help diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index 17ad567c19..2064efa761 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -80,6 +80,12 @@ config DM_SPI_FLASH config DM_GPIO default y if !SPL_BUILD +config SYS_MALLOC_F + default y if !SPL_BUILD + +config SYS_MALLOC_F_LEN + default 0x400 if !SPL_BUILD + source "board/samsung/smdkv310/Kconfig" source "board/samsung/trats/Kconfig" source "board/samsung/universal_c210/Kconfig" diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index 2fe323230f..46440981b3 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -102,6 +102,12 @@ config DM_GPIO config DM_SERIAL default y if DM && !SPL_BUILD +config SYS_MALLOC_F + default y if DM && !SPL_BUILD + +config SYS_MALLOC_F_LEN + default 0x400 if DM && !SPL_BUILD + config SYS_SOC default "omap3" diff --git a/arch/arm/cpu/armv7/tegra-common/Kconfig b/arch/arm/cpu/armv7/tegra-common/Kconfig index 93dc7320c9..ee3246929a 100644 --- a/arch/arm/cpu/armv7/tegra-common/Kconfig +++ b/arch/arm/cpu/armv7/tegra-common/Kconfig @@ -17,6 +17,12 @@ config TEGRA124 endchoice +config SYS_MALLOC_F + default y + +config SYS_MALLOC_F_LEN + default 0x1800 + config USE_PRIVATE_LIBGCC default y if SPL_BUILD diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig index 5c5a84fe56..1a47ac9029 100644 --- a/arch/arm/cpu/armv7/uniphier/Kconfig +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -48,6 +48,12 @@ config DCC_MICRO_SUPPORT_CARD endchoice +config SYS_MALLOC_F + default y + +config SYS_MALLOC_F_LEN + default 0x2000 + config CMD_PINMON bool "Enable boot mode pins monitor command" default y diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index bb3ff4393e..35d24e4aca 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -76,6 +76,12 @@ config DM_GPIO config DM_SERIAL default y +config SYS_MALLOC_F + default y + +config SYS_MALLOC_F_LEN + default 0x800 + config RAMBASE hex default 0x100000 diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index d6581ac468..a20e0c1ab9 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -47,4 +47,10 @@ config DM_GPIO config DM_SERIAL default y if DM && !SPL_BUILD +config SYS_MALLOC_F + default y if DM && !SPL_BUILD + +config SYS_MALLOC_F_LEN + default 0x400 if DM && !SPL_BUILD + endif diff --git a/configs/Linksprite_pcDuino3_fdt_defconfig b/configs/Linksprite_pcDuino3_fdt_defconfig index cfed375fc2..1e749cded1 100644 --- a/configs/Linksprite_pcDuino3_fdt_defconfig +++ b/configs/Linksprite_pcDuino3_fdt_defconfig @@ -13,3 +13,5 @@ CONFIG_OF_SEPARATE=y +S:CONFIG_DRAM_CLK=480 +S:CONFIG_DRAM_ZQ=122 +S:CONFIG_DRAM_EMR1=4 +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig index 23f0a32d63..f3544b5238 100644 --- a/configs/am335x_igep0033_defconfig +++ b/configs/am335x_igep0033_defconfig @@ -1,3 +1,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_TARGET_AM335X_IGEP0033=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index d2ebf692f3..631698c95d 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -5,3 +5,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL" CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_SERIAL=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 5ff4f9c4a5..5c1d3cf3a5 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -1,3 +1,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_TARGET_CM_T335=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig index 4cddbdd655..5b1a4c4e58 100644 --- a/configs/gwventana_defconfig +++ b/configs/gwventana_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL" +S:CONFIG_ARM=y +S:CONFIG_TARGET_GW_VENTANA=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index b649935912..ccdfe31992 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL" CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 7d86700b30..fe3d797851 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q" CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index 67c1b77e05..09b01905e6 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index f23d48f361..72e0f103ec 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX" CONFIG_ARM=y CONFIG_TARGET_MX6SXSABRESD=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 20a51e1d2f..1bb7664ed7 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -4,3 +4,5 @@ CONFIG_TARGET_NOKIA_RX51=y CONFIG_DM=n CONFIG_DM_SERIAL=n CONFIG_DM_GPIO=n +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index 8b27682997..baa2b231b0 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="REV1" +S:CONFIG_ARM=y +S:CONFIG_TARGET_PCM051=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 27ad6ff26b..b5c62a6a3b 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="REV3" +S:CONFIG_ARM=y +S:CONFIG_TARGET_PCM051=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index 1b9aa68260..cbdd404c70 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -1,3 +1,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_TARGET_PENGWYN=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig index 22c7bb4a60..14266ef875 100644 --- a/configs/pepper_defconfig +++ b/configs/pepper_defconfig @@ -1,3 +1,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_TARGET_PEPPER=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 9379cf00d4..98d3199ccd 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -1,2 +1,4 @@ CONFIG_ARM=y CONFIG_TARGET_RPI=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 618e590802..33e6fb8848 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -2,3 +2,5 @@ CONFIG_ARM=y CONFIG_ARCH_S5PC1XX=y CONFIG_TARGET_S5P_GONI=y CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 660063ebf3..0bf5ea34d0 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -5,3 +5,5 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_DM=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 041030f942..e933a329b6 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -2,3 +2,5 @@ CONFIG_ARM=y CONFIG_TARGET_SMDKC100=y CONFIG_ARCH_S5PC1XX=y CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 035146c657..97c49f3363 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -4,3 +4,5 @@ CONFIG_TARGET_SNAPPER9260=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_SERIAL=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 66c44ccf78..d5f1d9fa19 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -4,3 +4,5 @@ CONFIG_TARGET_SNAPPER9260=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_SERIAL=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index a05e9917b6..37b10ba893 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="stv0991" CONFIG_ARM=y CONFIG_TARGET_STV0991=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 4008306944..4207504464 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -21,10 +21,7 @@ #define CONFIG_MACH_TYPE 4273 #ifndef CONFIG_SPL_BUILD - #define CONFIG_CMD_GPIO - -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif /* Display information on boot */ diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 2c4f35af9f..59676ae61b 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -36,7 +36,6 @@ #define CONFIG_ENV_OVERWRITE /* Size of malloc() pool before and after relocation */ -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) /* select serial console configuration */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 4f137fc96b..620f9501d2 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -39,7 +39,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* Init Functions */ #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index f0f721e9b7..80e48d141e 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -27,7 +27,6 @@ #define CONFIG_DM #define CONFIG_DM_THERMAL -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #define CONFIG_IMX6_THERMAL #define CONFIG_SYS_GENERIC_BOARD diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 404b922d39..1005b9e6bc 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -229,7 +229,6 @@ #define CONFIG_DM #define CONFIG_DM_THERMAL -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #define CONFIG_IMX6_THERMAL #define CONFIG_CMD_FUSE diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 6e1f501b64..46fc91e5e1 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -72,7 +72,6 @@ #define CONFIG_UBI_SIZE (512 << 10) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \ (128 << 10)) -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* * Hardware drivers diff --git a/include/configs/novena.h b/include/configs/novena.h index ea75d2c2b9..074110c939 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -116,7 +116,6 @@ #define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* SPL */ #define CONFIG_SPL_FAT_SUPPORT diff --git a/include/configs/rpi.h b/include/configs/rpi.h index ea19ad8d07..7ad8d08021 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -46,7 +46,6 @@ CONFIG_SYS_SDRAM_SIZE - \ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_MALLOC_LEN SZ_4M -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #define CONFIG_SYS_MEMTEST_START 0x00100000 #define CONFIG_SYS_MEMTEST_END 0x00200000 #define CONFIG_LOADADDR 0x00200000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 26167a4ece..8fadc68239 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -40,7 +40,6 @@ #define CONFIG_CMDLINE_EDITING /* Size of malloc() pool before and after relocation */ -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) /* diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index bff01708f6..5c116508d0 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -60,7 +60,6 @@ /* * Size of malloc() pool, before and after relocation */ -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #define CONFIG_MALLOC_F_ADDR 0x0010000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a7eb33ed43..080fc3a845 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -48,9 +48,6 @@ */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) -/* Small malloc pool before relocation */ -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) - /* * select serial console configuration */ diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 712f9b74ce..6c685965a2 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* CPU */ #define CONFIG_ARCH_CPU_INIT diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index fd9bd638c6..071b1c2ca7 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -28,7 +28,6 @@ (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) -#define CONFIG_SYS_MALLOC_F_LEN 0x2000 #define CONFIG_DM /* serial port (PL011) configuration */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 0c5c18cb30..09889eeb44 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -29,7 +29,6 @@ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM) # define CONFIG_DW_SERIAL -# define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif /* diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index ef25980252..005fc6aeb3 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -37,7 +37,6 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 4ce9d49c18..20a55f4aa8 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -21,7 +21,6 @@ #ifndef CONFIG_SPL_BUILD # define CONFIG_OMAP_SERIAL -# define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif #include diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 77211de9a5..840e108e05 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -20,7 +20,6 @@ #ifndef CONFIG_SPL_BUILD # define CONFIG_OMAP_SERIAL -# define CONFIG_SYS_MALLOC_F_LEN (1 << 10) #endif /* The chip has SDRC controller */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 6f4ecc9b04..3f738fb642 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -80,8 +80,6 @@ #define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE #define CONFIG_SMC911X_32_BIT -#define CONFIG_SYS_MALLOC_F_LEN 0x2000 - /*----------------------------------------------------------------------- * MMU and Cache Setting *----------------------------------------------------------------------*/ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 277a95c199..994874ca60 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -187,7 +187,6 @@ #define CONFIG_SYS_STACK_SIZE (32 * 1024) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN 0x200000 -#define CONFIG_SYS_MALLOC_F_LEN (2 << 10) /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE From be9891c52d5472156949a3137be5f48355fd3f29 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 11 Feb 2015 16:33:00 -0700 Subject: [PATCH 049/222] dm: Drop unused driver model config_defaults These are now in Kconfig so we can drop them from the header file. Signed-off-by: Simon Glass --- include/config_defaults.h | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/include/config_defaults.h b/include/config_defaults.h index fa99838957..ad08c1d335 100644 --- a/include/config_defaults.h +++ b/include/config_defaults.h @@ -20,16 +20,4 @@ #define CONFIG_ZLIB 1 #define CONFIG_PARTITIONS 1 -#ifndef CONFIG_SPL_BUILD -#ifndef CONFIG_DM_WARN -#define CONFIG_DM_WARN -#endif -#ifndef CONFIG_DM_DEVICE_REMOVE -#define CONFIG_DM_DEVICE_REMOVE -#endif -#ifndef CONFIG_DM_STDIO -#define CONFIG_DM_STDIO -#endif -#endif - #endif From c9cac3f8413c1f67d1e1b7a1770e584584107cd2 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 10 Feb 2015 14:46:32 +0800 Subject: [PATCH 050/222] dm: introduce dev_get_addr interface Abstracting dev_get_addr can improve drivers that want to get device's address. Signed-off-by: Peng Fan Acked-by: Igor Grinberg Acked-by: Simon Glass --- drivers/core/device.c | 12 ++++++++++++ include/dm/device.h | 10 ++++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/core/device.c b/drivers/core/device.c index b73d3b8961..73c3e07c28 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -449,3 +449,15 @@ enum uclass_id device_get_uclass_id(struct udevice *dev) { return dev->uclass->uc_drv->id; } + +#ifdef CONFIG_OF_CONTROL +fdt_addr_t dev_get_addr(struct udevice *dev) +{ + return fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); +} +#else +fdt_addr_t dev_get_addr(struct udevice *dev) +{ + return FDT_ADDR_T_NONE; +} +#endif diff --git a/include/dm/device.h b/include/dm/device.h index 81afa8c628..7a48eb88b8 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -12,6 +12,7 @@ #define _DM_DEVICE_H #include +#include #include #include @@ -351,4 +352,13 @@ int device_find_first_child(struct udevice *parent, struct udevice **devp); */ int device_find_next_child(struct udevice **devp); +/** + * dev_get_addr() - Get the reg property of a device + * + * @dev: Pointer to a device + * + * @return addr + */ +fdt_addr_t dev_get_addr(struct udevice *dev); + #endif From 637a7693185d00c392df8a9886cb17f462e9a51b Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 10 Feb 2015 14:46:33 +0800 Subject: [PATCH 051/222] dm:gpio:mxc add a bank_index entry in platdata Add a new entry in platdata structure and intialize bank_index in mxc_plat array. This new entry can avoid using `plat - mxc_plat` by using `plat->bank_index`. Signed-off-by: Peng Fan Acked-by: Igor Grinberg Acked-by: Simon Glass --- drivers/gpio/mxc_gpio.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 8bb9e39b72..c52dd19ce3 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -23,6 +23,7 @@ enum mxc_gpio_direction { #define GPIO_PER_BANK 32 struct mxc_gpio_plat { + int bank_index; struct gpio_regs *regs; }; @@ -259,19 +260,19 @@ static const struct dm_gpio_ops gpio_mxc_ops = { }; static const struct mxc_gpio_plat mxc_plat[] = { - { (struct gpio_regs *)GPIO1_BASE_ADDR }, - { (struct gpio_regs *)GPIO2_BASE_ADDR }, - { (struct gpio_regs *)GPIO3_BASE_ADDR }, + { 0, (struct gpio_regs *)GPIO1_BASE_ADDR }, + { 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, + { 2, (struct gpio_regs *)GPIO3_BASE_ADDR }, #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ defined(CONFIG_MX53) || defined(CONFIG_MX6) - { (struct gpio_regs *)GPIO4_BASE_ADDR }, + { 3, (struct gpio_regs *)GPIO4_BASE_ADDR }, #endif #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) - { (struct gpio_regs *)GPIO5_BASE_ADDR }, - { (struct gpio_regs *)GPIO6_BASE_ADDR }, + { 4, (struct gpio_regs *)GPIO5_BASE_ADDR }, + { 5, (struct gpio_regs *)GPIO6_BASE_ADDR }, #endif #if defined(CONFIG_MX53) || defined(CONFIG_MX6) - { (struct gpio_regs *)GPIO7_BASE_ADDR }, + { 6, (struct gpio_regs *)GPIO7_BASE_ADDR }, #endif }; @@ -283,7 +284,7 @@ static int mxc_gpio_probe(struct udevice *dev) int banknum; char name[18], *str; - banknum = plat - mxc_plat; + banknum = plat->bank_index; sprintf(name, "GPIO%d_", banknum + 1); str = strdup(name); if (!str) From 99c0ae16d8b2ebfb7381ba77d4e37e7bda734402 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 10 Feb 2015 14:46:34 +0800 Subject: [PATCH 052/222] dm:gpio:mxc add DT support This patch add DT support for mxc gpio driver. There are one place using CONFIG_OF_CONTROL macro. 1. The U_BOOT_DEVICES and mxc_plat array are complied out. To DT, platdata is alloced using calloc, so there is no need to use mxc_plat. The following situations are tested, and all work fine: 1. with DM, without DT 2. with DM and DT 3. without DM Since device tree has not been upstreamed, if want to test this patch. The followings need to be done. + pieces of code does not gpio_request when using gpio_direction_xxx and etc, need to request gpio. + move the gpio settings from board_early_init_f to board_init + define CONFIG_DM ,CONFIG_DM_GPIO and CONFIG_OF_CONTROL + Add device tree file and do related configuration in `make ARCH=arm menuconfig` These will be done in future patches by step. Signed-off-by: Peng Fan Acked-by: Igor Grinberg Acked-by: Simon Glass --- drivers/gpio/mxc_gpio.c | 81 ++++++++++++++++++++++++++++++++--------- 1 file changed, 64 insertions(+), 17 deletions(-) diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index c52dd19ce3..815407bb03 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -151,6 +151,9 @@ int gpio_direction_output(unsigned gpio, int value) #endif #ifdef CONFIG_DM_GPIO +#include +DECLARE_GLOBAL_DATA_PTR; + static int mxc_gpio_is_output(struct gpio_regs *regs, int offset) { u32 val; @@ -259,23 +262,6 @@ static const struct dm_gpio_ops gpio_mxc_ops = { .get_function = mxc_gpio_get_function, }; -static const struct mxc_gpio_plat mxc_plat[] = { - { 0, (struct gpio_regs *)GPIO1_BASE_ADDR }, - { 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, - { 2, (struct gpio_regs *)GPIO3_BASE_ADDR }, -#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ - defined(CONFIG_MX53) || defined(CONFIG_MX6) - { 3, (struct gpio_regs *)GPIO4_BASE_ADDR }, -#endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) - { 4, (struct gpio_regs *)GPIO5_BASE_ADDR }, - { 5, (struct gpio_regs *)GPIO6_BASE_ADDR }, -#endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6) - { 6, (struct gpio_regs *)GPIO7_BASE_ADDR }, -#endif -}; - static int mxc_gpio_probe(struct udevice *dev) { struct mxc_bank_info *bank = dev_get_priv(dev); @@ -296,12 +282,72 @@ static int mxc_gpio_probe(struct udevice *dev) return 0; } +static int mxc_gpio_bind(struct udevice *dev) +{ + struct mxc_gpio_plat *plat = dev->platdata; + fdt_addr_t addr; + + /* + * If platdata already exsits, directly return. + * Actually only when DT is not supported, platdata + * is statically initialized in U_BOOT_DEVICES.Here + * will return. + */ + if (plat) + return 0; + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -ENODEV; + + /* + * TODO: + * When every board is converted to driver model and DT is supported, + * this can be done by auto-alloc feature, but not using calloc + * to alloc memory for platdata. + */ + plat = calloc(1, sizeof(*plat)); + if (!plat) + return -ENOMEM; + + plat->regs = (struct gpio_regs *)addr; + plat->bank_index = dev->req_seq; + dev->platdata = plat; + + return 0; +} + +static const struct udevice_id mxc_gpio_ids[] = { + { .compatible = "fsl,imx35-gpio" }, + { } +}; + U_BOOT_DRIVER(gpio_mxc) = { .name = "gpio_mxc", .id = UCLASS_GPIO, .ops = &gpio_mxc_ops, .probe = mxc_gpio_probe, .priv_auto_alloc_size = sizeof(struct mxc_bank_info), + .of_match = mxc_gpio_ids, + .bind = mxc_gpio_bind, +}; + +#ifndef CONFIG_OF_CONTROL +static const struct mxc_gpio_plat mxc_plat[] = { + { 0, (struct gpio_regs *)GPIO1_BASE_ADDR }, + { 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, + { 2, (struct gpio_regs *)GPIO3_BASE_ADDR }, +#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ + defined(CONFIG_MX53) || defined(CONFIG_MX6) + { 3, (struct gpio_regs *)GPIO4_BASE_ADDR }, +#endif +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) + { 4, (struct gpio_regs *)GPIO5_BASE_ADDR }, + { 5, (struct gpio_regs *)GPIO6_BASE_ADDR }, +#endif +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) + { 6, (struct gpio_regs *)GPIO7_BASE_ADDR }, +#endif }; U_BOOT_DEVICES(mxc_gpios) = { @@ -321,3 +367,4 @@ U_BOOT_DEVICES(mxc_gpios) = { #endif }; #endif +#endif From 484fdf5ba058b07be5ca82763aa2b72063540ef3 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 2 Feb 2015 16:31:59 +0100 Subject: [PATCH 053/222] dm: Add support for all targets which requires MANUAL_RELOC Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA relocation (mostly only GOT) where functions aray are not updated. This patch is fixing function pointers for DM core and serial-uclass to ensure that relocated functions are called. Signed-off-by: Michal Simek Acked-by: Simon Glass --- drivers/core/root.c | 64 ++++++++++++++++++++++++++++++++++ drivers/serial/serial-uclass.c | 16 +++++++++ 2 files changed, 80 insertions(+) diff --git a/drivers/core/root.c b/drivers/core/root.c index 73e3c7228e..9b5c6bb10c 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -37,6 +37,65 @@ struct udevice *dm_root(void) return gd->dm_root; } +#if defined(CONFIG_NEEDS_MANUAL_RELOC) +void fix_drivers(void) +{ + struct driver *drv = + ll_entry_start(struct driver, driver); + const int n_ents = ll_entry_count(struct driver, driver); + struct driver *entry; + + for (entry = drv; entry != drv + n_ents; entry++) { + if (entry->of_match) + entry->of_match = (const struct udevice_id *) + ((u32)entry->of_match + gd->reloc_off); + if (entry->bind) + entry->bind += gd->reloc_off; + if (entry->probe) + entry->probe += gd->reloc_off; + if (entry->remove) + entry->remove += gd->reloc_off; + if (entry->unbind) + entry->unbind += gd->reloc_off; + if (entry->ofdata_to_platdata) + entry->ofdata_to_platdata += gd->reloc_off; + if (entry->child_pre_probe) + entry->child_pre_probe += gd->reloc_off; + if (entry->child_post_remove) + entry->child_post_remove += gd->reloc_off; + /* OPS are fixed in every uclass post_probe function */ + if (entry->ops) + entry->ops += gd->reloc_off; + } +} + +void fix_uclass(void) +{ + struct uclass_driver *uclass = + ll_entry_start(struct uclass_driver, uclass); + const int n_ents = ll_entry_count(struct uclass_driver, uclass); + struct uclass_driver *entry; + + for (entry = uclass; entry != uclass + n_ents; entry++) { + if (entry->post_bind) + entry->post_bind += gd->reloc_off; + if (entry->pre_unbind) + entry->pre_unbind += gd->reloc_off; + if (entry->post_probe) + entry->post_probe += gd->reloc_off; + if (entry->pre_remove) + entry->pre_remove += gd->reloc_off; + if (entry->init) + entry->init += gd->reloc_off; + if (entry->destroy) + entry->destroy += gd->reloc_off; + /* FIXME maybe also need to fix these ops */ + if (entry->ops) + entry->ops += gd->reloc_off; + } +} +#endif + int dm_init(void) { int ret; @@ -47,6 +106,11 @@ int dm_init(void) } INIT_LIST_HEAD(&DM_UCLASS_ROOT_NON_CONST); +#if defined(CONFIG_NEEDS_MANUAL_RELOC) + fix_drivers(); + fix_uclass(); +#endif + ret = device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST); if (ret) return ret; diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 9131a8f93d..3fc7104359 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -258,6 +258,22 @@ static int serial_post_probe(struct udevice *dev) #endif int ret; +#if defined(CONFIG_NEEDS_MANUAL_RELOC) + if (ops->setbrg) + ops->setbrg += gd->reloc_off; + if (ops->getc) + ops->getc += gd->reloc_off; + if (ops->putc) + ops->putc += gd->reloc_off; + if (ops->pending) + ops->pending += gd->reloc_off; + if (ops->clear) + ops->clear += gd->reloc_off; +#if CONFIG_POST & CONFIG_SYS_POST_UART + if (ops->loop) + ops->loop += gd->reloc_off +#endif +#endif /* Set the baud rate */ if (ops->setbrg) { ret = ops->setbrg(dev, gd->baudrate); From 3b7f0e109cd3f3fba387784f3f6debd4127cdefd Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Mon, 12 Jan 2015 19:17:07 +0300 Subject: [PATCH 054/222] arm: rmobile: Add SILK board support SILK is an entry level development board based on R-Car E2 SoC (R8A7794) This commit supports the following peripherals: - SCIF, I2C, Ethernet, QSPI, MMC, USB Host Signed-off-by: Vladimir Barinov Reviewed-by: Tom Rini Signed-off-by: Nobuhiro Iwamatsu --- arch/arm/cpu/armv7/rmobile/Kconfig | 6 +- board/renesas/silk/Kconfig | 12 + board/renesas/silk/MAINTAINERS | 6 + board/renesas/silk/Makefile | 10 + board/renesas/silk/qos.c | 951 +++++++++++++++++++++++++++++ board/renesas/silk/silk.c | 175 ++++++ configs/silk_defconfig | 3 + include/configs/silk.h | 117 ++++ 8 files changed, 1279 insertions(+), 1 deletion(-) create mode 100644 board/renesas/silk/Kconfig create mode 100644 board/renesas/silk/MAINTAINERS create mode 100644 board/renesas/silk/Makefile create mode 100644 board/renesas/silk/qos.c create mode 100644 board/renesas/silk/silk.c create mode 100644 configs/silk_defconfig create mode 100644 include/configs/silk.h diff --git a/arch/arm/cpu/armv7/rmobile/Kconfig b/arch/arm/cpu/armv7/rmobile/Kconfig index 6d94199de8..35866508a3 100644 --- a/arch/arm/cpu/armv7/rmobile/Kconfig +++ b/arch/arm/cpu/armv7/rmobile/Kconfig @@ -21,6 +21,9 @@ config TARGET_KZM9G config TARGET_ALT bool "Alt board" +config TARGET_SILK + bool "Silk board" + endchoice config SYS_SOC @@ -28,7 +31,7 @@ config SYS_SOC config RMOBILE_EXTRAM_BOOT bool "Enable boot from RAM" - depends on TARGET_ALT || TARGET_KOELSCH || TARGET_LAGER + depends on TARGET_ALT || TARGET_KOELSCH || TARGET_LAGER || TARGET_SILK default n source "board/atmark-techno/armadillo-800eva/Kconfig" @@ -37,5 +40,6 @@ source "board/renesas/koelsch/Kconfig" source "board/renesas/lager/Kconfig" source "board/kmc/kzm9g/Kconfig" source "board/renesas/alt/Kconfig" +source "board/renesas/silk/Kconfig" endif diff --git a/board/renesas/silk/Kconfig b/board/renesas/silk/Kconfig new file mode 100644 index 0000000000..07aee0e50f --- /dev/null +++ b/board/renesas/silk/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SILK + +config SYS_BOARD + default "silk" + +config SYS_VENDOR + default "renesas" + +config SYS_CONFIG_NAME + default "silk" + +endif diff --git a/board/renesas/silk/MAINTAINERS b/board/renesas/silk/MAINTAINERS new file mode 100644 index 0000000000..b566ccfbd9 --- /dev/null +++ b/board/renesas/silk/MAINTAINERS @@ -0,0 +1,6 @@ +SILK BOARD +M: Cogent Embedded, Inc. +S: Maintained +F: board/renesas/silk/ +F: include/configs/silk.h +F: configs/silk_defconfig diff --git a/board/renesas/silk/Makefile b/board/renesas/silk/Makefile new file mode 100644 index 0000000000..e6eea6142e --- /dev/null +++ b/board/renesas/silk/Makefile @@ -0,0 +1,10 @@ +# +# board/renesas/silk/Makefile +# +# Copyright (C) 2015 Renesas Electronics Corporation +# Copyright (C) 2015 Cogent Embedded, Inc. +# +# SPDX-License-Identifier: GPL-2.0 +# + +obj-y := silk.o qos.o ../rcar-gen2-common/common.o diff --git a/board/renesas/silk/qos.c b/board/renesas/silk/qos.c new file mode 100644 index 0000000000..4f6e46ce52 --- /dev/null +++ b/board/renesas/silk/qos.c @@ -0,0 +1,951 @@ +/* + * board/renesas/silk/qos.c + * + * Copyright (C) 2015 Renesas Electronics Corporation + * Copyright (C) 2015 Cogent Embedded, Inc. + * + * SPDX-License-Identifier: GPL-2.0 + * + */ + +#include +#include +#include +#include +#include + +#if defined(CONFIG_RMOBILE_EXTRAM_BOOT) +/* QoS version 0.11 */ + +enum { + DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04, + DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09, + DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14, + DBSC3_15, + DBSC3_NR, +}; + +static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = { + [DBSC3_00] = DBSC3_0_QOS_R0_BASE, + [DBSC3_01] = DBSC3_0_QOS_R1_BASE, + [DBSC3_02] = DBSC3_0_QOS_R2_BASE, + [DBSC3_03] = DBSC3_0_QOS_R3_BASE, + [DBSC3_04] = DBSC3_0_QOS_R4_BASE, + [DBSC3_05] = DBSC3_0_QOS_R5_BASE, + [DBSC3_06] = DBSC3_0_QOS_R6_BASE, + [DBSC3_07] = DBSC3_0_QOS_R7_BASE, + [DBSC3_08] = DBSC3_0_QOS_R8_BASE, + [DBSC3_09] = DBSC3_0_QOS_R9_BASE, + [DBSC3_10] = DBSC3_0_QOS_R10_BASE, + [DBSC3_11] = DBSC3_0_QOS_R11_BASE, + [DBSC3_12] = DBSC3_0_QOS_R12_BASE, + [DBSC3_13] = DBSC3_0_QOS_R13_BASE, + [DBSC3_14] = DBSC3_0_QOS_R14_BASE, + [DBSC3_15] = DBSC3_0_QOS_R15_BASE, +}; + +static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = { + [DBSC3_00] = DBSC3_0_QOS_W0_BASE, + [DBSC3_01] = DBSC3_0_QOS_W1_BASE, + [DBSC3_02] = DBSC3_0_QOS_W2_BASE, + [DBSC3_03] = DBSC3_0_QOS_W3_BASE, + [DBSC3_04] = DBSC3_0_QOS_W4_BASE, + [DBSC3_05] = DBSC3_0_QOS_W5_BASE, + [DBSC3_06] = DBSC3_0_QOS_W6_BASE, + [DBSC3_07] = DBSC3_0_QOS_W7_BASE, + [DBSC3_08] = DBSC3_0_QOS_W8_BASE, + [DBSC3_09] = DBSC3_0_QOS_W9_BASE, + [DBSC3_10] = DBSC3_0_QOS_W10_BASE, + [DBSC3_11] = DBSC3_0_QOS_W11_BASE, + [DBSC3_12] = DBSC3_0_QOS_W12_BASE, + [DBSC3_13] = DBSC3_0_QOS_W13_BASE, + [DBSC3_14] = DBSC3_0_QOS_W14_BASE, + [DBSC3_15] = DBSC3_0_QOS_W15_BASE, +}; + +void qos_init(void) +{ + int i; + struct rcar_s3c *s3c; + struct rcar_s3c_qos *s3c_qos; + struct rcar_dbsc3_qos *qos_addr; + struct rcar_mxi *mxi; + struct rcar_mxi_qos *mxi_qos; + struct rcar_axi_qos *axi_qos; + + /* DBSC DBADJ2 */ + writel(0x20042004, DBSC3_0_DBADJ2); + + /* S3C -QoS */ + s3c = (struct rcar_s3c *)S3C_BASE; + writel(0x1F0D0B0A, &s3c->s3crorr); + writel(0x1F0D0B09, &s3c->s3cworr); + + /* QoS Control Registers */ + s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE; + writel(0x00890089, &s3c_qos->s3cqos0); + writel(0x20960010, &s3c_qos->s3cqos1); + writel(0x20302030, &s3c_qos->s3cqos2); + writel(0x20AA2200, &s3c_qos->s3cqos3); + writel(0x00002032, &s3c_qos->s3cqos4); + writel(0x20960010, &s3c_qos->s3cqos5); + writel(0x20302030, &s3c_qos->s3cqos6); + writel(0x20AA2200, &s3c_qos->s3cqos7); + writel(0x00002032, &s3c_qos->s3cqos8); + + s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE; + writel(0x00890089, &s3c_qos->s3cqos0); + writel(0x20960010, &s3c_qos->s3cqos1); + writel(0x20302030, &s3c_qos->s3cqos2); + writel(0x20AA2200, &s3c_qos->s3cqos3); + writel(0x00002032, &s3c_qos->s3cqos4); + writel(0x20960010, &s3c_qos->s3cqos5); + writel(0x20302030, &s3c_qos->s3cqos6); + writel(0x20AA2200, &s3c_qos->s3cqos7); + writel(0x00002032, &s3c_qos->s3cqos8); + + s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE; + writel(0x80928092, &s3c_qos->s3cqos0); + writel(0x20960020, &s3c_qos->s3cqos1); + writel(0x20302030, &s3c_qos->s3cqos2); + writel(0x20AA20DC, &s3c_qos->s3cqos3); + writel(0x00002032, &s3c_qos->s3cqos4); + writel(0x20960020, &s3c_qos->s3cqos5); + writel(0x20302030, &s3c_qos->s3cqos6); + writel(0x20AA20DC, &s3c_qos->s3cqos7); + writel(0x00002032, &s3c_qos->s3cqos8); + + s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE; + writel(0x00820082, &s3c_qos->s3cqos0); + writel(0x20960020, &s3c_qos->s3cqos1); + writel(0x20302030, &s3c_qos->s3cqos2); + writel(0x20AA20FA, &s3c_qos->s3cqos3); + writel(0x00002032, &s3c_qos->s3cqos4); + writel(0x20960020, &s3c_qos->s3cqos5); + writel(0x20302030, &s3c_qos->s3cqos6); + writel(0x20AA20FA, &s3c_qos->s3cqos7); + writel(0x00002032, &s3c_qos->s3cqos8); + + /* DBSC -QoS */ + /* DBSC0 - Read */ + for (i = DBSC3_00; i < DBSC3_NR; i++) { + qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i]; + writel(0x00000002, &qos_addr->dblgcnt); + writel(0x0000207D, &qos_addr->dbtmval0); + writel(0x00002053, &qos_addr->dbtmval1); + writel(0x0000202A, &qos_addr->dbtmval2); + writel(0x00001FBD, &qos_addr->dbtmval3); + writel(0x00000001, &qos_addr->dbrqctr); + writel(0x00002064, &qos_addr->dbthres0); + writel(0x0000203E, &qos_addr->dbthres1); + writel(0x00002019, &qos_addr->dbthres2); + writel(0x00000001, &qos_addr->dblgqon); + } + + /* DBSC0 - Write */ + for (i = DBSC3_00; i < DBSC3_NR; i++) { + qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i]; + writel(0x00000002, &qos_addr->dblgcnt); + writel(0x0000207D, &qos_addr->dbtmval0); + writel(0x00002053, &qos_addr->dbtmval1); + writel(0x00002043, &qos_addr->dbtmval2); + writel(0x00002030, &qos_addr->dbtmval3); + writel(0x00000001, &qos_addr->dbrqctr); + writel(0x00002064, &qos_addr->dbthres0); + writel(0x0000203E, &qos_addr->dbthres1); + writel(0x00002031, &qos_addr->dbthres2); + writel(0x00000001, &qos_addr->dblgqon); + } + + /* CCI-400 -QoS */ + writel(0x20000800, CCI_400_MAXOT_1); + writel(0x20000800, CCI_400_MAXOT_2); + writel(0x0000000C, CCI_400_QOSCNTL_1); + writel(0x0000000C, CCI_400_QOSCNTL_2); + + /* MXI -QoS */ + /* Transaction Control (MXI) */ + mxi = (struct rcar_mxi *)MXI_BASE; + writel(0x00000013, &mxi->mxrtcr); + writel(0x00000013, &mxi->mxwtcr); + writel(0x00780080, &mxi->mxsaar0); + writel(0x02000800, &mxi->mxsaar1); + + /* QoS Control (MXI) */ + mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE; + writel(0x0000000C, &mxi_qos->vspdu0); + writel(0x0000000E, &mxi_qos->du0); + + /* AXI -QoS */ + /* Transaction Control (MXI) */ + axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x000020A6, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x0000214C, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x000020A6, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x000020A6, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002029, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x000020A6, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x0000214C, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x0000214C, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x000020A6, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + /* QoS Register (RT-AXI) */ + axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + /* QoS Register (MP-AXI) */ + axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002037, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002014, &axi_qos->qosctset0); + writel(0x00000040, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002014, &axi_qos->qosctset0); + writel(0x00000040, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00001FF0, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00002001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x00002053, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE; + writel(0x00000000, &axi_qos->qosconf); + writel(0x0000206E, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + /* QoS Register (SYS-AXI256) */ + axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x000020EB, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x000020EB, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x000020EB, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x000020EB, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + /* QoS Register (CCI-AXI) */ + axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x00002245, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002004, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000000, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + /* QoS Register (Media-AXI) */ + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x000020DC, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x000020AA, &axi_qos->qosthres0); + writel(0x00002032, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE; + writel(0x00000002, &axi_qos->qosconf); + writel(0x000020DC, &axi_qos->qosctset0); + writel(0x00002096, &axi_qos->qosctset1); + writel(0x00002030, &axi_qos->qosctset2); + writel(0x00002030, &axi_qos->qosctset3); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x000020AA, &axi_qos->qosthres0); + writel(0x00002032, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002190, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002190, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00000001, &axi_qos->qosthres0); + writel(0x00000001, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002190, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002190, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00000001, &axi_qos->qosthres0); + writel(0x00000001, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002190, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002190, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00000001, &axi_qos->qosthres0); + writel(0x00000001, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00001FF0, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00002001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00000001, &axi_qos->qosthres0); + writel(0x00000001, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00000001, &axi_qos->qosthres0); + writel(0x00000001, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE; + writel(0x00000003, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE; + writel(0x00000003, &axi_qos->qosconf); + writel(0x000020C8, &axi_qos->qosctset0); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE; + writel(0x00000003, &axi_qos->qosconf); + writel(0x00002063, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE; + writel(0x00000003, &axi_qos->qosconf); + writel(0x00002063, &axi_qos->qosctset0); + writel(0x00000001, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002073, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002073, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00000001, &axi_qos->qosthres0); + writel(0x00000001, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002073, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002073, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00000001, &axi_qos->qosthres0); + writel(0x00000001, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); + + axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE; + writel(0x00000001, &axi_qos->qosconf); + writel(0x00002073, &axi_qos->qosctset0); + writel(0x00000020, &axi_qos->qosreqctr); + writel(0x00002064, &axi_qos->qosthres0); + writel(0x00002004, &axi_qos->qosthres1); + writel(0x00000001, &axi_qos->qosthres2); + writel(0x00000001, &axi_qos->qosqon); +} +#else /* CONFIG_RMOBILE_EXTRAM_BOOT */ +void qos_init(void) +{ +} +#endif /* CONFIG_RMOBILE_EXTRAM_BOOT */ diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c new file mode 100644 index 0000000000..8818211d32 --- /dev/null +++ b/board/renesas/silk/silk.c @@ -0,0 +1,175 @@ +/* + * board/renesas/silk/silk.c + * + * Copyright (C) 2015 Renesas Electronics Corporation + * Copyright (C) 2015 Cogent Embedded, Inc. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "qos.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define CLK2MHZ(clk) (clk / 1000 / 1000) +void s_init(void) +{ + struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; + struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; + + /* Watchdog init */ + writel(0xA5A5A500, &rwdt->rwtcsra); + writel(0xA5A5A500, &swdt->swtcsra); + + /* QoS */ + qos_init(); + +#ifndef CONFIG_DCACHE_OFF + /* + * The caches are disabled when ACTLR.SMP is set to 0 + * regardless of the value of the SCTLR.C (cache enable bit) + * on Cortex-A7 MPCore + */ + asm volatile( + "mrc 15, 0, r0, c1, c0, 1\n" /* read ACTLR */ + "orr r0, r0, #(1 << 6)\n" /* set ACTLR.SMP bit */ + "mcr p15, 0, r0, c1, c0, 1\n"); /* write ACTLR */ +#endif +} + +#define TMU0_MSTP125 (1 << 25) +#define SCIF2_MSTP719 (1 << 19) +#define ETHER_MSTP813 (1 << 13) +#define IIC1_MSTP323 (1 << 23) +#define MMC0_MSTP315 (1 << 15) + +int board_early_init_f(void) +{ + /* TMU */ + mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + + /* SCIF2 */ + mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF2_MSTP719); + + /* ETHER */ + mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813); + + /* IIC1 / sh-i2c ch1 */ + mstp_clrbits_le32(MSTPSR3, SMSTPCR3, IIC1_MSTP323); + +#ifdef CONFIG_SH_MMCIF + /* MMC */ + mstp_clrbits_le32(MSTPSR3, SMSTPCR3, MMC0_MSTP315); +#endif + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + /* Init PFC controller */ + r8a7794_pinmux_init(); + + /* Ether Enable */ + gpio_request(GPIO_FN_ETH_CRS_DV, NULL); + gpio_request(GPIO_FN_ETH_RX_ER, NULL); + gpio_request(GPIO_FN_ETH_RXD0, NULL); + gpio_request(GPIO_FN_ETH_RXD1, NULL); + gpio_request(GPIO_FN_ETH_LINK, NULL); + gpio_request(GPIO_FN_ETH_REFCLK, NULL); + gpio_request(GPIO_FN_ETH_MDIO, NULL); + gpio_request(GPIO_FN_ETH_TXD1, NULL); + gpio_request(GPIO_FN_ETH_TX_EN, NULL); + gpio_request(GPIO_FN_ETH_MAGIC, NULL); + gpio_request(GPIO_FN_ETH_TXD0, NULL); + gpio_request(GPIO_FN_ETH_MDC, NULL); + gpio_request(GPIO_FN_IRQ8, NULL); + + /* PHY reset */ + gpio_request(GPIO_GP_1_24, NULL); + gpio_direction_output(GPIO_GP_1_24, 0); + mdelay(20); + gpio_set_value(GPIO_GP_1_24, 1); + udelay(1); + + return 0; +} + +#define CXR24 0xEE7003C0 /* MAC address high register */ +#define CXR25 0xEE7003C8 /* MAC address low register */ +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_SH_ETHER + int ret = -ENODEV; + u32 val; + unsigned char enetaddr[6]; + + ret = sh_eth_initialize(bis); + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + return ret; + + /* Set Mac address */ + val = enetaddr[0] << 24 | enetaddr[1] << 16 | + enetaddr[2] << 8 | enetaddr[3]; + writel(val, CXR24); + + val = enetaddr[4] << 8 | enetaddr[5]; + writel(val, CXR25); + + return ret; +#else + return 0; +#endif +} + +int board_mmc_init(bd_t *bis) +{ + int ret = 0; + +#ifdef CONFIG_SH_MMCIF + /* MMC0 */ + gpio_request(GPIO_GP_4_31, NULL); + gpio_set_value(GPIO_GP_4_31, 1); + + ret = mmcif_mmc_init(); +#endif + return ret; +} + +int dram_init(void) +{ + gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + + return 0; +} + +const struct rmobile_sysinfo sysinfo = { + CONFIG_RMOBILE_BOARD_STRING +}; + +void reset_cpu(ulong addr) +{ + u8 val; + + i2c_set_bus_num(1); /* PowerIC connected to ch1 */ + i2c_read(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1); + val |= 0x02; + i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1); +} diff --git a/configs/silk_defconfig b/configs/silk_defconfig new file mode 100644 index 0000000000..515ee3372b --- /dev/null +++ b/configs/silk_defconfig @@ -0,0 +1,3 @@ +CONFIG_ARM=y +CONFIG_RMOBILE=y +CONFIG_TARGET_SILK=y diff --git a/include/configs/silk.h b/include/configs/silk.h new file mode 100644 index 0000000000..a4235e94d0 --- /dev/null +++ b/include/configs/silk.h @@ -0,0 +1,117 @@ +/* + * include/configs/silk.h + * This file is silk board configuration. + * + * Copyright (C) 2015 Renesas Electronics Corporation + * Copyright (C) 2015 Cogent Embedded, Inc. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __SILK_H +#define __SILK_H + +#undef DEBUG +#define CONFIG_R8A7794 +#define CONFIG_RMOBILE_BOARD_STRING "Silk" + +#include "rcar-gen2-common.h" + +#if defined(CONFIG_RMOBILE_EXTRAM_BOOT) +#define CONFIG_SYS_TEXT_BASE 0x70000000 +#else +#define CONFIG_SYS_TEXT_BASE 0xE6304000 +#endif + +#if defined(CONFIG_RMOBILE_EXTRAM_BOOT) +#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC +#else +#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC +#endif +#define STACK_AREA_SIZE 0xC000 +#define LOW_LEVEL_MERAM_STACK \ + (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + +/* MEMORY */ +#define RCAR_GEN2_SDRAM_BASE 0x40000000 +#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) +#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) + +/* SCIF */ +#define CONFIG_SCIF_CONSOLE +#define CONFIG_CONS_SCIF2 +#define CONFIG_SCIF_USE_EXT_CLK + +/* FLASH */ +#define CONFIG_SPI +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SH_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_QUAD +#define CONFIG_SYS_NO_FLASH + +/* SH Ether */ +#define CONFIG_NET_MULTI +#define CONFIG_SH_ETHER +#define CONFIG_SH_ETHER_USE_PORT 0 +#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +/* Board Clock */ +#define RMOBILE_XTAL_CLK 20000000u +#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK +#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ +#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) +#define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) +#define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */ + +#define CONFIG_SYS_TMU_CLK_DIV 4 + +/* i2c */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SH +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 +#define CONFIG_SYS_I2C_SH_SPEED0 400000 +#define CONFIG_SYS_I2C_SH_SPEED1 400000 +#define CONFIG_SYS_I2C_SH_SPEED2 400000 +#define CONFIG_SH_I2C_DATA_HIGH 4 +#define CONFIG_SH_I2C_DATA_LOW 5 +#define CONFIG_SH_I2C_CLOCK 10000000 + +#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ + +/* USB */ +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_RMOBILE +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +/* MMCIF */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_MMC +#define CONFIG_SH_MMCIF +#define CONFIG_SH_MMCIF_ADDR 0xee200000 +#define CONFIG_SH_MMCIF_CLK 48000000 + +/* Module stop status bits */ +/* INTC-RT */ +#define CONFIG_SMSTP0_ENA 0x00400000 +/* MSIF */ +#define CONFIG_SMSTP2_ENA 0x00002000 +/* INTC-SYS, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 +/* SCIF2 */ +#define CONFIG_SMSTP7_ENA 0x00080000 + +#endif /* __SILK_H */ From a973be74c206d6cc04ccee9de6831c1e98d9527b Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Mon, 9 Feb 2015 03:27:47 +0300 Subject: [PATCH 055/222] arm: rmobile: Add missed header file for Silk board This file was missed in the commit https://patchwork.ozlabs.org/patch/427801/ Signed-off-by: Vladimir Barinov Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/silk/qos.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 board/renesas/silk/qos.h diff --git a/board/renesas/silk/qos.h b/board/renesas/silk/qos.h new file mode 100644 index 0000000000..75a20bb075 --- /dev/null +++ b/board/renesas/silk/qos.h @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2015 Renesas Electronics Corporation + * Copyright (C) 2015 Cogent Embedded, Inc. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __QOS_H__ +#define __QOS_H__ + +void qos_init(void); + +#endif From 3eda55a32d3787303934a1575684a8f61c362892 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Fri, 23 Jan 2015 09:31:57 +0900 Subject: [PATCH 056/222] arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register r8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we need to enable SMP bit of Auxiliary Control Register. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S index d47546a11d..a5dbbea9e1 100644 --- a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S +++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S @@ -40,7 +40,7 @@ do_lowlevel_init: and r1, r1, #0x7F00 lsrs r1, r1, #8 cmp r1, #0x4C /* 0x4C is ID of r8a7794 */ - beq _exit_init_l2_a15 + beq _enable_actlr_smp /* surpress wfe if ca15 */ tst r4, #4 @@ -64,6 +64,16 @@ do_lowlevel_init: orrne r0, r0, #0x20 /* L2CTLR[5] */ #endif mcrne p15, 1, r0, c9, c0, 2 + + b _exit_init_l2_a15 + +_enable_actlr_smp: /* R8A7794 only (CA7) */ +#ifndef CONFIG_DCACHE_OFF + mrc p15, 0, r0, c1, c0, 1 + orr r0, r0, #0x40 + mcr p15, 0, r0, c1, c0, 1 +#endif + _exit_init_l2_a15: ldr r3, =(CONFIG_SYS_INIT_SP_ADDR) sub sp, r3, #4 From 79bf043e371cfb7bed276e3ce795f066a364f5ff Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 10 Feb 2015 15:26:10 +0900 Subject: [PATCH 057/222] ARM: rmobile: silk: Remove initialization of ACTLR.SMP Initialization of ACTLR.SMP is in lowlevel_init. This remove duplicate function. Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/silk/silk.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c index 8818211d32..dfd9a9d3e4 100644 --- a/board/renesas/silk/silk.c +++ b/board/renesas/silk/silk.c @@ -38,18 +38,6 @@ void s_init(void) /* QoS */ qos_init(); - -#ifndef CONFIG_DCACHE_OFF - /* - * The caches are disabled when ACTLR.SMP is set to 0 - * regardless of the value of the SCTLR.C (cache enable bit) - * on Cortex-A7 MPCore - */ - asm volatile( - "mrc 15, 0, r0, c1, c0, 1\n" /* read ACTLR */ - "orr r0, r0, #(1 << 6)\n" /* set ACTLR.SMP bit */ - "mcr p15, 0, r0, c1, c0, 1\n"); /* write ACTLR */ -#endif } #define TMU0_MSTP125 (1 << 25) From f13606b77d32344d35f6430eb45cffd47302e244 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 13 Jan 2015 18:35:46 +0300 Subject: [PATCH 058/222] arc: introduce U-Boot port for ARCv2 ISA ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary incompatible with ISAv1 (AKA ARCompact). Significant difference between ISAv2 and v1 is implementation of interrupt vector table. In v1 it is implemented in the same way as on many other architectures - as a special location where user may put whether code executed in place (if machine word of space is enough) or jump to a full-scale interrupt handler. In v2 interrupt table is just an array of adresses of real interrupt handlers. That requires a separate section for IVT that is not encoded as code by assembler. This change adds support for following cores: * ARC EM6 (simple 32-bit microcontroller without MMU) * ARC HS36 (advanced 32-bit microcontroller without MMU) * ARC HS38 (advanced 32-bit microcontroller with MMU) As a part of ARC HS38 new version of MMU (v4) was introduced. Also this change adds AXS131 board which is the same DW ARC SDP base board but with ARC HS38 CPU tile. Signed-off-by: Alexey Brodkin --- arch/arc/Kconfig | 59 +++++++- arch/arc/config.mk | 12 ++ arch/arc/cpu/arcv2/Makefile | 7 + arch/arc/cpu/arcv2/start.S | 254 +++++++++++++++++++++++++++++++++++ arch/arc/include/asm/cache.h | 6 +- configs/axs103_defconfig | 5 + 6 files changed, 340 insertions(+), 3 deletions(-) create mode 100644 arch/arc/cpu/arcv2/Makefile create mode 100644 arch/arc/cpu/arcv2/start.S create mode 100644 configs/axs103_defconfig diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index a8dc4e2336..24f5c02c76 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -8,30 +8,79 @@ config USE_PRIVATE_LIBGCC default y config SYS_CPU - default "arcv1" + default "arcv1" if ISA_ARCOMPACT + default "arcv2" if ISA_ARCV2 + +choice + prompt "ARC Instruction Set" + default ISA_ARCOMPACT + +config ISA_ARCOMPACT + bool "ARCompact ISA" + help + The original ARC ISA of ARC600/700 cores + +config ISA_ARCV2 + bool "ARC ISA v2" + help + ISA for the Next Generation ARC-HS cores + +endchoice choice prompt "CPU selection" - default CPU_ARC770D + default CPU_ARC770D if ISA_ARCOMPACT + default CPU_ARCHS38 if ISA_ARCV2 config CPU_ARC750D bool "ARC 750D" select ARC_MMU_V2 + depends on ISA_ARCOMPACT help Choose this option to build an U-Boot for ARC750D CPU. config CPU_ARC770D bool "ARC 770D" select ARC_MMU_V3 + depends on ISA_ARCOMPACT help Choose this option to build an U-Boot for ARC770D CPU. +config CPU_ARCEM6 + bool "ARC EM6" + select ARC_MMU_ABSENT + depends on ISA_ARCV2 + help + Next Generation ARC Core based on ISA-v2 ISA without MMU. + +config CPU_ARCHS36 + bool "ARC HS36" + select ARC_MMU_ABSENT + depends on ISA_ARCV2 + help + Next Generation ARC Core based on ISA-v2 ISA without MMU. + +config CPU_ARCHS38 + bool "ARC HS38" + select ARC_MMU_V4 + depends on ISA_ARCV2 + help + Next Generation ARC Core based on ISA-v2 ISA with MMU. + endchoice choice prompt "MMU Version" default ARC_MMU_V3 if CPU_ARC770D default ARC_MMU_V2 if CPU_ARC750D + default ARC_MMU_ABSENT if CPU_ARCEM6 + default ARC_MMU_ABSENT if CPU_ARCHS36 + default ARC_MMU_V4 if CPU_ARCHS38 + +config ARC_MMU_ABSENT + bool "No MMU" + help + No MMU config ARC_MMU_V2 bool "MMU v2" @@ -48,6 +97,12 @@ config ARC_MMU_V3 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) Shared Address Spaces (SASID) +config ARC_MMU_V4 + bool "MMU v4" + depends on CPU_ARCHS38 + help + Introduced as a part of ARC HS38 release. + endchoice config CPU_BIG_ENDIAN diff --git a/arch/arc/config.mk b/arch/arc/config.mk index f1e81b6895..4fcd4076c4 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -38,6 +38,18 @@ ifdef CONFIG_CPU_ARC770D PLATFORM_CPPFLAGS += -marc700 -mlock -mswape endif +ifdef CONFIG_CPU_ARCEM6 +PLATFORM_CPPFLAGS += -marcem +endif + +ifdef CONFIG_CPU_ARCHS34 +PLATFORM_CPPFLAGS += -marchs +endif + +ifdef CONFIG_CPU_ARCHS38 +PLATFORM_CPPFLAGS += -marchs +endif + PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 # Needed for relocation diff --git a/arch/arc/cpu/arcv2/Makefile b/arch/arc/cpu/arcv2/Makefile new file mode 100644 index 0000000000..cc69e5a17e --- /dev/null +++ b/arch/arc/cpu/arcv2/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += start.o diff --git a/arch/arc/cpu/arcv2/start.S b/arch/arc/cpu/arcv2/start.S new file mode 100644 index 0000000000..3ce689675f --- /dev/null +++ b/arch/arc/cpu/arcv2/start.S @@ -0,0 +1,254 @@ +/* + * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +/* + * Note on the LD/ST addressing modes with address register write-back + * + * LD.a same as LD.aw + * + * LD.a reg1, [reg2, x] => Pre Incr + * Eff Addr for load = [reg2 + x] + * + * LD.ab reg1, [reg2, x] => Post Incr + * Eff Addr for load = [reg2] + */ + +.macro PUSH reg + st.a \reg, [%sp, -4] +.endm + +.macro PUSHAX aux + lr %r9, [\aux] + PUSH %r9 +.endm + +.macro SAVE_R1_TO_R24 + PUSH %r1 + PUSH %r2 + PUSH %r3 + PUSH %r4 + PUSH %r5 + PUSH %r6 + PUSH %r7 + PUSH %r8 + PUSH %r9 + PUSH %r10 + PUSH %r11 + PUSH %r12 + PUSH %r13 + PUSH %r14 + PUSH %r15 + PUSH %r16 + PUSH %r17 + PUSH %r18 + PUSH %r19 + PUSH %r20 + PUSH %r21 + PUSH %r22 + PUSH %r23 + PUSH %r24 +.endm + +.macro SAVE_ALL_SYS + /* saving %r0 to reg->r0 in advance since weread %ecr into it */ + st %r0, [%sp, -8] + lr %r0, [%ecr] /* all stack addressing is manual so far */ + st %r0, [%sp] + st %sp, [%sp, -4] + /* now move %sp to reg->r0 position so we can do "push" automatically */ + sub %sp, %sp, 8 + + SAVE_R1_TO_R24 + PUSH %r25 + PUSH %gp + PUSH %fp + PUSH %blink + PUSHAX %eret + PUSHAX %erstatus + PUSH %lp_count + PUSHAX %lp_end + PUSHAX %lp_start + PUSHAX %erbta +.endm + +.macro SAVE_EXCEPTION_SOURCE +#ifdef CONFIG_MMU + /* If MMU exists exception faulting address is loaded in EFA reg */ + lr %r0, [%efa] +#else + /* Otherwise in ERET (exception return) reg */ + lr %r0, [%eret] +#endif +.endm + +.section .ivt, "a",@progbits +.align 4 + /* Critical system events */ +.word _start /* 0 - 0x000 */ +.word memory_error /* 1 - 0x008 */ +.word instruction_error /* 2 - 0x010 */ + + /* Exceptions */ +.word EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */ +.word EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */ +.word EV_TLBMissD /* 0x110, Data TLB miss (0x22) */ +.word EV_TLBProtV /* 0x118, Protection Violation (0x23) + or Misaligned Access */ +.word EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */ +.word EV_Trap /* 0x128, Trap exception (0x25) */ +.word EV_Extension /* 0x130, Extn Intruction Excp (0x26) */ + + /* Device interrupts */ +.rept 29 + j interrupt_handler /* 3:31 - 0x018:0xF8 */ +.endr + +.text +.globl _start +_start: + /* Setup interrupt vector base that matches "__text_start" */ + sr __ivt_start, [ARC_AUX_INTR_VEC_BASE] + + /* Setup stack pointer */ + mov %sp, CONFIG_SYS_INIT_SP_ADDR + mov %fp, %sp + + /* Clear bss */ + mov %r0, __bss_start + mov %r1, __bss_end + +clear_bss: + st.ab 0, [%r0, 4] + brlt %r0, %r1, clear_bss + + /* Zero the one and only argument of "board_init_f" */ + mov_s %r0, 0 + j board_init_f + +memory_error: + SAVE_ALL_SYS + SAVE_EXCEPTION_SOURCE + mov %r1, %sp + j do_memory_error + +instruction_error: + SAVE_ALL_SYS + SAVE_EXCEPTION_SOURCE + mov %r1, %sp + j do_instruction_error + +interrupt_handler: + /* Todo - save and restore CPU context when interrupts will be in use */ + bl do_interrupt_handler + rtie + +EV_MachineCheck: + SAVE_ALL_SYS + SAVE_EXCEPTION_SOURCE + mov %r1, %sp + j do_machine_check_fault + +EV_TLBMissI: + SAVE_ALL_SYS + mov %r0, %sp + j do_itlb_miss + +EV_TLBMissD: + SAVE_ALL_SYS + mov %r0, %sp + j do_dtlb_miss + +EV_TLBProtV: + SAVE_ALL_SYS + SAVE_EXCEPTION_SOURCE + mov %r1, %sp + j do_tlb_prot_violation + +EV_PrivilegeV: + SAVE_ALL_SYS + mov %r0, %sp + j do_privilege_violation + +EV_Trap: + SAVE_ALL_SYS + mov %r0, %sp + j do_trap + +EV_Extension: + SAVE_ALL_SYS + mov %r0, %sp + j do_extension + +/* + * void relocate_code (addr_sp, gd, addr_moni) + * + * This "function" does not return, instead it continues in RAM + * after relocating the monitor code. + * + * r0 = start_addr_sp + * r1 = new__gd + * r2 = relocaddr + */ +.align 4 +.globl relocate_code +relocate_code: + /* + * r0-r12 might be clobbered by C functions + * so we use r13-r16 for storage here + */ + mov %r13, %r0 /* save addr_sp */ + mov %r14, %r1 /* save addr of gd */ + mov %r15, %r2 /* save addr of destination */ + + mov %r16, %r2 /* %r9 - relocation offset */ + sub %r16, %r16, __image_copy_start + +/* Set up the stack */ +stack_setup: + mov %sp, %r13 + mov %fp, %sp + +/* Check if monitor is loaded right in place for relocation */ + mov %r0, __image_copy_start + cmp %r0, %r15 /* skip relocation if code loaded */ + bz do_board_init_r /* in target location already */ + +/* Copy data (__image_copy_start - __image_copy_end) to new location */ + mov %r1, %r15 + mov %r2, __image_copy_end + sub %r2, %r2, %r0 /* r3 <- amount of bytes to copy */ + asr %r2, %r2, 2 /* r3 <- amount of words to copy */ + mov %lp_count, %r2 + lp copy_end + ld.ab %r2,[%r0,4] + st.ab %r2,[%r1,4] +copy_end: + +/* Fix relocations related issues */ + bl do_elf_reloc_fixups +#ifndef CONFIG_SYS_ICACHE_OFF + bl invalidate_icache_all +#endif +#ifndef CONFIG_SYS_DCACHE_OFF + bl flush_dcache_all +#endif + +/* Update position of intterupt vector table */ + lr %r0, [ARC_AUX_INTR_VEC_BASE] /* Read current position */ + add %r0, %r0, %r16 /* Update address */ + sr %r0, [ARC_AUX_INTR_VEC_BASE] /* Write new position */ + +do_board_init_r: +/* Prepare for exection of "board_init_r" in relocated monitor */ + mov %r2, board_init_r /* old address of "board_init_r()" */ + add %r2, %r2, %r16 /* new address of "board_init_r()" */ + mov %r0, %r14 /* 1-st parameter: gd_t */ + mov %r1, %r15 /* 2-nd parameter: dest_addr */ + j [%r2] diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index 2725961221..8a77cd93af 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -17,10 +17,14 @@ #define ARCH_DMA_MINALIGN 128 #endif -#if defined(CONFIG_ARC_MMU_V2) +#if defined(ARC_MMU_ABSENT) +#define CONFIG_ARC_MMU_VER 0 +#elif defined(CONFIG_ARC_MMU_V2) #define CONFIG_ARC_MMU_VER 2 #elif defined(CONFIG_ARC_MMU_V3) #define CONFIG_ARC_MMU_VER 3 +#elif defined(CONFIG_ARC_MMU_V4) +#define CONFIG_ARC_MMU_VER 4 #endif #endif /* __ASM_ARC_CACHE_H */ diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig new file mode 100644 index 0000000000..c63dd4ab2e --- /dev/null +++ b/configs/axs103_defconfig @@ -0,0 +1,5 @@ +CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_SYS_CLK_FREQ=50000000 +CONFIG_ARC=y +CONFIG_ISA_ARCV2=y +CONFIG_TARGET_AXS101=y From a276172cf32386c211c75638f6bf3c0d59ba03ba Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Thu, 8 Jan 2015 16:50:21 +0900 Subject: [PATCH 059/222] arm: exynos: fix the div value for set_mmc_clk The most exynos used the "Ratio + 1" as div value. And value at register is "Ratio". So if want to set exact value, it needs to subtract one. Value at register ("Ratio") = div - 1 Signed-off-by: Jaehoon Chung Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index b31c13b14b..3110bb0657 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -1656,6 +1656,10 @@ unsigned long get_mmc_clk(int dev_index) void set_mmc_clk(int dev_index, unsigned int div) { + /* If want to set correct value, it needs to substract one from div.*/ + if (div > 0) + div -= 1; + if (cpu_is_exynos5()) { if (proid_is_exynos5420() || proid_is_exynos5800()) exynos5420_set_mmc_clk(dev_index, div); From aa8e00fab5e65a07c2cae52274946a908805ea60 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Thu, 15 Jan 2015 11:45:56 +0900 Subject: [PATCH 060/222] samsung: board: support eMMC reset using DT Some exynos boards require special handling of nRESET_OUT line for eMMC memory to perform complete reboot e.g. Odroid X2/U3/XU3 boards. This will support eMMC reset using DT from reset_misc of samsung common board file. Signed-off-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- board/samsung/common/board.c | 28 +++++++++++++++++++ board/samsung/odroid/odroid.c | 8 ------ .../exynos/emmc-reset.txt | 15 ++++++++++ 3 files changed, 43 insertions(+), 8 deletions(-) create mode 100644 doc/device-tree-bindings/exynos/emmc-reset.txt diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 8b4c8e9a9d..da2245ff9d 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -355,3 +355,31 @@ int misc_init_r(void) return 0; } #endif + +void reset_misc(void) +{ + struct gpio_desc gpio = {}; + int node; + + node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, + "samsung,emmc-reset"); + if (node < 0) + return; + + gpio_request_by_name_nodev(gd->fdt_blob, node, "reset-gpio", 0, &gpio, + GPIOD_IS_OUT); + + if (dm_gpio_is_valid(&gpio)) { + /* + * Reset eMMC + * + * FIXME: Need to optimize delay time. Minimum 1usec pulse is + * required by 'JEDEC Standard No.84-A441' (eMMC) + * document but real delay time is expected to greater + * than 1usec. + */ + dm_gpio_set_value(&gpio, 0); + mdelay(10); + dm_gpio_set_value(&gpio, 1); + } +} diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index e3517f2eb2..306cc0f9d9 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -503,11 +503,3 @@ int board_usb_init(int index, enum usb_init_type init) return s3c_udc_probe(&s5pc210_otg_data); } #endif - -void reset_misc(void) -{ - /* Reset eMMC*/ - gpio_set_value(EXYNOS4X12_GPIO_K12, 0); - mdelay(10); - gpio_set_value(EXYNOS4X12_GPIO_K12, 1); -} diff --git a/doc/device-tree-bindings/exynos/emmc-reset.txt b/doc/device-tree-bindings/exynos/emmc-reset.txt new file mode 100644 index 0000000000..5e7ba26c27 --- /dev/null +++ b/doc/device-tree-bindings/exynos/emmc-reset.txt @@ -0,0 +1,15 @@ +* Samsung eMMC reset + +Some exynos boards require special handling of nRESET_OUT line for eMMC memory +to perform complete reboot. + +Required properties: +- compatible: should be "samsung,emmc-reset" +- reset-gpio: gpio chip for eMMC reset. + +Example: + +emmc-reset { + compatible = "samsung,emmc-reset"; + reset-gpio = <&gpk1 2 0>; +}; From 44237f7a89030757e0f4afc01a7b6a300d4aca40 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Thu, 15 Jan 2015 11:45:57 +0900 Subject: [PATCH 061/222] Odroid: Add eMMC-reset node on DT This needs for special handling of nRESET_OUT line(GPK1-2 gpio) for eMMC memory to perform complete reboot on Odroid X2/U3 boards. Signed-off-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- arch/arm/dts/exynos4412-odroid.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index 00a2917596..582f6e594b 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -85,4 +85,9 @@ reg = <0x125B0000 0x100>; }; }; + + emmc-reset { + compatible = "samsung,emmc-reset"; + reset-gpio = <&gpk1 2 0>; + }; }; From de3b251870780c8ed6406e15f3fcaf92a9e3c498 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Thu, 15 Jan 2015 11:45:58 +0900 Subject: [PATCH 062/222] Odroid-XU3: Add eMMC-reset node on DT This needs for special handling of nRESET_OUT line(GPD1-0 gpio) for eMMC memory to perform complete reboot on Odroid XU3 board. Signed-off-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- arch/arm/dts/exynos5422-odroidxu3.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index 8f4663733c..d0a8621fda 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -46,4 +46,9 @@ mmc@12220000 { fifoth_val = <0x201f0020>; }; + + emmc-reset { + compatible = "samsung,emmc-reset"; + reset-gpio = <&gpd1 0 0>; + }; }; From b00f8edb5a1a98636afa121c7c8eacc9045ae19f Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Fri, 23 Jan 2015 17:30:07 +0900 Subject: [PATCH 063/222] odroid: fix g2d sclk rate G2D core should be provided 200MHz clock rate. Signed-off-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- board/samsung/odroid/odroid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 306cc0f9d9..bff6ac928c 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -248,12 +248,12 @@ static void board_clock_init(void) * MOUTc2c = 800 Mhz * MOUTpwi = 108 MHz * - * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 400 (1) + * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 200 (3) * sclk_c2c = MOUTc2c / (ratio + 1) = 400 (1) * aclk_c2c = sclk_c2c / (ratio + 1) = 200 (1) * sclk_pwi = MOUTpwi / (ratio + 1) = 18 (5) */ - set = G2D_ACP_RATIO(1) | C2C_RATIO(1) | PWI_RATIO(5) | + set = G2D_ACP_RATIO(3) | C2C_RATIO(1) | PWI_RATIO(5) | C2C_ACLK_RATIO(1) | DVSEM_RATIO(1) | DPM_RATIO(1); clrsetbits_le32(&clk->div_dmc1, clr, set); From 483e49bfd775adb15102418a72c7fb02ef51fd79 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Wed, 21 Jan 2015 13:51:32 +0900 Subject: [PATCH 064/222] EXYNOS5: Add function to enable exynos5420 usbdev phy ctrl Exynos5420 has different registers with other exynos5 SoCs to control usb device phy, so need separated function to enable exynos5420 usb device phy. Signed-off-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/power.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index 1520d642c5..1b12051656 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -102,10 +102,34 @@ static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable) } } +static void exynos5420_set_usbdev_phy_ctrl(unsigned int enable) +{ + struct exynos5420_power *power = + (struct exynos5420_power *)samsung_get_base_power(); + + if (enable) { + /* Enabling USBDEV_PHY */ + setbits_le32(&power->usbdev_phy_control, + POWER_USB_DRD_PHY_CTRL_EN); + setbits_le32(&power->usbdev1_phy_control, + POWER_USB_DRD_PHY_CTRL_EN); + } else { + /* Disabling USBDEV_PHY */ + clrbits_le32(&power->usbdev_phy_control, + POWER_USB_DRD_PHY_CTRL_EN); + clrbits_le32(&power->usbdev1_phy_control, + POWER_USB_DRD_PHY_CTRL_EN); + } +} + void set_usbdrd_phy_ctrl(unsigned int enable) { - if (cpu_is_exynos5()) - exynos5_set_usbdrd_phy_ctrl(enable); + if (cpu_is_exynos5()) { + if (proid_is_exynos5420() || proid_is_exynos5800()) + exynos5420_set_usbdev_phy_ctrl(enable); + else + exynos5_set_usbdrd_phy_ctrl(enable); + } } static void exynos5_dp_phy_control(unsigned int enable) From d606ded1dbabba832e7150bc8ebb0719eadb42ef Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Wed, 4 Feb 2015 15:59:59 +0530 Subject: [PATCH 065/222] Exynos5: Fix compiler warnings due to clock_get_periph_rate Apparently, members of clk_bit_info array do not map correctly to the members of enum periph_id. This mapping got broken after we changed periph_id(s) to reflect interrupt number instead of their position in a sequence. This patch intends to fix above mentioned issue. Signed-off-by: Akshay Saraswat Reviewed-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 80 +++++++++++++++++++------------ 1 file changed, 49 insertions(+), 31 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 3110bb0657..251fc0e9d3 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -20,42 +20,45 @@ * positions of the peripheral clocks of the src and div registers */ struct clk_bit_info { + enum periph_id id; int8_t src_bit; int8_t div_bit; int8_t prediv_bit; }; -/* src_bit div_bit prediv_bit */ +/* periph_id src_bit div_bit prediv_bit */ static struct clk_bit_info clk_bit_info[] = { - {0, 0, -1}, - {4, 4, -1}, - {8, 8, -1}, - {12, 12, -1}, - {0, 0, 8}, - {4, 16, 24}, - {8, 0, 8}, - {12, 16, 24}, - {-1, -1, -1}, - {16, 0, 8}, - {20, 16, 24}, - {24, 0, 8}, - {0, 0, 4}, - {4, 12, 16}, - {-1, -1, -1}, - {-1, -1, -1}, - {-1, 24, 0}, - {-1, 24, 0}, - {-1, 24, 0}, - {-1, 24, 0}, - {-1, 24, 0}, - {-1, 24, 0}, - {-1, 24, 0}, - {-1, 24, 0}, - {24, 0, -1}, - {24, 0, -1}, - {24, 0, -1}, - {24, 0, -1}, - {24, 0, -1}, + {PERIPH_ID_UART0, 0, 0, -1}, + {PERIPH_ID_UART1, 4, 4, -1}, + {PERIPH_ID_UART2, 8, 8, -1}, + {PERIPH_ID_UART3, 12, 12, -1}, + {PERIPH_ID_I2C0, -1, 24, 0}, + {PERIPH_ID_I2C1, -1, 24, 0}, + {PERIPH_ID_I2C2, -1, 24, 0}, + {PERIPH_ID_I2C3, -1, 24, 0}, + {PERIPH_ID_I2C4, -1, 24, 0}, + {PERIPH_ID_I2C5, -1, 24, 0}, + {PERIPH_ID_I2C6, -1, 24, 0}, + {PERIPH_ID_I2C7, -1, 24, 0}, + {PERIPH_ID_SPI0, 16, 0, 8}, + {PERIPH_ID_SPI1, 20, 16, 24}, + {PERIPH_ID_SPI2, 24, 0, 8}, + {PERIPH_ID_SDMMC0, 0, 0, 8}, + {PERIPH_ID_SDMMC1, 4, 16, 24}, + {PERIPH_ID_SDMMC2, 8, 0, 8}, + {PERIPH_ID_SDMMC3, 12, 16, 24}, + {PERIPH_ID_I2S0, 0, 0, 4}, + {PERIPH_ID_I2S1, 4, 12, 16}, + {PERIPH_ID_SPI3, 0, 0, 4}, + {PERIPH_ID_SPI4, 4, 12, 16}, + {PERIPH_ID_SDMMC4, 16, 0, 8}, + {PERIPH_ID_PWM0, 24, 0, -1}, + {PERIPH_ID_PWM1, 24, 0, -1}, + {PERIPH_ID_PWM2, 24, 0, -1}, + {PERIPH_ID_PWM3, 24, 0, -1}, + {PERIPH_ID_PWM4, 24, 0, -1}, + + {PERIPH_ID_NONE, -1, -1, -1}, }; /* Epll Clock division values to achive different frequency output */ @@ -260,9 +263,24 @@ static unsigned long exynos5_get_pll_clk(int pllreg) return fout; } +static struct clk_bit_info *get_clk_bit_info(int peripheral) +{ + int i; + + for (i = 0; clk_bit_info[i].id != PERIPH_ID_NONE; i++) { + if (clk_bit_info[i].id == peripheral) + break; + } + + if (clk_bit_info[i].id == PERIPH_ID_NONE) + debug("ERROR: Peripheral ID %d not found\n", peripheral); + + return &clk_bit_info[i]; +} + static unsigned long exynos5_get_periph_rate(int peripheral) { - struct clk_bit_info *bit_info = &clk_bit_info[peripheral]; + struct clk_bit_info *bit_info = get_clk_bit_info(peripheral); unsigned long sclk, sub_clk; unsigned int src, div, sub_div; struct exynos5_clock *clk = From 325eb18c7762046b79978f1fe26aa678a7f7a349 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Wed, 4 Feb 2015 16:00:00 +0530 Subject: [PATCH 066/222] Exynos542x: Move exynos5420_get_pll_clk up and rename Moving exynos5420_get_pll_clk function definition up in the code to keep it together with rest of SoC_get_pll_clk functions. This makes code more legible and also removes the need of declaration when called before the position of definition in code. Also, renaming exynos5420_get_pll_clk to exynos542x_get_pll_clk because it is being used for both Exynos 5420 and 5800. Signed-off-by: Akshay Saraswat Reviewed-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 82 +++++++++++++++---------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 251fc0e9d3..5257a485f8 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -263,6 +263,46 @@ static unsigned long exynos5_get_pll_clk(int pllreg) return fout; } +/* exynos542x: return pll clock frequency */ +static unsigned long exynos542x_get_pll_clk(int pllreg) +{ + struct exynos5420_clock *clk = + (struct exynos5420_clock *)samsung_get_base_clock(); + unsigned long r, k = 0; + + switch (pllreg) { + case APLL: + r = readl(&clk->apll_con0); + break; + case MPLL: + r = readl(&clk->mpll_con0); + break; + case EPLL: + r = readl(&clk->epll_con0); + k = readl(&clk->epll_con1); + break; + case VPLL: + r = readl(&clk->vpll_con0); + k = readl(&clk->vpll_con1); + break; + case BPLL: + r = readl(&clk->bpll_con0); + break; + case RPLL: + r = readl(&clk->rpll_con0); + k = readl(&clk->rpll_con1); + break; + case SPLL: + r = readl(&clk->spll_con0); + break; + default: + printf("Unsupported PLL (%d)\n", pllreg); + return 0; + } + + return exynos_get_pll_clk(pllreg, r, k); +} + static struct clk_bit_info *get_clk_bit_info(int peripheral) { int i; @@ -382,46 +422,6 @@ unsigned long clock_get_periph_rate(int peripheral) return 0; } -/* exynos5420: return pll clock frequency */ -static unsigned long exynos5420_get_pll_clk(int pllreg) -{ - struct exynos5420_clock *clk = - (struct exynos5420_clock *)samsung_get_base_clock(); - unsigned long r, k = 0; - - switch (pllreg) { - case APLL: - r = readl(&clk->apll_con0); - break; - case MPLL: - r = readl(&clk->mpll_con0); - break; - case EPLL: - r = readl(&clk->epll_con0); - k = readl(&clk->epll_con1); - break; - case VPLL: - r = readl(&clk->vpll_con0); - k = readl(&clk->vpll_con1); - break; - case BPLL: - r = readl(&clk->bpll_con0); - break; - case RPLL: - r = readl(&clk->rpll_con0); - k = readl(&clk->rpll_con1); - break; - case SPLL: - r = readl(&clk->spll_con0); - break; - default: - printf("Unsupported PLL (%d)\n", pllreg); - return 0; - } - - return exynos_get_pll_clk(pllreg, r, k); -} - /* exynos4: return ARM clock frequency */ static unsigned long exynos4_get_arm_clk(void) { @@ -1603,7 +1603,7 @@ unsigned long get_pll_clk(int pllreg) { if (cpu_is_exynos5()) { if (proid_is_exynos5420() || proid_is_exynos5800()) - return exynos5420_get_pll_clk(pllreg); + return exynos542x_get_pll_clk(pllreg); return exynos5_get_pll_clk(pllreg); } else { if (proid_is_exynos4412()) From ecdfb4e9d2e2bd691e94ee8f96da2e8d7dc45e81 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Wed, 4 Feb 2015 16:00:01 +0530 Subject: [PATCH 067/222] Exynos542x: Add and enable get_periph_rate support We planned to fetch peripheral rate through one generic API per peripheral. These generic peripheral functions are in turn expected to fetch apt values from a function refactored as per SoC versions. This patch adds support for fetching peripheral rates for Exynos5420 and Exynos5800. Signed-off-by: Akshay Saraswat Reviewed-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 153 +++++++++++++++++++++++-- arch/arm/include/asm/arch-exynos/clk.h | 4 + 2 files changed, 150 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 5257a485f8..59d7dc87bd 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -27,7 +27,7 @@ struct clk_bit_info { }; /* periph_id src_bit div_bit prediv_bit */ -static struct clk_bit_info clk_bit_info[] = { +static struct clk_bit_info exynos5_bit_info[] = { {PERIPH_ID_UART0, 0, 0, -1}, {PERIPH_ID_UART1, 4, 4, -1}, {PERIPH_ID_UART2, 8, 8, -1}, @@ -61,6 +61,41 @@ static struct clk_bit_info clk_bit_info[] = { {PERIPH_ID_NONE, -1, -1, -1}, }; +static struct clk_bit_info exynos542x_bit_info[] = { + {PERIPH_ID_UART0, 4, 8, -1}, + {PERIPH_ID_UART1, 8, 12, -1}, + {PERIPH_ID_UART2, 12, 16, -1}, + {PERIPH_ID_UART3, 16, 20, -1}, + {PERIPH_ID_I2C0, -1, 8, -1}, + {PERIPH_ID_I2C1, -1, 8, -1}, + {PERIPH_ID_I2C2, -1, 8, -1}, + {PERIPH_ID_I2C3, -1, 8, -1}, + {PERIPH_ID_I2C4, -1, 8, -1}, + {PERIPH_ID_I2C5, -1, 8, -1}, + {PERIPH_ID_I2C6, -1, 8, -1}, + {PERIPH_ID_I2C7, -1, 8, -1}, + {PERIPH_ID_SPI0, 20, 20, 8}, + {PERIPH_ID_SPI1, 24, 24, 16}, + {PERIPH_ID_SPI2, 28, 28, 24}, + {PERIPH_ID_SDMMC0, 8, 0, -1}, + {PERIPH_ID_SDMMC1, 12, 10, -1}, + {PERIPH_ID_SDMMC2, 16, 20, -1}, + {PERIPH_ID_I2C8, -1, 8, -1}, + {PERIPH_ID_I2C9, -1, 8, -1}, + {PERIPH_ID_I2S0, 0, 0, 4}, + {PERIPH_ID_I2S1, 4, 12, 16}, + {PERIPH_ID_SPI3, 12, 16, 0}, + {PERIPH_ID_SPI4, 16, 20, 8}, + {PERIPH_ID_PWM0, 24, 28, -1}, + {PERIPH_ID_PWM1, 24, 28, -1}, + {PERIPH_ID_PWM2, 24, 28, -1}, + {PERIPH_ID_PWM3, 24, 28, -1}, + {PERIPH_ID_PWM4, 24, 28, -1}, + {PERIPH_ID_I2C10, -1, 8, -1}, + + {PERIPH_ID_NONE, -1, -1, -1}, +}; + /* Epll Clock division values to achive different frequency output */ static struct set_epll_con_val exynos5_epll_div[] = { { 192000000, 0, 48, 3, 1, 0 }, @@ -306,16 +341,22 @@ static unsigned long exynos542x_get_pll_clk(int pllreg) static struct clk_bit_info *get_clk_bit_info(int peripheral) { int i; + struct clk_bit_info *info; - for (i = 0; clk_bit_info[i].id != PERIPH_ID_NONE; i++) { - if (clk_bit_info[i].id == peripheral) + if (proid_is_exynos5420() || proid_is_exynos5800()) + info = exynos542x_bit_info; + else + info = exynos5_bit_info; + + for (i = 0; info[i].id != PERIPH_ID_NONE; i++) { + if (info[i].id == peripheral) break; } - if (clk_bit_info[i].id == PERIPH_ID_NONE) + if (info[i].id == PERIPH_ID_NONE) debug("ERROR: Peripheral ID %d not found\n", peripheral); - return &clk_bit_info[i]; + return &info[i]; } static unsigned long exynos5_get_periph_rate(int peripheral) @@ -414,12 +455,110 @@ static unsigned long exynos5_get_periph_rate(int peripheral) return sub_clk; } +static unsigned long exynos542x_get_periph_rate(int peripheral) +{ + struct clk_bit_info *bit_info = get_clk_bit_info(peripheral); + unsigned long sclk, sub_clk = 0; + unsigned int src, div, sub_div = 0; + struct exynos5420_clock *clk = + (struct exynos5420_clock *)samsung_get_base_clock(); + + switch (peripheral) { + case PERIPH_ID_UART0: + case PERIPH_ID_UART1: + case PERIPH_ID_UART2: + case PERIPH_ID_UART3: + case PERIPH_ID_PWM0: + case PERIPH_ID_PWM1: + case PERIPH_ID_PWM2: + case PERIPH_ID_PWM3: + case PERIPH_ID_PWM4: + src = readl(&clk->src_peric0); + div = readl(&clk->div_peric0); + break; + case PERIPH_ID_SPI0: + case PERIPH_ID_SPI1: + case PERIPH_ID_SPI2: + src = readl(&clk->src_peric1); + div = readl(&clk->div_peric1); + sub_div = readl(&clk->div_peric4); + break; + case PERIPH_ID_SPI3: + case PERIPH_ID_SPI4: + src = readl(&clk->src_isp); + div = readl(&clk->div_isp1); + sub_div = readl(&clk->div_isp1); + break; + case PERIPH_ID_SDMMC0: + case PERIPH_ID_SDMMC1: + case PERIPH_ID_SDMMC2: + case PERIPH_ID_SDMMC3: + src = readl(&clk->src_fsys); + div = readl(&clk->div_fsys1); + break; + case PERIPH_ID_I2C0: + case PERIPH_ID_I2C1: + case PERIPH_ID_I2C2: + case PERIPH_ID_I2C3: + case PERIPH_ID_I2C4: + case PERIPH_ID_I2C5: + case PERIPH_ID_I2C6: + case PERIPH_ID_I2C7: + case PERIPH_ID_I2C8: + case PERIPH_ID_I2C9: + case PERIPH_ID_I2C10: + sclk = exynos542x_get_pll_clk(MPLL); + sub_div = ((readl(&clk->div_top1) >> bit_info->div_bit) + & 0x7) + 1; + return sclk / sub_div; + default: + debug("%s: invalid peripheral %d", __func__, peripheral); + return -1; + }; + + if (bit_info->src_bit >= 0) + src = (src >> bit_info->src_bit) & 0xf; + + switch (src) { + case EXYNOS542X_SRC_MPLL: + sclk = exynos542x_get_pll_clk(MPLL); + break; + case EXYNOS542X_SRC_SPLL: + sclk = exynos542x_get_pll_clk(SPLL); + break; + case EXYNOS542X_SRC_EPLL: + sclk = exynos542x_get_pll_clk(EPLL); + break; + case EXYNOS542X_SRC_RPLL: + sclk = exynos542x_get_pll_clk(RPLL); + break; + default: + return 0; + } + + /* Ratio clock division for this peripheral */ + if (bit_info->div_bit >= 0) { + div = (div >> bit_info->div_bit) & 0xf; + sub_clk = sclk / (div + 1); + } + + if (bit_info->prediv_bit >= 0) { + sub_div = (sub_div >> bit_info->prediv_bit) & 0xff; + return sub_clk / (sub_div + 1); + } + + return sub_clk; +} + unsigned long clock_get_periph_rate(int peripheral) { - if (cpu_is_exynos5()) + if (cpu_is_exynos5()) { + if (proid_is_exynos5420() || proid_is_exynos5800()) + return exynos542x_get_periph_rate(peripheral); return exynos5_get_periph_rate(peripheral); - else + } else { return 0; + } } /* exynos4: return ARM clock frequency */ diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h index db24dc0e89..2a17dfc6de 100644 --- a/arch/arm/include/asm/arch-exynos/clk.h +++ b/arch/arm/include/asm/arch-exynos/clk.h @@ -26,6 +26,10 @@ enum pll_src_bit { EXYNOS_SRC_MPLL = 6, EXYNOS_SRC_EPLL, EXYNOS_SRC_VPLL, + EXYNOS542X_SRC_MPLL = 3, + EXYNOS542X_SRC_SPLL, + EXYNOS542X_SRC_EPLL = 6, + EXYNOS542X_SRC_RPLL, }; unsigned long get_pll_clk(int pllreg); From 9deff107468ac6d80db962470796e05c667c1077 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Wed, 4 Feb 2015 16:00:02 +0530 Subject: [PATCH 068/222] Exynos5: Fix exynos5_get_periph_rate calculations exynos5_get_periph_rate function reads incorrect div for SDMMC2 & 3. It also reads prediv and does division only for SDMMC0 & 2 when actually various other peripherals need that. Adding changes to fix these mistakes in periph rate calculation. Signed-off-by: Akshay Saraswat Reviewed-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 59d7dc87bd..0153314b45 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -362,8 +362,8 @@ static struct clk_bit_info *get_clk_bit_info(int peripheral) static unsigned long exynos5_get_periph_rate(int peripheral) { struct clk_bit_info *bit_info = get_clk_bit_info(peripheral); - unsigned long sclk, sub_clk; - unsigned int src, div, sub_div; + unsigned long sclk, sub_clk = 0; + unsigned int src, div, sub_div = 0; struct exynos5_clock *clk = (struct exynos5_clock *)samsung_get_base_clock(); @@ -402,10 +402,13 @@ static unsigned long exynos5_get_periph_rate(int peripheral) break; case PERIPH_ID_SDMMC0: case PERIPH_ID_SDMMC1: + src = readl(&clk->src_fsys); + div = readl(&clk->div_fsys1); + break; case PERIPH_ID_SDMMC2: case PERIPH_ID_SDMMC3: src = readl(&clk->src_fsys); - div = readl(&clk->div_fsys1); + div = readl(&clk->div_fsys2); break; case PERIPH_ID_I2C0: case PERIPH_ID_I2C1: @@ -426,7 +429,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) return -1; }; - src = (src >> bit_info->src_bit) & 0xf; + if (bit_info->src_bit >= 0) + src = (src >> bit_info->src_bit) & 0xf; switch (src) { case EXYNOS_SRC_MPLL: @@ -443,11 +447,12 @@ static unsigned long exynos5_get_periph_rate(int peripheral) } /* Ratio clock division for this peripheral */ - sub_div = (div >> bit_info->div_bit) & 0xf; - sub_clk = sclk / (sub_div + 1); + if (bit_info->div_bit >= 0) { + sub_div = (div >> bit_info->div_bit) & 0xf; + sub_clk = sclk / (sub_div + 1); + } - /* Pre-ratio clock division for SDMMC0 and 2 */ - if (peripheral == PERIPH_ID_SDMMC0 || peripheral == PERIPH_ID_SDMMC2) { + if (bit_info->prediv_bit >= 0) { div = (div >> bit_info->prediv_bit) & 0xff; return sub_clk / (div + 1); } From d95279685bb9690a6973226a3bd8a3bae65c2ad7 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Wed, 4 Feb 2015 16:00:03 +0530 Subject: [PATCH 069/222] Exynos5: Use clock_get_periph_rate generic API Replacing SoC and peripheral specific function calls with generic clock_get_periph_rate calls to get the peripheral clocks. Also, removing dead code of peripheral and SoC specific function implementations which was used earlier for fetching peripheral clocks. This code is not being used anymore because of the introduction of generic clock_get_periph_rate function. Signed-off-by: Akshay Saraswat Reviewed-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 278 +++++------------------------- 1 file changed, 43 insertions(+), 235 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 0153314b45..4fa1e23122 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -689,27 +689,6 @@ static unsigned long exynos4x12_get_pwm_clk(void) return pclk; } -/* exynos5420: return pwm clock frequency */ -static unsigned long exynos5420_get_pwm_clk(void) -{ - struct exynos5420_clock *clk = - (struct exynos5420_clock *)samsung_get_base_clock(); - unsigned long pclk, sclk; - unsigned int ratio; - - /* - * CLK_DIV_PERIC0 - * PWM_RATIO [31:28] - */ - ratio = readl(&clk->div_peric0); - ratio = (ratio >> 28) & 0xf; - sclk = get_pll_clk(MPLL); - - pclk = sclk / (ratio + 1); - - return pclk; -} - /* exynos4: return uart clock frequency */ static unsigned long exynos4_get_uart_clk(int dev_index) { @@ -802,100 +781,6 @@ static unsigned long exynos4x12_get_uart_clk(int dev_index) return uclk; } -/* exynos5: return uart clock frequency */ -static unsigned long exynos5_get_uart_clk(int dev_index) -{ - struct exynos5_clock *clk = - (struct exynos5_clock *)samsung_get_base_clock(); - unsigned long uclk, sclk; - unsigned int sel; - unsigned int ratio; - - /* - * CLK_SRC_PERIC0 - * UART0_SEL [3:0] - * UART1_SEL [7:4] - * UART2_SEL [8:11] - * UART3_SEL [12:15] - * UART4_SEL [16:19] - * UART5_SEL [23:20] - */ - sel = readl(&clk->src_peric0); - sel = (sel >> (dev_index << 2)) & 0xf; - - if (sel == 0x6) - sclk = get_pll_clk(MPLL); - else if (sel == 0x7) - sclk = get_pll_clk(EPLL); - else if (sel == 0x8) - sclk = get_pll_clk(VPLL); - else - return 0; - - /* - * CLK_DIV_PERIC0 - * UART0_RATIO [3:0] - * UART1_RATIO [7:4] - * UART2_RATIO [8:11] - * UART3_RATIO [12:15] - * UART4_RATIO [16:19] - * UART5_RATIO [23:20] - */ - ratio = readl(&clk->div_peric0); - ratio = (ratio >> (dev_index << 2)) & 0xf; - - uclk = sclk / (ratio + 1); - - return uclk; -} - -/* exynos5420: return uart clock frequency */ -static unsigned long exynos5420_get_uart_clk(int dev_index) -{ - struct exynos5420_clock *clk = - (struct exynos5420_clock *)samsung_get_base_clock(); - unsigned long uclk, sclk; - unsigned int sel; - unsigned int ratio; - - /* - * CLK_SRC_PERIC0 - * UART0_SEL [6:4] - * UART1_SEL [10:8] - * UART2_SEL [14:12] - * UART3_SEL [18:16] - * generalised calculation as follows - * sel = (sel >> ((dev_index * 4) + 4)) & mask; - */ - sel = readl(&clk->src_peric0); - sel = (sel >> ((dev_index * 4) + 4)) & 0x7; - - if (sel == 0x3) - sclk = get_pll_clk(MPLL); - else if (sel == 0x6) - sclk = get_pll_clk(EPLL); - else if (sel == 0x7) - sclk = get_pll_clk(RPLL); - else - return 0; - - /* - * CLK_DIV_PERIC0 - * UART0_RATIO [11:8] - * UART1_RATIO [15:12] - * UART2_RATIO [19:16] - * UART3_RATIO [23:20] - * generalised calculation as follows - * ratio = (ratio >> ((dev_index * 4) + 8)) & mask; - */ - ratio = readl(&clk->div_peric0); - ratio = (ratio >> ((dev_index * 4) + 8)) & 0xf; - - uclk = sclk / (ratio + 1); - - return uclk; -} - static unsigned long exynos4_get_mmc_clk(int dev_index) { struct exynos4_clock *clk = @@ -945,94 +830,6 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) return uclk; } -static unsigned long exynos5_get_mmc_clk(int dev_index) -{ - struct exynos5_clock *clk = - (struct exynos5_clock *)samsung_get_base_clock(); - unsigned long uclk, sclk; - unsigned int sel, ratio, pre_ratio; - int shift = 0; - - sel = readl(&clk->src_fsys); - sel = (sel >> (dev_index << 2)) & 0xf; - - if (sel == 0x6) - sclk = get_pll_clk(MPLL); - else if (sel == 0x7) - sclk = get_pll_clk(EPLL); - else if (sel == 0x8) - sclk = get_pll_clk(VPLL); - else - return 0; - - switch (dev_index) { - case 0: - case 1: - ratio = readl(&clk->div_fsys1); - pre_ratio = readl(&clk->div_fsys1); - break; - case 2: - case 3: - ratio = readl(&clk->div_fsys2); - pre_ratio = readl(&clk->div_fsys2); - break; - default: - return 0; - } - - if (dev_index == 1 || dev_index == 3) - shift = 16; - - ratio = (ratio >> shift) & 0xf; - pre_ratio = (pre_ratio >> (shift + 8)) & 0xff; - uclk = (sclk / (ratio + 1)) / (pre_ratio + 1); - - return uclk; -} - -static unsigned long exynos5420_get_mmc_clk(int dev_index) -{ - struct exynos5420_clock *clk = - (struct exynos5420_clock *)samsung_get_base_clock(); - unsigned long uclk, sclk; - unsigned int sel, ratio; - - /* - * CLK_SRC_FSYS - * MMC0_SEL [10:8] - * MMC1_SEL [14:12] - * MMC2_SEL [18:16] - * generalised calculation as follows - * sel = (sel >> ((dev_index * 4) + 8)) & mask - */ - sel = readl(&clk->src_fsys); - sel = (sel >> ((dev_index * 4) + 8)) & 0x7; - - if (sel == 0x3) - sclk = get_pll_clk(MPLL); - else if (sel == 0x4) - sclk = get_pll_clk(SPLL); - else if (sel == 0x6) - sclk = get_pll_clk(EPLL); - else - return 0; - - /* - * CLK_DIV_FSYS1 - * MMC0_RATIO [9:0] - * MMC1_RATIO [19:10] - * MMC2_RATIO [29:20] - * generalised calculation as follows - * ratio = (ratio >> (dev_index * 10)) & mask - */ - ratio = readl(&clk->div_fsys1); - ratio = (ratio >> (dev_index * 10)) & 0x3ff; - - uclk = (sclk / (ratio + 1)); - - return uclk; -} - /* exynos4: set the mmc clock */ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) { @@ -1411,29 +1208,6 @@ void exynos4_set_mipi_clk(void) clrsetbits_le32(&clk->div_lcd0, 0xf << 16, 0x1 << 16); } -/* - * I2C - * - * exynos5: obtaining the I2C clock - */ -static unsigned long exynos5_get_i2c_clk(void) -{ - struct exynos5_clock *clk = - (struct exynos5_clock *)samsung_get_base_clock(); - unsigned long aclk_66, aclk_66_pre, sclk; - unsigned int ratio; - - sclk = get_pll_clk(MPLL); - - ratio = (readl(&clk->div_top1)) >> 24; - ratio &= 0x7; - aclk_66_pre = sclk / (ratio + 1); - ratio = readl(&clk->div_top0); - ratio &= 0x7; - aclk_66 = aclk_66_pre / (ratio + 1); - return aclk_66; -} - int exynos5_set_epll_clk(unsigned long rate) { unsigned int epll_con, epll_con_k; @@ -1770,7 +1544,7 @@ unsigned long get_arm_clk(void) unsigned long get_i2c_clk(void) { if (cpu_is_exynos5()) { - return exynos5_get_i2c_clk(); + return clock_get_periph_rate(PERIPH_ID_I2C0); } else if (cpu_is_exynos4()) { return exynos4_get_i2c_clk(); } else { @@ -1782,8 +1556,6 @@ unsigned long get_i2c_clk(void) unsigned long get_pwm_clk(void) { if (cpu_is_exynos5()) { - if (proid_is_exynos5420() || proid_is_exynos5800()) - return exynos5420_get_pwm_clk(); return clock_get_periph_rate(PERIPH_ID_PWM0); } else { if (proid_is_exynos4412()) @@ -1794,10 +1566,28 @@ unsigned long get_pwm_clk(void) unsigned long get_uart_clk(int dev_index) { + enum periph_id id; + + switch (dev_index) { + case 0: + id = PERIPH_ID_UART0; + break; + case 1: + id = PERIPH_ID_UART1; + break; + case 2: + id = PERIPH_ID_UART2; + break; + case 3: + id = PERIPH_ID_UART3; + break; + default: + debug("%s: invalid UART index %d", __func__, dev_index); + return -1; + } + if (cpu_is_exynos5()) { - if (proid_is_exynos5420() || proid_is_exynos5800()) - return exynos5420_get_uart_clk(dev_index); - return exynos5_get_uart_clk(dev_index); + return clock_get_periph_rate(id); } else { if (proid_is_exynos4412()) return exynos4x12_get_uart_clk(dev_index); @@ -1807,10 +1597,28 @@ unsigned long get_uart_clk(int dev_index) unsigned long get_mmc_clk(int dev_index) { + enum periph_id id; + + switch (dev_index) { + case 0: + id = PERIPH_ID_SDMMC0; + break; + case 1: + id = PERIPH_ID_SDMMC1; + break; + case 2: + id = PERIPH_ID_SDMMC2; + break; + case 3: + id = PERIPH_ID_SDMMC3; + break; + default: + debug("%s: invalid MMC index %d", __func__, dev_index); + return -1; + } + if (cpu_is_exynos5()) { - if (proid_is_exynos5420() || proid_is_exynos5800()) - return exynos5420_get_mmc_clk(dev_index); - return exynos5_get_mmc_clk(dev_index); + return clock_get_periph_rate(id); } else { return exynos4_get_mmc_clk(dev_index); } From c5d32170bb98032781be0537ce56159fa52ade97 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Wed, 4 Feb 2015 16:00:04 +0530 Subject: [PATCH 070/222] Exynos: clock: change mask bits as per peripheral We have assumed and kept mask bits for divider and pre-divider as 0xf and 0xff, respectively. But these mask bits change from one peripheral to another, and hence, need to be specified in accordance with the peripherals. Signed-off-by: Akshay Saraswat Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 147 +++++++++++++++--------------- 1 file changed, 76 insertions(+), 71 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 4fa1e23122..83e5b18d6b 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -21,79 +21,83 @@ */ struct clk_bit_info { enum periph_id id; + int32_t src_mask; + int32_t div_mask; + int32_t prediv_mask; int8_t src_bit; int8_t div_bit; int8_t prediv_bit; }; -/* periph_id src_bit div_bit prediv_bit */ static struct clk_bit_info exynos5_bit_info[] = { - {PERIPH_ID_UART0, 0, 0, -1}, - {PERIPH_ID_UART1, 4, 4, -1}, - {PERIPH_ID_UART2, 8, 8, -1}, - {PERIPH_ID_UART3, 12, 12, -1}, - {PERIPH_ID_I2C0, -1, 24, 0}, - {PERIPH_ID_I2C1, -1, 24, 0}, - {PERIPH_ID_I2C2, -1, 24, 0}, - {PERIPH_ID_I2C3, -1, 24, 0}, - {PERIPH_ID_I2C4, -1, 24, 0}, - {PERIPH_ID_I2C5, -1, 24, 0}, - {PERIPH_ID_I2C6, -1, 24, 0}, - {PERIPH_ID_I2C7, -1, 24, 0}, - {PERIPH_ID_SPI0, 16, 0, 8}, - {PERIPH_ID_SPI1, 20, 16, 24}, - {PERIPH_ID_SPI2, 24, 0, 8}, - {PERIPH_ID_SDMMC0, 0, 0, 8}, - {PERIPH_ID_SDMMC1, 4, 16, 24}, - {PERIPH_ID_SDMMC2, 8, 0, 8}, - {PERIPH_ID_SDMMC3, 12, 16, 24}, - {PERIPH_ID_I2S0, 0, 0, 4}, - {PERIPH_ID_I2S1, 4, 12, 16}, - {PERIPH_ID_SPI3, 0, 0, 4}, - {PERIPH_ID_SPI4, 4, 12, 16}, - {PERIPH_ID_SDMMC4, 16, 0, 8}, - {PERIPH_ID_PWM0, 24, 0, -1}, - {PERIPH_ID_PWM1, 24, 0, -1}, - {PERIPH_ID_PWM2, 24, 0, -1}, - {PERIPH_ID_PWM3, 24, 0, -1}, - {PERIPH_ID_PWM4, 24, 0, -1}, + /* periph id s_mask d_mask p_mask s_bit d_bit p_bit */ + {PERIPH_ID_UART0, 0xf, 0xf, -1, 0, 0, -1}, + {PERIPH_ID_UART1, 0xf, 0xf, -1, 4, 4, -1}, + {PERIPH_ID_UART2, 0xf, 0xf, -1, 8, 8, -1}, + {PERIPH_ID_UART3, 0xf, 0xf, -1, 12, 12, -1}, + {PERIPH_ID_I2C0, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_I2C1, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_I2C2, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_I2C3, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_I2C4, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_I2C5, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_I2C6, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_I2C7, -1, 0x7, 0x7, -1, 24, 0}, + {PERIPH_ID_SPI0, 0xf, 0xf, 0xff, 16, 0, 8}, + {PERIPH_ID_SPI1, 0xf, 0xf, 0xff, 20, 16, 24}, + {PERIPH_ID_SPI2, 0xf, 0xf, 0xff, 24, 0, 8}, + {PERIPH_ID_SDMMC0, 0xf, 0xf, 0xff, 0, 0, 8}, + {PERIPH_ID_SDMMC1, 0xf, 0xf, 0xff, 4, 16, 24}, + {PERIPH_ID_SDMMC2, 0xf, 0xf, 0xff, 8, 0, 8}, + {PERIPH_ID_SDMMC3, 0xf, 0xf, 0xff, 12, 16, 24}, + {PERIPH_ID_I2S0, 0xf, 0xf, 0xff, 0, 0, 4}, + {PERIPH_ID_I2S1, 0xf, 0xf, 0xff, 4, 12, 16}, + {PERIPH_ID_SPI3, 0xf, 0xf, 0xff, 0, 0, 4}, + {PERIPH_ID_SPI4, 0xf, 0xf, 0xff, 4, 12, 16}, + {PERIPH_ID_SDMMC4, 0xf, 0xf, 0xff, 16, 0, 8}, + {PERIPH_ID_PWM0, 0xf, 0xf, -1, 24, 0, -1}, + {PERIPH_ID_PWM1, 0xf, 0xf, -1, 24, 0, -1}, + {PERIPH_ID_PWM2, 0xf, 0xf, -1, 24, 0, -1}, + {PERIPH_ID_PWM3, 0xf, 0xf, -1, 24, 0, -1}, + {PERIPH_ID_PWM4, 0xf, 0xf, -1, 24, 0, -1}, - {PERIPH_ID_NONE, -1, -1, -1}, + {PERIPH_ID_NONE, -1, -1, -1, -1, -1, -1}, }; static struct clk_bit_info exynos542x_bit_info[] = { - {PERIPH_ID_UART0, 4, 8, -1}, - {PERIPH_ID_UART1, 8, 12, -1}, - {PERIPH_ID_UART2, 12, 16, -1}, - {PERIPH_ID_UART3, 16, 20, -1}, - {PERIPH_ID_I2C0, -1, 8, -1}, - {PERIPH_ID_I2C1, -1, 8, -1}, - {PERIPH_ID_I2C2, -1, 8, -1}, - {PERIPH_ID_I2C3, -1, 8, -1}, - {PERIPH_ID_I2C4, -1, 8, -1}, - {PERIPH_ID_I2C5, -1, 8, -1}, - {PERIPH_ID_I2C6, -1, 8, -1}, - {PERIPH_ID_I2C7, -1, 8, -1}, - {PERIPH_ID_SPI0, 20, 20, 8}, - {PERIPH_ID_SPI1, 24, 24, 16}, - {PERIPH_ID_SPI2, 28, 28, 24}, - {PERIPH_ID_SDMMC0, 8, 0, -1}, - {PERIPH_ID_SDMMC1, 12, 10, -1}, - {PERIPH_ID_SDMMC2, 16, 20, -1}, - {PERIPH_ID_I2C8, -1, 8, -1}, - {PERIPH_ID_I2C9, -1, 8, -1}, - {PERIPH_ID_I2S0, 0, 0, 4}, - {PERIPH_ID_I2S1, 4, 12, 16}, - {PERIPH_ID_SPI3, 12, 16, 0}, - {PERIPH_ID_SPI4, 16, 20, 8}, - {PERIPH_ID_PWM0, 24, 28, -1}, - {PERIPH_ID_PWM1, 24, 28, -1}, - {PERIPH_ID_PWM2, 24, 28, -1}, - {PERIPH_ID_PWM3, 24, 28, -1}, - {PERIPH_ID_PWM4, 24, 28, -1}, - {PERIPH_ID_I2C10, -1, 8, -1}, + /* periph id s_mask d_mask p_mask s_bit d_bit p_bit */ + {PERIPH_ID_UART0, 0xf, 0xf, -1, 4, 8, -1}, + {PERIPH_ID_UART1, 0xf, 0xf, -1, 8, 12, -1}, + {PERIPH_ID_UART2, 0xf, 0xf, -1, 12, 16, -1}, + {PERIPH_ID_UART3, 0xf, 0xf, -1, 16, 20, -1}, + {PERIPH_ID_I2C0, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C1, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C2, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C3, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C4, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C5, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C6, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C7, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_SPI0, 0xf, 0xf, 0xff, 20, 20, 8}, + {PERIPH_ID_SPI1, 0xf, 0xf, 0xff, 24, 24, 16}, + {PERIPH_ID_SPI2, 0xf, 0xf, 0xff, 28, 28, 24}, + {PERIPH_ID_SDMMC0, 0x7, 0x3ff, -1, 8, 0, -1}, + {PERIPH_ID_SDMMC1, 0x7, 0x3ff, -1, 12, 10, -1}, + {PERIPH_ID_SDMMC2, 0x7, 0x3ff, -1, 16, 20, -1}, + {PERIPH_ID_I2C8, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2C9, -1, 0x3f, -1, -1, 8, -1}, + {PERIPH_ID_I2S0, 0xf, 0xf, 0xff, 0, 0, 4}, + {PERIPH_ID_I2S1, 0xf, 0xf, 0xff, 4, 12, 16}, + {PERIPH_ID_SPI3, 0xf, 0xf, 0xff, 12, 16, 0}, + {PERIPH_ID_SPI4, 0xf, 0xf, 0xff, 16, 20, 8}, + {PERIPH_ID_PWM0, 0xf, 0xf, -1, 24, 28, -1}, + {PERIPH_ID_PWM1, 0xf, 0xf, -1, 24, 28, -1}, + {PERIPH_ID_PWM2, 0xf, 0xf, -1, 24, 28, -1}, + {PERIPH_ID_PWM3, 0xf, 0xf, -1, 24, 28, -1}, + {PERIPH_ID_PWM4, 0xf, 0xf, -1, 24, 28, -1}, + {PERIPH_ID_I2C10, -1, 0x3f, -1, -1, 8, -1}, - {PERIPH_ID_NONE, -1, -1, -1}, + {PERIPH_ID_NONE, -1, -1, -1, -1, -1, -1}, }; /* Epll Clock division values to achive different frequency output */ @@ -420,9 +424,9 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C7: sclk = exynos5_get_pll_clk(MPLL); sub_div = ((readl(&clk->div_top1) >> bit_info->div_bit) - & 0x7) + 1; + & bit_info->div_mask) + 1; div = ((readl(&clk->div_top0) >> bit_info->prediv_bit) - & 0x7) + 1; + & bit_info->prediv_mask) + 1; return (sclk / sub_div) / div; default: debug("%s: invalid peripheral %d", __func__, peripheral); @@ -430,7 +434,7 @@ static unsigned long exynos5_get_periph_rate(int peripheral) }; if (bit_info->src_bit >= 0) - src = (src >> bit_info->src_bit) & 0xf; + src = (src >> bit_info->src_bit) & bit_info->src_mask; switch (src) { case EXYNOS_SRC_MPLL: @@ -448,12 +452,12 @@ static unsigned long exynos5_get_periph_rate(int peripheral) /* Ratio clock division for this peripheral */ if (bit_info->div_bit >= 0) { - sub_div = (div >> bit_info->div_bit) & 0xf; + sub_div = (div >> bit_info->div_bit) & bit_info->div_mask; sub_clk = sclk / (sub_div + 1); } if (bit_info->prediv_bit >= 0) { - div = (div >> bit_info->prediv_bit) & 0xff; + div = (div >> bit_info->prediv_bit) & bit_info->prediv_mask; return sub_clk / (div + 1); } @@ -514,7 +518,7 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) case PERIPH_ID_I2C10: sclk = exynos542x_get_pll_clk(MPLL); sub_div = ((readl(&clk->div_top1) >> bit_info->div_bit) - & 0x7) + 1; + & bit_info->div_mask) + 1; return sclk / sub_div; default: debug("%s: invalid peripheral %d", __func__, peripheral); @@ -522,7 +526,7 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) }; if (bit_info->src_bit >= 0) - src = (src >> bit_info->src_bit) & 0xf; + src = (src >> bit_info->src_bit) & bit_info->src_mask; switch (src) { case EXYNOS542X_SRC_MPLL: @@ -543,12 +547,13 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) /* Ratio clock division for this peripheral */ if (bit_info->div_bit >= 0) { - div = (div >> bit_info->div_bit) & 0xf; + div = (div >> bit_info->div_bit) & bit_info->div_mask; sub_clk = sclk / (div + 1); } if (bit_info->prediv_bit >= 0) { - sub_div = (sub_div >> bit_info->prediv_bit) & 0xff; + sub_div = (sub_div >> bit_info->prediv_bit) + & bit_info->prediv_mask; return sub_clk / (sub_div + 1); } From 2e82e9252695a612ab0cbf40fa0c7368515f6506 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Wed, 4 Feb 2015 16:00:05 +0530 Subject: [PATCH 071/222] Exynos: Clock: Cleanup soc_get_periph_rate Since we have src, div and pre-div mask bits defined corresponding to peripherals, calculation of clock specific to I2C appears redundant and confusing. Using clk_bit_info struct we can write calculations generic to all peripherals which makes code easy to understand and free from peripheral specific exceptions. Signed-off-by: Akshay Saraswat Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 74 +++++++++++++++---------------- 1 file changed, 35 insertions(+), 39 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 83e5b18d6b..c6455c2f3c 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -366,8 +366,8 @@ static struct clk_bit_info *get_clk_bit_info(int peripheral) static unsigned long exynos5_get_periph_rate(int peripheral) { struct clk_bit_info *bit_info = get_clk_bit_info(peripheral); - unsigned long sclk, sub_clk = 0; - unsigned int src, div, sub_div = 0; + unsigned long sclk = 0; + unsigned int src = 0, div = 0, sub_div = 0; struct exynos5_clock *clk = (struct exynos5_clock *)samsung_get_base_clock(); @@ -389,30 +389,30 @@ static unsigned long exynos5_get_periph_rate(int peripheral) break; case PERIPH_ID_I2S0: src = readl(&clk->src_mau); - div = readl(&clk->div_mau); + div = sub_div = readl(&clk->div_mau); case PERIPH_ID_SPI0: case PERIPH_ID_SPI1: src = readl(&clk->src_peric1); - div = readl(&clk->div_peric1); + div = sub_div = readl(&clk->div_peric1); break; case PERIPH_ID_SPI2: src = readl(&clk->src_peric1); - div = readl(&clk->div_peric2); + div = sub_div = readl(&clk->div_peric2); break; case PERIPH_ID_SPI3: case PERIPH_ID_SPI4: src = readl(&clk->sclk_src_isp); - div = readl(&clk->sclk_div_isp); + div = sub_div = readl(&clk->sclk_div_isp); break; case PERIPH_ID_SDMMC0: case PERIPH_ID_SDMMC1: src = readl(&clk->src_fsys); - div = readl(&clk->div_fsys1); + div = sub_div = readl(&clk->div_fsys1); break; case PERIPH_ID_SDMMC2: case PERIPH_ID_SDMMC3: src = readl(&clk->src_fsys); - div = readl(&clk->div_fsys2); + div = sub_div = readl(&clk->div_fsys2); break; case PERIPH_ID_I2C0: case PERIPH_ID_I2C1: @@ -422,12 +422,10 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C5: case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: - sclk = exynos5_get_pll_clk(MPLL); - sub_div = ((readl(&clk->div_top1) >> bit_info->div_bit) - & bit_info->div_mask) + 1; - div = ((readl(&clk->div_top0) >> bit_info->prediv_bit) - & bit_info->prediv_mask) + 1; - return (sclk / sub_div) / div; + src = EXYNOS_SRC_MPLL; + div = readl(&clk->div_top0); + sub_div = readl(&clk->div_top1); + break; default: debug("%s: invalid peripheral %d", __func__, peripheral); return -1; @@ -447,28 +445,28 @@ static unsigned long exynos5_get_periph_rate(int peripheral) sclk = exynos5_get_pll_clk(VPLL); break; default: + debug("%s: EXYNOS_SRC %d not supported\n", __func__, src); return 0; } - /* Ratio clock division for this peripheral */ - if (bit_info->div_bit >= 0) { - sub_div = (div >> bit_info->div_bit) & bit_info->div_mask; - sub_clk = sclk / (sub_div + 1); - } + /* Clock divider ratio for this peripheral */ + if (bit_info->div_bit >= 0) + div = (div >> bit_info->div_bit) & bit_info->div_mask; - if (bit_info->prediv_bit >= 0) { - div = (div >> bit_info->prediv_bit) & bit_info->prediv_mask; - return sub_clk / (div + 1); - } + /* Clock pre-divider ratio for this peripheral */ + if (bit_info->prediv_bit >= 0) + sub_div = (sub_div >> bit_info->prediv_bit) + & bit_info->prediv_mask; - return sub_clk; + /* Calculate and return required clock rate */ + return (sclk / (div + 1)) / (sub_div + 1); } static unsigned long exynos542x_get_periph_rate(int peripheral) { struct clk_bit_info *bit_info = get_clk_bit_info(peripheral); - unsigned long sclk, sub_clk = 0; - unsigned int src, div, sub_div = 0; + unsigned long sclk = 0; + unsigned int src = 0, div = 0, sub_div = 0; struct exynos5420_clock *clk = (struct exynos5420_clock *)samsung_get_base_clock(); @@ -516,10 +514,9 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) case PERIPH_ID_I2C8: case PERIPH_ID_I2C9: case PERIPH_ID_I2C10: - sclk = exynos542x_get_pll_clk(MPLL); - sub_div = ((readl(&clk->div_top1) >> bit_info->div_bit) - & bit_info->div_mask) + 1; - return sclk / sub_div; + src = EXYNOS542X_SRC_MPLL; + div = readl(&clk->div_top1); + break; default: debug("%s: invalid peripheral %d", __func__, peripheral); return -1; @@ -542,22 +539,21 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) sclk = exynos542x_get_pll_clk(RPLL); break; default: + debug("%s: EXYNOS542X_SRC %d not supported", __func__, src); return 0; } - /* Ratio clock division for this peripheral */ - if (bit_info->div_bit >= 0) { + /* Clock divider ratio for this peripheral */ + if (bit_info->div_bit >= 0) div = (div >> bit_info->div_bit) & bit_info->div_mask; - sub_clk = sclk / (div + 1); - } - if (bit_info->prediv_bit >= 0) { + /* Clock pre-divider ratio for this peripheral */ + if (bit_info->prediv_bit >= 0) sub_div = (sub_div >> bit_info->prediv_bit) - & bit_info->prediv_mask; - return sub_clk / (sub_div + 1); - } + & bit_info->prediv_mask; - return sub_clk; + /* Calculate and return required clock rate */ + return (sclk / (div + 1)) / (sub_div + 1); } unsigned long clock_get_periph_rate(int peripheral) From 1ae067952d509893bee7c267be954d45ab49f9dc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 9 Feb 2015 13:41:30 -0700 Subject: [PATCH 072/222] dm: stv0991: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- configs/stv0991_defconfig | 2 ++ include/configs/stv0991.h | 10 ---------- 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index 37b10ba893..1c9ba881a4 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -3,3 +3,5 @@ CONFIG_ARM=y CONFIG_TARGET_STV0991=y CONFIG_SYS_MALLOC_F=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DM=y +CONFIG_DM_SERIAL=y diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 071b1c2ca7..156e0fa8e1 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -29,19 +29,9 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) -#define CONFIG_DM /* serial port (PL011) configuration */ #define CONFIG_BAUDRATE 115200 -#ifdef CONFIG_DM -#define CONFIG_DM_SERIAL #define CONFIG_PL01X_SERIAL -#else -#define CONFIG_SYS_SERIAL0 0x80406000 -#define CONFIG_CONS_INDEX 0 -#define CONFIG_PL011_SERIAL -#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0} -#define CONFIG_PL011_CLOCK (2700 * 1000) -#endif /* user interface */ #define CONFIG_SYS_PROMPT "STV0991> " From b1f6659c420dae9cd06514fbd8342f39b3f326b9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 9 Feb 2015 13:41:31 -0700 Subject: [PATCH 073/222] dm: mx6: sabre: Move driver model CONFIGs to Kconfig Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass --- configs/mx6dlsabreauto_defconfig | 2 ++ configs/mx6dlsabresd_defconfig | 2 ++ configs/mx6qsabreauto_defconfig | 2 ++ configs/mx6qsabrelite_defconfig | 2 ++ configs/mx6qsabresd_defconfig | 2 ++ configs/mx6sabresd_spl_defconfig | 3 ++- include/configs/mx6sabre_common.h | 2 -- 7 files changed, 12 insertions(+), 3 deletions(-) diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index ccdfe31992..47f3f871ec 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -3,3 +3,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y CONFIG_SYS_MALLOC_F=y CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index 7f6cdff384..6adfd55708 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL" CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index fe3d797851..ab72942ad5 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -3,3 +3,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y CONFIG_SYS_MALLOC_F=y CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index dfa9c2e4db..50b75aee20 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index 09b01905e6..112918b1bb 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -3,3 +3,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y CONFIG_SYS_MALLOC_F=y CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index 12e784435c..67079ba0cf 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -2,4 +2,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q" +S:CONFIG_ARM=y +S:CONFIG_TARGET_MX6SABRESD=y - +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 80e48d141e..4aa8101524 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -25,8 +25,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG -#define CONFIG_DM -#define CONFIG_DM_THERMAL #define CONFIG_IMX6_THERMAL #define CONFIG_SYS_GENERIC_BOARD From 71edbe5cdaf1516f070cf6c0910910b3240b0bf5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 29 Jan 2015 11:35:16 -0700 Subject: [PATCH 074/222] buildman: Fix incorrect arguemnt in GetUpstream() This causes an error when trying to build a local branch which has a local branch as its upstream. Signed-off-by: Simon Glass Reported-by: Masahiro Yamada --- tools/patman/gitutil.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index c593070d67..4c2c35bf9a 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -129,7 +129,7 @@ def GetUpstream(git_dir, branch): return upstream, msg if remote == '.': - return merge + return merge, None elif remote and merge: leaf = merge.split('/')[-1] return '%s/%s' % (remote, leaf), None From 8895b3e16c7a2aab4275d52be19e485605dc5c7b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 29 Jan 2015 11:35:17 -0700 Subject: [PATCH 075/222] patman: Read in the git-mailrc alias file We should read this file to obtain a set of aliases. This reduces the need to create them in the ~/.patman file. This feature did exist in some version of patman, and is mentioned in the help but it did not find its way upstream. Reported-by: Graeme Russ Signed-off-by: Simon Glass --- tools/patman/settings.py | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/tools/patman/settings.py b/tools/patman/settings.py index 122e8fd981..ba2a68ff63 100644 --- a/tools/patman/settings.py +++ b/tools/patman/settings.py @@ -235,6 +235,31 @@ def _UpdateDefaults(parser, config): else: print "WARNING: Unknown setting %s" % name +def _ReadAliasFile(fname): + """Read in the U-Boot git alias file if it exists. + + Args: + fname: Filename to read. + """ + if os.path.exists(fname): + bad_line = None + with open(fname) as fd: + linenum = 0 + for line in fd: + linenum += 1 + line = line.strip() + if not line or line.startswith('#'): + continue + words = line.split(' ', 2) + if len(words) < 3 or words[0] != 'alias': + if not bad_line: + bad_line = "%s:%d:Invalid line '%s'" % (fname, linenum, + line) + continue + alias[words[1]] = [s.strip() for s in words[2].split(',')] + if bad_line: + print bad_line + def Setup(parser, project_name, config_fname=''): """Set up the settings module by reading config files. @@ -244,6 +269,8 @@ def Setup(parser, project_name, config_fname=''): for sections named "project_section" as well. config_fname: Config filename to read ('' for default) """ + # First read the git alias file if available + _ReadAliasFile('doc/git-mailrc') config = _ProjectConfigParser(project_name) if config_fname == '': config_fname = '%s/.patman' % os.getenv('HOME') From d908898333b22fb2345a7a165ff837fa6b947b0b Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Sun, 1 Feb 2015 00:12:44 +0100 Subject: [PATCH 076/222] buildman: allow multiple toolchains in a single path When buildman scans a toolchain path, it stops at the first toolchain found. However, a single path can contains several toolchains, each with its own prefix. This patch lets buildman scan all toolchains in the path. Signed-off-by: Albert ARIBAUD Acked-by: Simon Glass --- tools/buildman/toolchain.py | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index d4c5d4a11e..537797ad53 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -197,13 +197,14 @@ class Toolchains: Returns: Filename of C compiler if found, else None """ + fnames = [] for subdir in ['.', 'bin', 'usr/bin']: dirname = os.path.join(path, subdir) if verbose: print " - looking in '%s'" % dirname for fname in glob.glob(dirname + '/*gcc'): if verbose: print " - found '%s'" % fname - return fname - return None + fnames.append(fname) + return fnames def Scan(self, verbose): @@ -219,8 +220,8 @@ class Toolchains: if verbose: print 'Scanning for tool chains' for path in self.paths: if verbose: print " - scanning path '%s'" % path - fname = self.ScanPath(path, verbose) - if fname: + fnames = self.ScanPath(path, verbose) + for fname in fnames: self.Add(fname, True, verbose) def List(self): From 88539e4431cd6a596da316f81b644c4df606dbd9 Mon Sep 17 00:00:00 2001 From: Joe Hershberger Date: Fri, 6 Feb 2015 15:37:31 -0600 Subject: [PATCH 077/222] sandbox: Return '-c command' exit value as sandbox exit code When a command is passed into sandbox using the '-c' argument the command is run directly. This is most helpful when running tests (such as test-dm.sh). Previously the exit code was an unused enum. Change it to be the actual return code from the command so that the script calling sandbox can know if the command succeeded (tests passed). Also remove the now completely unused "exit_state" in sandbox. Signed-off-by: Joe Hershberger Acked-by: Simon Glass --- arch/sandbox/cpu/start.c | 6 ++++-- arch/sandbox/cpu/state.c | 5 ----- arch/sandbox/include/asm/state.h | 15 --------------- 3 files changed, 4 insertions(+), 22 deletions(-) diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 097f29a290..ec010402d7 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -78,11 +78,13 @@ int sandbox_main_loop_init(void) /* Execute command if required */ if (state->cmd) { + int retval; + cli_init(); - run_command_list(state->cmd, -1, 0); + retval = run_command_list(state->cmd, -1, 0); if (!state->interactive) - os_exit(state->exit_type); + os_exit(retval); } return 0; diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index ba73b7e251..033958ce74 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -13,11 +13,6 @@ static struct sandbox_state main_state; static struct sandbox_state *state; /* Pointer to current state record */ -void state_record_exit(enum exit_type_id exit_type) -{ - state->exit_type = exit_type; -} - static int state_ensure_space(int extra_size) { void *blob = state->state_fdt; diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index 32d55ccc4c..a0c24ba1e0 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -10,13 +10,6 @@ #include #include -/* How we exited U-Boot */ -enum exit_type_id { - STATE_EXIT_NORMAL, - STATE_EXIT_COLD_REBOOT, - STATE_EXIT_POWER_OFF, -}; - /** * Selects the behavior of the serial terminal. * @@ -50,7 +43,6 @@ struct sandbox_state { const char *cmd; /* Command to execute */ bool interactive; /* Enable cmdline after execute */ const char *fdt_fname; /* Filename of FDT binary */ - enum exit_type_id exit_type; /* How we exited U-Boot */ const char *parse_err; /* Error to report from parsing */ int argc; /* Program arguments */ char **argv; /* Command line arguments */ @@ -138,13 +130,6 @@ struct sandbox_state_io { .compat = _compat, \ } -/** - * Record the exit type to be reported by the test program. - * - * @param exit_type Exit type to record - */ -void state_record_exit(enum exit_type_id exit_type); - /** * Gets a pointer to the current state. * From e50ab22984ce90ffcc47bc620ed2caac0bcc02f7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 10 Feb 2015 18:52:35 -0700 Subject: [PATCH 078/222] sandbox: Adjust the order of the NO_SDL check An option is provided to avoid using SDL in U-Boot sandbox (and drop support for the LCD). However the check in the Makefile is too late and warnings are printed even if NO_SDL=y is given. Adjust the order to avoid this warning. Signed-off-by: Simon Glass Acked-by: Jeroen Hofstee --- arch/sandbox/config.mk | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index e38a44bd11..7b84f02a0a 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -5,10 +5,16 @@ PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM -DCONFIG_SYS_GENERIC_BOARD PLATFORM_LIBS += -lrt +# Define this to avoid linking with SDL, which requires SDL libraries +# This can solve 'sdl-config: Command not found' errors +ifneq ($(NO_SDL),) +PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL +else ifdef CONFIG_SANDBOX_SDL PLATFORM_LIBS += $(shell sdl-config --libs) PLATFORM_CPPFLAGS += $(shell sdl-config --cflags) endif +endif # Support generic board on sandbox __HAVE_ARCH_GENERIC_BOARD := y @@ -18,9 +24,3 @@ cmd_u-boot__ = $(CC) -o $@ -T u-boot.lds \ $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map CONFIG_ARCH_DEVICE_TREE := sandbox - -# Define this to avoid linking with SDL, which requires SDL libraries -# This can solve 'sdl-config: Command not found' errors -ifneq ($(NO_SDL),) -PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL -endif From 43730ba72c176ffc4d9858249475f458203d9757 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 13 Feb 2015 18:45:57 +0100 Subject: [PATCH 079/222] lsxl: add a README file The README describes the recovery method which can be used if the NAS box is not reachable anymore. Addionally, it describes the different boot scripts. Signed-off-by: Michael Walle --- board/buffalo/lsxl/README | 139 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 139 insertions(+) create mode 100644 board/buffalo/lsxl/README diff --git a/board/buffalo/lsxl/README b/board/buffalo/lsxl/README new file mode 100644 index 0000000000..ef5ed42880 --- /dev/null +++ b/board/buffalo/lsxl/README @@ -0,0 +1,139 @@ +Intro +----- +The Buffalo Linkstation Pro/Live, codename LS-XHL and LS-CHLv2, is a single +disk NAS server. The PCBs of the LS-XHL and LS-CHLv2 are almost the same. +The LS-XHL has a faster CPU and more RAM with a wider data bus, therefore +the LS-XHL PCB has two SDRAM chips. Both have a Kirkwood CPU (Marvell +88F6281). The only on-board storage is a 4 Mbit SPI flash which stores the +bootloader and its environment. The linux kernel and the initial ramdisk +are loaded from the hard disk. + + +Rescue Mode +----------- +These linkstations don't have a populated serial port. There is no way to +access an (unmodified) board other than using the netconsole. If you want +to recover from a bad environment setting or an empty environment, you can +do this only with a working network connection. + +Therefore, on entering the resuce mode, a random ethernet address is +generated if no valid address could be loaded from the environment variable +'ethaddr' and a DHCP request is sent. After a successful DHCP response is +received, the network settings are configured and the ncip is unset. Thus +all netconsole packets are broadcasted and you can use the netconsole to +access board from any host within the network segment. To determine the IP +address assigned to the board, you either have to sniff the traffic or +check the logs/leases of your DHCP server. + +The resuce mode is selected by holding the push button for at least one +second, while powering-on the device. The status LED turns solid amber if +the resuce mode is enabled, thus providing a visual feedback. + +Pressing the same button for at least 10 seconds on power-up will erase the +environment and reset the board. In this case the visual indication will +be: +- blinking blue, for about one second +- solid amber, for about nine seconds +- blinking amber, until you release the button + +This ensures, that you still can recover a device with a broken +environment by first erasing the environment and then entering the rescue +mode. + +Once the rescue mode is started, use the ncb binary from the tools/ +directory to access your board. There is a helper script named +'restore_env' to save your changes. It unsets all the network variables +which were set by the rescue mode, saves your changes and then resets the +board. + +The common use case for this is setting a MAC address. Let us assume you +have an empty environment, the board comes up with the amber LED blinking. +Then you enter the rescue mode, connect to the board with the ncb tool and +use the following commands to set your MAC address: + + setenv ethaddr 00:00:00:00:00:00 + run restore_env + +Of course you need to replace the 00:00:00:00:00:00 with your valid MAC +address, which can be found on a sticker on the bottom of your box. + + +Status LED +---------- +blinking blue + Bootloader is running normally. + +blinking amber + No ethaddr set. Use the `Rescue Mode` to set one. + +blinking red + Something bad happend during loading the operating system. + +The default behavior of the linux kernel is to turn on the blue LED. So if +the blinking blue LED changes to solid blue the kernel was loaded +successfully. + + +Power-on Switch +--------------- +The power-on switch is a software switch. If it is not in ON position when +the bootloader starts, the bootloader will disable the HDD and USB power +and stop the fan. Then it loops until the switch is in ON position again, +enables the power and fan again and continue booting. + + +Boot sources +------------ +The environment defines several different boot sources: + +legacy + This is the default boot source. It loads the kernel and ramdisk from the + attached HDD using the original filenames. The load addresses were + modified to support loading larger kernels. But it should behave the same + as the original bootloader. + +hdd + Use this for new-style booting. Loads three files /vmlinuz, /initrd.img + and /dtb from the boot partition. This should work out of the box if you + have debian and the flash-kernel package installed. + +usb + Same as hdd expect, that the files are loaded from an attached USB mass + storage device and the filename for the device tree is kirkwood-lsxhl.dtb + (or kirkwood-lschlv2.dtb). + +net + Same as usb expect, that the file are loaded from the network. + +rescue + Automatically activated if the push button is pressed for at least one + second on power-up. Does a DHCP request and enables the network console. + See `Rescue Mode` for more information. + +You can change the boot source by setting the 'bootsource' variable to the +corresponding value. Please note, that the restore_env script will the the +bootsource back to 'legacy'. + + +Flash map +--------- +00000 - 5ffff u-boot +60000 - 6ffff reserved, may be used to store dtb +70000 - 7ffff u-boot environment + + +Compiling +--------- +make lsxhl_config (or lschlv2_config) +make u-boot.kwb + + +Update your board +----------------- +Just flash the resulting u-boot.kwb to the beginning of the SPI flash. If +you already have a bootloader CLI, you can use the following commands: + + sf probe 0 + bootp ${loadaddr} u-boot.kwb + sf erase 0 +${filelen} + sf write 0 ${fileaddr} ${filesize} From 89831112d46fb19127f3de9cec781e5a9c28b281 Mon Sep 17 00:00:00 2001 From: "Egli, Samuel" Date: Fri, 13 Feb 2015 15:47:10 +0100 Subject: [PATCH 080/222] mtd, omap: fix case NAND_OMAP_GPMC_PREFETCH not defined MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The patch c316f577b4b72d1a1aeb559e9b3fad20808f1ffd breaks siemens boards because prefetch mode is not enabled. I assume it breaks other boards as well that don't use prefetch. This patch sets read_buf to nand_read_buf if NAND_OMAP_GPMC_PREFETCH is not defined. Signed-off-by: Samuel Egli CC: Daniel Mack CC: Guido Martínez CC: Tom Rini CC: Heiko Schocher --- drivers/mtd/nand/omap_gpmc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index fc64f48144..24123fcfe5 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -989,12 +989,15 @@ int board_nand_init(struct nand_chip *nand) if (err) return err; -#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH /* TODO: Implement for 16-bit bus width */ if (nand->options & NAND_BUSWIDTH_16) nand->read_buf = nand_read_buf16; +#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH else nand->read_buf = omap_nand_read_prefetch8; +#else + else + nand->read_buf = nand_read_buf; #endif nand->dev_ready = omap_dev_ready; From aa8ac43645243b69faf0e81fab5f0d6fcf4285cf Mon Sep 17 00:00:00 2001 From: Angela Stegmaier Date: Mon, 16 Feb 2015 10:15:55 +0530 Subject: [PATCH 081/222] ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier Signed-off-by: Lokesh Vutla --- arch/arm/cpu/armv7/omap5/sdram.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 7d8cec08c2..e5456ff7cb 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -186,18 +186,18 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { }; const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = { - .sdram_config_init = 0x61851AB2, - .sdram_config = 0x61851AB2, + .sdram_config_init = 0x61862B32, + .sdram_config = 0x61862B32, .sdram_config2 = 0x08000000, - .ref_ctrl = 0x00001035, - .sdram_tim1 = 0xCCCF36B3, - .sdram_tim2 = 0x308F7FDA, - .sdram_tim3 = 0x027F88A8, + .ref_ctrl = 0x0000144A, + .sdram_tim1 = 0xD113781C, + .sdram_tim2 = 0x308F7FE3, + .sdram_tim3 = 0x009F86A8, .read_idle_ctrl = 0x00050000, .zq_config = 0x0007190B, .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0024400A, - .emif_ddr_phy_ctlr_1 = 0x0024400A, + .emif_ddr_phy_ctlr_1_init = 0x0E24400D, + .emif_ddr_phy_ctlr_1 = 0x0E24400D, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, .emif_ddr_ext_phy_ctrl_2 = 0x00A400A4, .emif_ddr_ext_phy_ctrl_3 = 0x00A900A9, From 802bb57a584db2202a47d41ac730fe76ddeb4f33 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Mon, 16 Feb 2015 10:15:56 +0530 Subject: [PATCH 082/222] ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register value The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla --- arch/arm/cpu/armv7/omap-common/emif-common.c | 4 +++- arch/arm/cpu/armv7/omap5/sdram.c | 9 ++++++--- arch/arm/include/asm/emif.h | 1 + board/ti/beagle_x15/board.c | 6 ++++-- 4 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index e601ba1886..c01a98f719 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -252,6 +252,8 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) { struct emif_reg_struct *emif = (struct emif_reg_struct *)base; + writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl); + writel(regs->sdram_config_init, &emif->emif_sdram_config); /* * Set SDRAM_CONFIG and PHY control registers to locked frequency * and RL =7. As the default values of the Mode Registers are not @@ -265,7 +267,6 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) writel(regs->sdram_tim2, &emif->emif_sdram_tim_2); writel(regs->sdram_tim3, &emif->emif_sdram_tim_3); - writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl); writel(regs->read_idle_ctrl, &emif->emif_read_idlectrl); /* @@ -274,6 +275,7 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) */ if (is_dra7xx()) { do_ext_phy_settings(base, regs); + writel(regs->ref_ctrl_final, &emif->emif_sdram_ref_ctrl); writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config); writel(regs->sdram_config_init, &emif->emif_sdram_config); } else { diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index e5456ff7cb..61e9aefe09 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -141,7 +141,8 @@ const struct emif_regs emif_1_regs_ddr3_532_mhz_1cs_dra_es1 = { .sdram_config_init = 0x61851ab2, .sdram_config = 0x61851ab2, .sdram_config2 = 0x08000000, - .ref_ctrl = 0x00001035, + .ref_ctrl = 0x000040F1, + .ref_ctrl_final = 0x00001035, .sdram_tim1 = 0xCCCF36B3, .sdram_tim2 = 0x308F7FDA, .sdram_tim3 = 0x027F88A8, @@ -165,7 +166,8 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { .sdram_config_init = 0x61851B32, .sdram_config = 0x61851B32, .sdram_config2 = 0x08000000, - .ref_ctrl = 0x00001035, + .ref_ctrl = 0x000040F1, + .ref_ctrl_final = 0x00001035, .sdram_tim1 = 0xCCCF36B3, .sdram_tim2 = 0x308F7FDA, .sdram_tim3 = 0x027F88A8, @@ -189,7 +191,8 @@ const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = { .sdram_config_init = 0x61862B32, .sdram_config = 0x61862B32, .sdram_config2 = 0x08000000, - .ref_ctrl = 0x0000144A, + .ref_ctrl = 0x0000493E, + .ref_ctrl_final = 0x0000144A, .sdram_tim1 = 0xD113781C, .sdram_tim2 = 0x308F7FE3, .sdram_tim3 = 0x009F86A8, diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index 342f045f41..7a545ea01a 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -1149,6 +1149,7 @@ struct emif_regs { u32 sdram_config; u32 sdram_config2; u32 ref_ctrl; + u32 ref_ctrl_final; u32 sdram_tim1; u32 sdram_tim2; u32 sdram_tim3; diff --git a/board/ti/beagle_x15/board.c b/board/ti/beagle_x15/board.c index db96e347e7..3a7e04d542 100644 --- a/board/ti/beagle_x15/board.c +++ b/board/ti/beagle_x15/board.c @@ -47,7 +47,8 @@ static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { .sdram_config_init = 0x61851b32, .sdram_config = 0x61851b32, .sdram_config2 = 0x00000000, - .ref_ctrl = 0x00001035, + .ref_ctrl = 0x000040F1, + .ref_ctrl_final = 0x00001035, .sdram_tim1 = 0xceef266b, .sdram_tim2 = 0x328f7fda, .sdram_tim3 = 0x027f88a8, @@ -103,7 +104,8 @@ static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { .sdram_config_init = 0x61851b32, .sdram_config = 0x61851b32, .sdram_config2 = 0x00000000, - .ref_ctrl = 0x00001035, + .ref_ctrl = 0x000040F1, + .ref_ctrl_final = 0x00001035, .sdram_tim1 = 0xceef266b, .sdram_tim2 = 0x328f7fda, .sdram_tim3 = 0x027f88a8, From 1860d101964d6ea77e5411e62e3b42a64dc94865 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Mon, 16 Feb 2015 10:15:57 +0530 Subject: [PATCH 083/222] ARM: DRA7-evm: DDR3: Update leveling values Update the software leveling parameters. This fixes the random crash seen on DRA7-evm. Signed-off-by: Lokesh Vutla --- arch/arm/cpu/armv7/omap5/sdram.c | 60 ++++++++++++++++---------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 61e9aefe09..5f8daa1ee1 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -152,10 +152,10 @@ const struct emif_regs emif_1_regs_ddr3_532_mhz_1cs_dra_es1 = { .emif_ddr_phy_ctlr_1_init = 0x0E24400A, .emif_ddr_phy_ctlr_1 = 0x0E24400A, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, - .emif_ddr_ext_phy_ctrl_2 = 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_3 = 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_4 = 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_5 = 0x00BB00BB, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009B009B, + .emif_ddr_ext_phy_ctrl_5 = 0x009E009E, .emif_rd_wr_lvl_rmp_win = 0x00000000, .emif_rd_wr_lvl_rmp_ctl = 0x00000000, .emif_rd_wr_lvl_ctl = 0x00000000, @@ -177,10 +177,10 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { .emif_ddr_phy_ctlr_1_init = 0x0E24400A, .emif_ddr_phy_ctlr_1 = 0x0E24400A, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, - .emif_ddr_ext_phy_ctrl_2 = 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_3 = 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_4 = 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_5 = 0x00BB00BB, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009B009B, + .emif_ddr_ext_phy_ctrl_5 = 0x009E009E, .emif_rd_wr_lvl_rmp_win = 0x00000000, .emif_rd_wr_lvl_rmp_ctl = 0x00000000, .emif_rd_wr_lvl_ctl = 0x00000000, @@ -423,22 +423,22 @@ const u32 ddr3_ext_phy_ctrl_const_base_es2[] = { const u32 dra_ddr3_ext_phy_ctrl_const_base_es1_emif1[] = { - 0x00BB00BB, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, + 0x00980098, + 0x00340034, + 0x00350035, + 0x00340034, + 0x00310031, + 0x00340034, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, + 0x00480048, + 0x004A004A, + 0x00520052, + 0x00550055, + 0x00500050, 0x00000000, 0x00600020, 0x40010080, @@ -452,22 +452,22 @@ dra_ddr3_ext_phy_ctrl_const_base_es1_emif1[] = { const u32 dra_ddr3_ext_phy_ctrl_const_base_es1_emif2[] = { - 0x00BB00BB, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, + 0x00980098, + 0x00330033, + 0x00330033, + 0x002F002F, + 0x00320032, + 0x00310031, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, + 0x00520052, + 0x00520052, + 0x00470047, + 0x00490049, + 0x00500050, 0x00000000, 0x00600020, 0x40010080, From bba379d498b4ed408e79f7aec6dc23a3572c37e7 Mon Sep 17 00:00:00 2001 From: Steve Kipisz Date: Wed, 11 Feb 2015 18:54:28 -0500 Subject: [PATCH 084/222] clock_am43xx:Set the MAC clock to /5 for OPP100 When EMAC is in the boot order, the boot ROM sets OPP50 and the MAC clock is set to /2. SPL needs to change it to /5 for Ethernet to generate the correct txclk. This patch sets it correctly. Signed-off-by: Steve Kipisz --- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 3 +++ arch/arm/include/asm/arch-am33xx/cpu.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 31188c85bc..529a119514 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -118,4 +118,7 @@ void enable_basic_clocks(void) /* Select the Master osc clk as Timer2 clock source */ writel(0x1, &cmdpll->clktimer2clk); + + /* For OPP100 the mac clock should be /5. */ + writel(0x4, &cmdpll->clkselmacclk); } diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index b94b56cba7..523d22eb87 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -400,6 +400,8 @@ struct prm_device_inst { struct cm_dpll { unsigned int resv1; unsigned int clktimer2clk; /* offset 0x04 */ + unsigned int resv2[11]; + unsigned int clkselmacclk; /* offset 0x34 */ }; #endif /* CONFIG_AM43XX */ From 66c98a0c3807720a32ce49c9ba2a5808555062d7 Mon Sep 17 00:00:00 2001 From: Vitaly Andrianov Date: Wed, 11 Feb 2015 14:07:58 -0500 Subject: [PATCH 085/222] keystone2: ddr3: eliminate using global ddr3_size variable KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov Tested-by: Nishanth Menon --- arch/arm/cpu/armv7/keystone/ddr3.c | 5 +---- arch/arm/include/asm/arch-keystone/ddr3.h | 5 ++--- board/ti/ks2_evm/board.c | 6 ++++-- board/ti/ks2_evm/ddr3_k2e.c | 14 ++++++-------- board/ti/ks2_evm/ddr3_k2hk.c | 11 ++--------- board/ti/ks2_evm/ddr3_k2l.c | 12 ++---------- 6 files changed, 17 insertions(+), 36 deletions(-) diff --git a/arch/arm/cpu/armv7/keystone/ddr3.c b/arch/arm/cpu/armv7/keystone/ddr3.c index 923906afb5..dfb27b5ba2 100644 --- a/arch/arm/cpu/armv7/keystone/ddr3.c +++ b/arch/arm/cpu/armv7/keystone/ddr3.c @@ -263,17 +263,14 @@ static void ddr3_map_ecc_cic2_irq(u32 base) } #endif -void ddr3_init_ecc(u32 base) +void ddr3_init_ecc(u32 base, u32 ddr3_size) { - u32 ddr3_size; - if (!ddr3_ecc_support_rmw(base)) { ddr3_disable_ecc(base); return; } ddr3_ecc_init_range(base); - ddr3_size = ddr3_get_size(); ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size); /* mapping DDR3 ECC system interrupt from CIC2 to GIC */ diff --git a/arch/arm/include/asm/arch-keystone/ddr3.h b/arch/arm/include/asm/arch-keystone/ddr3.h index b044d6f18f..a22c237c80 100644 --- a/arch/arm/include/asm/arch-keystone/ddr3.h +++ b/arch/arm/include/asm/arch-keystone/ddr3.h @@ -48,10 +48,9 @@ struct ddr3_emif_config { unsigned int sdrfc; }; -void ddr3_init(void); -int ddr3_get_size(void); +u32 ddr3_init(void); void ddr3_reset_ddrphy(void); -void ddr3_init_ecc(u32 base); +void ddr3_init_ecc(u32 base, u32 ddr3_size); void ddr3_disable_ecc(u32 base); void ddr3_check_ecc_int(u32 base); int ddr3_ecc_support_rmw(u32 base); diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 04ec675103..8892a2843d 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -35,12 +35,14 @@ static struct aemif_config aemif_configs[] = { int dram_init(void) { - ddr3_init(); + u32 ddr3_size; + + ddr3_size = ddr3_init(); gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE); aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); - ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE); + ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size); return 0; } diff --git a/board/ti/ks2_evm/ddr3_k2e.c b/board/ti/ks2_evm/ddr3_k2e.c index 40fd96607d..35ffb42056 100644 --- a/board/ti/ks2_evm/ddr3_k2e.c +++ b/board/ti/ks2_evm/ddr3_k2e.c @@ -11,11 +11,11 @@ #include "ddr3_cfg.h" #include -static int ddr3_size; static struct pll_init_data ddr3_400 = DDR3_PLL_400; -void ddr3_init(void) +u32 ddr3_init(void) { + u32 ddr3_size; char dimm_name[32]; if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1)) @@ -43,13 +43,11 @@ void ddr3_init(void) printf("DRAM: 4 GiB\n"); ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g); ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g); + } else { + printf("Unknown SO-DIMM. Cannot configure DDR3\n"); + while (1) + ; } -} -/** - * ddr3_get_size - return ddr3 size in GiB - */ -int ddr3_get_size(void) -{ return ddr3_size; } diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c index a1c3d05f8e..b36eb27bfa 100644 --- a/board/ti/ks2_evm/ddr3_k2hk.c +++ b/board/ti/ks2_evm/ddr3_k2hk.c @@ -12,14 +12,13 @@ #include #include -static int ddr3_size; - struct pll_init_data ddr3a_333 = DDR3_PLL_333(A); struct pll_init_data ddr3a_400 = DDR3_PLL_400(A); -void ddr3_init(void) +u32 ddr3_init(void) { char dimm_name[32]; + u32 ddr3_size; ddr3_get_dimm_params(dimm_name); @@ -93,12 +92,6 @@ void ddr3_init(void) /* Apply the workaround for PG 1.0 and 1.1 Silicons */ if (cpu_revision() <= 1) ddr3_err_reset_workaround(); -} -/** - * ddr3_get_size - return ddr3 size in GiB - */ -int ddr3_get_size(void) -{ return ddr3_size; } diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c index 15a14f2aaf..00fc1943f5 100644 --- a/board/ti/ks2_evm/ddr3_k2l.c +++ b/board/ti/ks2_evm/ddr3_k2l.c @@ -11,28 +11,20 @@ #include "ddr3_cfg.h" #include -static int ddr3_size; static struct pll_init_data ddr3_400 = DDR3_PLL_400; -void ddr3_init(void) +u32 ddr3_init(void) { init_pll(&ddr3_400); /* No SO-DIMM, 2GB discreet DDR */ printf("DRAM: 2 GiB\n"); - ddr3_size = 2; /* Reset DDR3 PHY after PLL enabled */ ddr3_reset_ddrphy(); ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g); ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g); -} -/** - * ddr3_get_size - return ddr3 size in GiB - */ -int ddr3_get_size(void) -{ - return ddr3_size; + return 2; } From 312aca4e6964812007c8218c0b4b0737e9e0f46a Mon Sep 17 00:00:00 2001 From: Vitaly Andrianov Date: Wed, 11 Feb 2015 14:05:41 -0500 Subject: [PATCH 086/222] net: keystone_net: move serdes setup to initialization function On Keystone2 devices serdes must be initialized before accessing MDIO bus. This commit moves the keystone2_net_serdes_setup() from keystone2_eth_open to keystone2_emac_initialize to meet that requirement. This also eliminates unnecessary serdes initializatin every time when the keystone2_eth_open is being called. Signed-off-by: Vitaly Andrianov Acked-by: Joe Hershberger Tested-by: Nishanth Menon --- drivers/net/keystone_net.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index bedab1d606..35f1a57331 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -398,8 +398,6 @@ static int keystone2_eth_open(struct eth_device *dev, bd_t *bis) sys_has_mdio = (eth_priv->sgmii_link_type == SGMII_LINK_MAC_PHY) ? 1 : 0; - keystone2_net_serdes_setup(); - if (sys_has_mdio) keystone2_mdio_reset(mdio_bus); @@ -556,6 +554,8 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv) return res; } + keystone2_net_serdes_setup(); + /* Create phy device and bind it with driver */ #ifdef CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE phy_dev = phy_connect(mdio_bus, eth_priv->phy_addr, From 1fddd7b63c69b8da40b5dc737db0382f473f9644 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Mon, 9 Feb 2015 00:06:10 +0100 Subject: [PATCH 087/222] tools/imagetool: remove linker script MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit a93648d197df48fa46dd55f925ff70468bd81c71 introduced linker generated lists for imagetool which is the base for some host tools (mkimage, dumpimage, et al.). Unfortunately some host tool chains do not support the used type of linker scripts. Therefore this commit broke these host-tools for them, namely FreeBSD and Darwin (OS/X). This commit tries to fix this. In order to have a clean distinction between host and embedded code space we need to introduce our own linker generated list instead of re-using the available linker_lists.h provided functionality. So we copy the implementation used in linux kernel script/mod/file2alias.c which has the very same problem (cause it is a host tool). This code also comes with an abstraction for Mach-O binary format used in Darwin systems. Signed-off-by: Andreas Bießmann Cc: Guilherme Maciel Ferreira --- Makefile | 5 ++++ tools/Makefile | 2 -- tools/imagetool.c | 35 ++++++++++++++-------------- tools/imagetool.h | 56 ++++++++++++++++++++++++++++++++++++--------- tools/imagetool.lds | 24 ------------------- 5 files changed, 67 insertions(+), 55 deletions(-) delete mode 100644 tools/imagetool.lds diff --git a/Makefile b/Makefile index 6da42157b5..0538821b5c 100644 --- a/Makefile +++ b/Makefile @@ -281,6 +281,11 @@ os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \ HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc") HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp") HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress") + +# since Lion (10.7) ASLR is on by default, but we use linker generated lists +# in some host tools which is a problem then ... so disable ASLR for these +# tools +HOSTLDFLAGS += $(call os_x_before, 10, 7, "", "-Xlinker -no_pie") endif # Decide whether to build built-in, modular, or both. diff --git a/tools/Makefile b/tools/Makefile index e4b23eb5b8..88770b0611 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -128,8 +128,6 @@ HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage) HOSTLOADLIBES_fit_info := $(HOSTLOADLIBES_mkimage) HOSTLOADLIBES_fit_check_sign := $(HOSTLOADLIBES_mkimage) -HOSTLDFLAGS += -T $(srctree)/tools/imagetool.lds - hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl HOSTCFLAGS_mkexynosspl.o := -pedantic diff --git a/tools/imagetool.c b/tools/imagetool.c index 148e4662b7..4b0b73db52 100644 --- a/tools/imagetool.c +++ b/tools/imagetool.c @@ -12,16 +12,16 @@ struct image_type_params *imagetool_get_type(int type) { - struct image_type_params *curr; - struct image_type_params *start = ll_entry_start( - struct image_type_params, image_type); - struct image_type_params *end = ll_entry_end( - struct image_type_params, image_type); + struct image_type_params **curr; + INIT_SECTION(image_type); + + struct image_type_params **start = __start_image_type; + struct image_type_params **end = __stop_image_type; for (curr = start; curr != end; curr++) { - if (curr->check_image_type) { - if (!curr->check_image_type(type)) - return curr; + if ((*curr)->check_image_type) { + if (!(*curr)->check_image_type(type)) + return *curr; } } return NULL; @@ -34,16 +34,15 @@ int imagetool_verify_print_header( struct image_tool_params *params) { int retval = -1; - struct image_type_params *curr; + struct image_type_params **curr; + INIT_SECTION(image_type); - struct image_type_params *start = ll_entry_start( - struct image_type_params, image_type); - struct image_type_params *end = ll_entry_end( - struct image_type_params, image_type); + struct image_type_params **start = __start_image_type; + struct image_type_params **end = __stop_image_type; for (curr = start; curr != end; curr++) { - if (curr->verify_header) { - retval = curr->verify_header((unsigned char *)ptr, + if ((*curr)->verify_header) { + retval = (*curr)->verify_header((unsigned char *)ptr, sbuf->st_size, params); if (retval == 0) { @@ -51,12 +50,12 @@ int imagetool_verify_print_header( * Print the image information if verify is * successful */ - if (curr->print_header) { - curr->print_header(ptr); + if ((*curr)->print_header) { + (*curr)->print_header(ptr); } else { fprintf(stderr, "%s: print_header undefined for %s\n", - params->cmdname, curr->name); + params->cmdname, (*curr)->name); } break; } diff --git a/tools/imagetool.h b/tools/imagetool.h index f35dec71c7..3e15b4e22b 100644 --- a/tools/imagetool.h +++ b/tools/imagetool.h @@ -20,15 +20,6 @@ #include #include -/* define __KERNEL__ in order to get the definitions - * required by the linker list. This is probably not - * the best way to do this */ -#ifndef __KERNEL__ -#define __KERNEL__ -#include -#undef __KERNEL__ -#endif /* __KERNEL__ */ - #include "fdt_host.h" #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) @@ -194,6 +185,46 @@ int imagetool_save_subimage( void pbl_load_uboot(int fd, struct image_tool_params *mparams); +#define ___cat(a, b) a ## b +#define __cat(a, b) ___cat(a, b) + +/* we need some special handling for this host tool running eventually on + * Darwin. The Mach-O section handling is a bit different than ELF section + * handling. The differnces in detail are: + * a) we have segments which have sections + * b) we need a API call to get the respective section symbols */ +#if defined(__MACH__) +#include + +#define INIT_SECTION(name) do { \ + unsigned long name ## _len; \ + char *__cat(pstart_, name) = getsectdata("__TEXT", \ + #name, &__cat(name, _len)); \ + char *__cat(pstop_, name) = __cat(pstart_, name) + \ + __cat(name, _len); \ + __cat(__start_, name) = (void *)__cat(pstart_, name); \ + __cat(__stop_, name) = (void *)__cat(pstop_, name); \ + } while (0) +#define SECTION(name) __attribute__((section("__TEXT, " #name))) + +struct image_type_params **__start_image_type, **__stop_image_type; +#else +#define INIT_SECTION(name) /* no-op for ELF */ +#define SECTION(name) __attribute__((section(#name))) + +/* We construct a table of pointers in an ELF section (pointers generally + * go unpadded by gcc). ld creates boundary syms for us. */ +extern struct image_type_params *__start_image_type[], *__stop_image_type[]; +#endif /* __MACH__ */ + +#if !defined(__used) +# if __GNUC__ == 3 && __GNUC_MINOR__ < 3 +# define __used __attribute__((__unused__)) +# else +# define __used __attribute__((__used__)) +# endif +#endif + #define U_BOOT_IMAGE_TYPE( \ _id, \ _name, \ @@ -208,7 +239,8 @@ void pbl_load_uboot(int fd, struct image_tool_params *mparams); _fflag_handle, \ _vrec_header \ ) \ - ll_entry_declare(struct image_type_params, _id, image_type) = { \ + static struct image_type_params __cat(image_type_, _id) = \ + { \ .name = _name, \ .header_size = _header_size, \ .hdr = _header, \ @@ -220,6 +252,8 @@ void pbl_load_uboot(int fd, struct image_tool_params *mparams); .check_image_type = _check_image_type, \ .fflag_handle = _fflag_handle, \ .vrec_header = _vrec_header \ - } + }; \ + static struct image_type_params *SECTION(image_type) __used \ + __cat(image_type_ptr_, _id) = &__cat(image_type_, _id) #endif /* _IMAGETOOL_H_ */ diff --git a/tools/imagetool.lds b/tools/imagetool.lds deleted file mode 100644 index 7e92b4ac66..0000000000 --- a/tools/imagetool.lds +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (c) 2011-2012 The Chromium OS Authors. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -SECTIONS -{ - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - __u_boot_sandbox_option_start = .; - _u_boot_sandbox_getopt : { *(.u_boot_sandbox_getopt) } - __u_boot_sandbox_option_end = .; - - __bss_start = .; -} - -INSERT BEFORE .data; From 364ac5b5836055c2a49f986769b2d925f230f093 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Sat, 7 Feb 2015 09:12:39 +0800 Subject: [PATCH 088/222] image: Convert to use fdt_for_each_subnode macro Use fdt_for_each_subnode macro to simplify the code a bit. Signed-off-by: Axel Lin Acked-by: Simon Glass --- common/image-fit.c | 4 +--- common/image-sig.c | 16 ++++------------ 2 files changed, 5 insertions(+), 15 deletions(-) diff --git a/common/image-fit.c b/common/image-fit.c index b47d11024f..778d2a148b 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -1010,9 +1010,7 @@ int fit_image_verify(const void *fit, int image_noffset) } /* Process all hash subnodes of the component image node */ - for (noffset = fdt_first_subnode(fit, image_noffset); - noffset >= 0; - noffset = fdt_next_subnode(fit, noffset)) { + fdt_for_each_subnode(fit, noffset, image_noffset) { const char *name = fit_get_name(fit, noffset, NULL); /* diff --git a/common/image-sig.c b/common/image-sig.c index 2c9f0cdf7a..eda5e1353a 100644 --- a/common/image-sig.c +++ b/common/image-sig.c @@ -212,9 +212,7 @@ static int fit_image_verify_sig(const void *fit, int image_noffset, int ret; /* Process all hash subnodes of the component image node */ - for (noffset = fdt_first_subnode(fit, image_noffset); - noffset >= 0; - noffset = fdt_next_subnode(fit, noffset)) { + fdt_for_each_subnode(fit, noffset, image_noffset) { const char *name = fit_get_name(fit, noffset, NULL); if (!strncmp(name, FIT_SIG_NODENAME, @@ -262,9 +260,7 @@ int fit_image_verify_required_sigs(const void *fit, int image_noffset, return 0; } - for (noffset = fdt_first_subnode(sig_blob, sig_node); - noffset >= 0; - noffset = fdt_next_subnode(sig_blob, noffset)) { + fdt_for_each_subnode(sig_blob, noffset, sig_node) { const char *required; int ret; @@ -397,9 +393,7 @@ static int fit_config_verify_sig(const void *fit, int conf_noffset, int ret; /* Process all hash subnodes of the component conf node */ - for (noffset = fdt_first_subnode(fit, conf_noffset); - noffset >= 0; - noffset = fdt_next_subnode(fit, noffset)) { + fdt_for_each_subnode(fit, noffset, conf_noffset) { const char *name = fit_get_name(fit, noffset, NULL); if (!strncmp(name, FIT_SIG_NODENAME, @@ -444,9 +438,7 @@ int fit_config_verify_required_sigs(const void *fit, int conf_noffset, return 0; } - for (noffset = fdt_first_subnode(sig_blob, sig_node); - noffset >= 0; - noffset = fdt_next_subnode(sig_blob, noffset)) { + fdt_for_each_subnode(sig_blob, noffset, sig_node) { const char *required; int ret; From af21f2fb6f7a1178a98f1172bf5df7b7fd8545ee Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 7 Feb 2015 13:38:19 +0100 Subject: [PATCH 089/222] config_distro_bootcmd.h: Enable CONFIG_CMD_PART The recent changes to config_distro_bootcmd.h require CONFIG_CMD_PART to be defined, as the default bootcmd now uses the "part" command. This fixes sunxi boards not booting with v2015.04-rc1. Signed-off-by: Hans de Goede Acked-by: Stephen Warren --- include/config_distro_bootcmd.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 49674f4537..07a0b3b234 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -10,6 +10,10 @@ #ifndef _CONFIG_CMD_DISTRO_BOOTCMD_H #define _CONFIG_CMD_DISTRO_BOOTCMD_H +/* We need the part command */ +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + #define BOOTENV_SHARED_BLKDEV_BODY(devtypel) \ "if " #devtypel " dev ${devnum}; then " \ "setenv devtype " #devtypel "; " \ From e8f768ab3346feefcf47c9d613d0f55501aa09c6 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Mon, 2 Feb 2015 23:04:08 +0100 Subject: [PATCH 090/222] sunxi: Ampe A76 support Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 5 +++++ configs/Ampe_A76_defconfig | 15 +++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 configs/Ampe_A76_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index faa413cb06..f61144d510 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -46,6 +46,11 @@ S: Maintained F: board/sunxi/dram_a20_olinuxino_l2.c F: configs/A20-OLinuXino-Lime2_defconfig +AMPE A76 BOARD +M: Paul Kocialkowski +S: Maintained +F: configs/Ampe_A76_defconfig + COLOMBUS BOARD M: Maxime Ripard S: Maintained diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig new file mode 100644 index 0000000000..2054fc3c96 --- /dev/null +++ b/configs/Ampe_A76_defconfig @@ -0,0 +1,15 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" +CONFIG_FDTFILE="sun5i-a13-ampe-a76.dtb" +CONFIG_USB_MUSB_SUNXI=y +CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_POWER="AXP0-0" +CONFIG_VIDEO_LCD_BL_EN="AXP0-1" +CONFIG_VIDEO_LCD_BL_PWM="PB2" ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_SUNXI=y ++S:CONFIG_MACH_SUN5I=y ++S:CONFIG_DRAM_CLK=432 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=4 From 8910a7d37a0c0c7b73c8b1e6175966d58979ba5c Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 3 Feb 2015 08:45:33 +0100 Subject: [PATCH 091/222] sunxi: MAINTAINERS: drop no longer existing felconfig-s from MAINTAINERS Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index f61144d510..9a287d3c30 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -62,9 +62,7 @@ M: Hans de Goede S: Maintained F: include/configs/sun7i.h F: configs/Cubieboard2_defconfig -F: configs/Cubieboard2_FEL_defconfig F: configs/Cubietruck_defconfig -F: configs/Cubietruck_FEL_defconfig GEMEI-G9 TABLET M: Priit Laes From 5633a296ebb970d0a6be839fb37eaf8a11aa35f8 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 2 Feb 2015 17:13:29 +0100 Subject: [PATCH 092/222] sunxi: video: Do not use CONFIG_SYS_MEM_TOP_HIDE for the framebuffer Do not use CONFIG_SYS_MEM_TOP_HIDE for the framebuffer, instead override board_get_usable_ram_top to make sure that u-boot is not relocated into the area where we want to use the framebuffer, and patch the devicetree from sunxi_simplefb_setup() to tell the kernel to not touch the framebuffer. This makes u-boot properly see the framebuffer as dram, and initalize the level 2 cache for it, fixing the very slow cfb scrolling problem. As an added bonus this stops us from reserving the framebuffer when simplefb is not used because an older kernel is booted, or hdp is used and no hdmi cable was plugged in, freeing up the memory for kernel use in these cases. Reported-by: Siarhei Siamashka Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- drivers/video/sunxi_display.c | 22 +++++++++++++++++++++- include/configs/sunxi-common.h | 8 +++----- 2 files changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index f5f24fc020..cd5963a751 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -1060,6 +1060,11 @@ static const char *sunxi_get_mon_desc(enum sunxi_monitor monitor) return NULL; /* never reached */ } +ulong board_get_usable_ram_top(ulong total_size) +{ + return gd->ram_top - CONFIG_SUNXI_MAX_FB_SIZE; +} + void *video_hw_init(void) { static GraphicDevice *graphic_device = &sunxi_display.graphic_device; @@ -1076,7 +1081,7 @@ void *video_hw_init(void) memset(&sunxi_display, 0, sizeof(struct sunxi_display)); printf("Reserved %dkB of RAM for Framebuffer.\n", - CONFIG_SUNXI_FB_SIZE >> 10); + CONFIG_SUNXI_MAX_FB_SIZE >> 10); gd->fb_base = gd->ram_top; video_get_ctfb_res_modes(RES_MODE_1024x768, 24, &mode, @@ -1194,6 +1199,7 @@ int sunxi_simplefb_setup(void *blob) { static GraphicDevice *graphic_device = &sunxi_display.graphic_device; int offset, ret; + u64 start, size; const char *pipeline = NULL; #ifdef CONFIG_MACH_SUN4I @@ -1237,6 +1243,20 @@ int sunxi_simplefb_setup(void *blob) return 0; /* Keep older kernels working */ } + /* + * Do not report the framebuffer as free RAM to the OS, note we cannot + * use fdt_add_mem_rsv() here, because then it is still seen as RAM, + * and e.g. Linux refuses to iomap RAM on ARM, see: + * linux/arch/arm/mm/ioremap.c around line 301. + */ + start = gd->bd->bi_dram[0].start; + size = gd->bd->bi_dram[0].size - CONFIG_SUNXI_MAX_FB_SIZE; + ret = fdt_fixup_memory_banks(blob, &start, &size, 1); + if (ret) { + eprintf("Cannot setup simplefb: Error reserving memory\n"); + return ret; + } + ret = fdt_setup_simplefb_node(blob, offset, gd->fb_base, graphic_device->winSizeX, graphic_device->winSizeY, graphic_device->winSizeX * graphic_device->gdfBytesPP, diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index cea52dbf7b..33c06146c6 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -210,10 +210,10 @@ #ifdef CONFIG_VIDEO /* - * The amount of RAM that is reserved for the FB. This will not show up as - * RAM to the kernel, but will be reclaimed by a KMS driver in future. + * The amount of RAM to keep free at the top of RAM when relocating u-boot, + * to use as framebuffer. This must be a multiple of 4096. */ -#define CONFIG_SUNXI_FB_SIZE (9 << 20) +#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) /* Do we want to initialize a simple FB? */ #define CONFIG_VIDEO_DT_SIMPLEFB @@ -231,8 +231,6 @@ /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ #define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_MEM_TOP_HIDE ((CONFIG_SUNXI_FB_SIZE + 0xFFF) & ~0xFFF) - /* To be able to hook simplefb into dt */ #ifdef CONFIG_VIDEO_DT_SIMPLEFB #define CONFIG_OF_BOARD_SETUP From 20779ec3a5d7b3cad4fdc960d9e2e898fab259b3 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 2 Feb 2015 18:00:53 +0100 Subject: [PATCH 093/222] sunxi: video: Dynamically reserve framebuffer memory Only use CONFIG_SUNXI_MAX_FB_SIZE to reserve memory at the top when relocating u-boot, and calculate the actual amount of memory necessary when setting up the video-mode and use only that, freeing up some additional memory for use by the kernel. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- drivers/video/sunxi_display.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index cd5963a751..dbda97e746 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -46,6 +46,7 @@ struct sunxi_display { GraphicDevice graphic_device; enum sunxi_monitor monitor; unsigned int depth; + unsigned int fb_size; } sunxi_display; #ifdef CONFIG_VIDEO_HDMI @@ -1080,10 +1081,6 @@ void *video_hw_init(void) memset(&sunxi_display, 0, sizeof(struct sunxi_display)); - printf("Reserved %dkB of RAM for Framebuffer.\n", - CONFIG_SUNXI_MAX_FB_SIZE >> 10); - gd->fb_base = gd->ram_top; - video_get_ctfb_res_modes(RES_MODE_1024x768, 24, &mode, &sunxi_display.depth, &options); #ifdef CONFIG_VIDEO_HDMI @@ -1174,6 +1171,17 @@ void *video_hw_init(void) mode->yres, sunxi_get_mon_desc(sunxi_display.monitor)); } + sunxi_display.fb_size = + (mode->xres * mode->yres * 4 + 0xfff) & ~0xfff; + if (sunxi_display.fb_size > CONFIG_SUNXI_MAX_FB_SIZE) { + printf("Error need %dkB for fb, but only %dkB is reserved\n", + sunxi_display.fb_size >> 10, + CONFIG_SUNXI_MAX_FB_SIZE >> 10); + return NULL; + } + + gd->fb_base = gd->bd->bi_dram[0].start + + gd->bd->bi_dram[0].size - sunxi_display.fb_size; sunxi_engines_init(); sunxi_mode_set(mode, gd->fb_base - CONFIG_SYS_SDRAM_BASE); @@ -1250,7 +1258,7 @@ int sunxi_simplefb_setup(void *blob) * linux/arch/arm/mm/ioremap.c around line 301. */ start = gd->bd->bi_dram[0].start; - size = gd->bd->bi_dram[0].size - CONFIG_SUNXI_MAX_FB_SIZE; + size = gd->bd->bi_dram[0].size - sunxi_display.fb_size; ret = fdt_fixup_memory_banks(blob, &start, &size, 1); if (ret) { eprintf("Cannot setup simplefb: Error reserving memory\n"); From 51637afe98ba1745976382f64afc270f7f0b6974 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 4 Feb 2015 12:14:56 +0100 Subject: [PATCH 094/222] sunxi: dram: Un-inline dram helper functions Move the dram helper functions to a separate C file, rather then having them as inline helpers in dram.h. This saves 144 bytes in the .text segment for sun6i builds. Signed-off-by: Hans de Goede Reviewed-by: Simon Glass --- arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/dram_helpers.c | 37 +++++++++++++++++++++++++ arch/arm/include/asm/arch-sunxi/dram.h | 28 ++----------------- 3 files changed, 40 insertions(+), 26 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/dram_helpers.c diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 48db7442f4..a790a2392f 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -11,6 +11,7 @@ obj-y += timer.o obj-y += board.o obj-y += clock.o obj-y += cpu_info.o +obj-y += dram_helpers.o obj-y += pinmux.o obj-y += usbc.o obj-$(CONFIG_MACH_SUN6I) += prcm.o diff --git a/arch/arm/cpu/armv7/sunxi/dram_helpers.c b/arch/arm/cpu/armv7/sunxi/dram_helpers.c new file mode 100644 index 0000000000..9a94e1b679 --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/dram_helpers.c @@ -0,0 +1,37 @@ +/* + * DRAM init helper functions + * + * (C) Copyright 2015 Hans de Goede + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +/* + * Wait up to 1s for value to be set in given part of reg. + */ +void mctl_await_completion(u32 *reg, u32 mask, u32 val) +{ + unsigned long tmo = timer_get_us() + 1000000; + + while ((readl(reg) & mask) != val) { + if (timer_get_us() > tmo) + panic("Timeout initialising DRAM\n"); + } +} + +/* + * Test if memory at offset offset matches memory at begin of DRAM + */ +bool mctl_mem_matches(u32 offset) +{ + /* Try to write different values to RAM at two addresses */ + writel(0, CONFIG_SYS_SDRAM_BASE); + writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset); + /* Check if the same value is actually observed when reading back */ + return readl(CONFIG_SYS_SDRAM_BASE) == + readl(CONFIG_SYS_SDRAM_BASE + offset); +} diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index 7ff43e6d3a..aedd1941d5 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -25,31 +25,7 @@ #endif unsigned long sunxi_dram_init(void); - -/* - * Wait up to 1s for value to be set in given part of reg. - */ -static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val) -{ - unsigned long tmo = timer_get_us() + 1000000; - - while ((readl(reg) & mask) != val) { - if (timer_get_us() > tmo) - panic("Timeout initialising DRAM\n"); - } -} - -/* - * Test if memory at offset offset matches memory at begin of DRAM - */ -static inline bool mctl_mem_matches(u32 offset) -{ - /* Try to write different values to RAM at two addresses */ - writel(0, CONFIG_SYS_SDRAM_BASE); - writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset); - /* Check if the same value is actually observed when reading back */ - return readl(CONFIG_SYS_SDRAM_BASE) == - readl(CONFIG_SYS_SDRAM_BASE + offset); -} +void mctl_await_completion(u32 *reg, u32 mask, u32 val); +bool mctl_mem_matches(u32 offset); #endif /* _SUNXI_DRAM_H */ From b1b912ddf3041627e99899cfc09e015a54f9910e Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 11 Feb 2015 09:05:18 +0100 Subject: [PATCH 095/222] sunxi: otg: Fix peripheral mode Peripheral mode needs us to signal vusb high to the phy for it to work, just like the host mode does. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- drivers/usb/musb-new/sunxi.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 778916df00..4646a3d9fe 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -145,16 +145,6 @@ static void USBC_ForceIdToHigh(__iomem void *base) musb_writel(base, USBC_REG_o_ISCR, reg_val); } -static void USBC_ForceVbusValidDisable(__iomem void *base) -{ - u32 reg_val; - - reg_val = musb_readl(base, USBC_REG_o_ISCR); - reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID); - reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); - musb_writel(base, USBC_REG_o_ISCR, reg_val); -} - static void USBC_ForceVbusValidToHigh(__iomem void *base) { u32 reg_val; @@ -248,12 +238,11 @@ static int sunxi_musb_init(struct musb *musb) if (is_host_enabled(musb)) { /* Host mode */ USBC_ForceIdToLow(musb->mregs); - USBC_ForceVbusValidToHigh(musb->mregs); } else { /* Peripheral mode */ USBC_ForceIdToHigh(musb->mregs); - USBC_ForceVbusValidDisable(musb->mregs); } + USBC_ForceVbusValidToHigh(musb->mregs); return 0; } From c924e2a8036f43f2f4a8e829ecfc8e9d6e8cce63 Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Sun, 8 Feb 2015 07:05:27 +0200 Subject: [PATCH 096/222] tools: mksunxiboot: Fix problems on big endian systems Now my PS3 can be also used to build u-boot for sunxi devices. Signed-off-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- tools/mksunxiboot.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c index 1f0fbae8e1..0035f6ea26 100644 --- a/tools/mksunxiboot.c +++ b/tools/mksunxiboot.c @@ -43,19 +43,19 @@ int gen_check_sum(struct boot_file_head *head_p) uint32_t i; uint32_t sum; - length = head_p->length; + length = le32_to_cpu(head_p->length); if ((length & 0x3) != 0) /* must 4-byte-aligned */ return -1; buf = (uint32_t *)head_p; - head_p->check_sum = STAMP_VALUE; /* fill stamp */ + head_p->check_sum = cpu_to_le32(STAMP_VALUE); /* fill stamp */ loop = length >> 2; /* calculate the sum */ for (i = 0, sum = 0; i < loop; i++) - sum += buf[i]; + sum += le32_to_cpu(buf[i]); /* write back check sum */ - head_p->check_sum = sum; + head_p->check_sum = cpu_to_le32(sum); return 0; } @@ -125,10 +125,12 @@ int main(int argc, char *argv[]) memcpy(img.header.magic, BOOT0_MAGIC, 8); /* no '0' termination */ img.header.length = ALIGN(file_size + sizeof(struct boot_file_head), BLOCK_SIZE); + img.header.b_instruction = cpu_to_le32(img.header.b_instruction); + img.header.length = cpu_to_le32(img.header.length); gen_check_sum(&img.header); - count = write(fd_out, &img, img.header.length); - if (count != img.header.length) { + count = write(fd_out, &img, le32_to_cpu(img.header.length)); + if (count != le32_to_cpu(img.header.length)) { perror("Writing output"); return EXIT_FAILURE; } From e11c6c279d823dc0d2f470c5c2e3c0a9854a640f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 10:47:28 -0700 Subject: [PATCH 097/222] arm: Allow lr to be saved by board code The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link. This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything. Signed-off-by: Simon Glass Acked-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/exynos/spl_boot.c | 1 - arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/start.S | 7 +++++-- arch/arm/include/asm/system.h | 15 +++++++++++++++ board/nokia/rx51/lowlevel_init.S | 3 ++- 6 files changed, 24 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c b/arch/arm/cpu/armv7/exynos/spl_boot.c index bc237c969f..c7f943eb6a 100644 --- a/arch/arm/cpu/armv7/exynos/spl_boot.c +++ b/arch/arm/cpu/armv7/exynos/spl_boot.c @@ -309,4 +309,3 @@ void board_init_r(gd_t *id, ulong dest_addr) while (1) ; } -void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {} diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S index 86c0e42174..e19c7aecec 100644 --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S @@ -19,7 +19,7 @@ ENTRY(save_boot_params) ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS str r0, [r1] - bx lr + b save_boot_params_ret ENDPROC(save_boot_params) ENTRY(set_pl310_ctrl_reg) diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 78577b1d1c..80cb2639f6 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -23,7 +23,7 @@ ENTRY(save_boot_params) ldr r5, [r0, #0x4] and r5, r5, #0xff str r5, [r4] - bx lr + b save_boot_params_ret ENDPROC(save_boot_params) #endif diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 70048c10ae..9b49ece2d6 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -31,9 +31,12 @@ *************************************************************************/ .globl reset + .globl save_boot_params_ret reset: - bl save_boot_params + /* Allow the board to save important registers */ + b save_boot_params +save_boot_params_ret: /* * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode, * except if in HYP mode already @@ -96,7 +99,7 @@ ENDPROC(c_runtime_cpu_setup) * *************************************************************************/ ENTRY(save_boot_params) - bx lr @ back to my caller + b save_boot_params_ret @ back to my caller ENDPROC(save_boot_params) .weak save_boot_params diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 89f2294689..7820486df0 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -142,6 +142,21 @@ void flush_l3_cache(void); #ifndef __ASSEMBLY__ +/** + * save_boot_params() - Save boot parameters before starting reset sequence + * + * If you provide this function it will be called immediately U-Boot starts, + * both for SPL and U-Boot proper. + * + * All registers are unchanged from U-Boot entry. No registers need be + * preserved. + * + * This is not a normal C function. There is no stack. Return by branching to + * save_boot_params_ret. + * + * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3); + */ + #define isb() __asm__ __volatile__ ("" : : : "memory") #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S index e25290966c..9d4ea1b3f9 100644 --- a/board/nokia/rx51/lowlevel_init.S +++ b/board/nokia/rx51/lowlevel_init.S @@ -37,7 +37,8 @@ ih_magic: /* IH_MAGIC in big endian from include/image.h */ .global save_boot_params save_boot_params: - + /* Get return address */ + ldr lr, =save_boot_params_ret /* Copy valid attached kernel to address KERNEL_ADDRESS */ From c01c71bc16d2836c3ff81af54529dab0686bca00 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 10:47:29 -0700 Subject: [PATCH 098/222] arm: spl: Provide for a board-specific loader Some boards have a special way of loading U-Boot that does not fit with the existing SPL code. For example sunxi uses an 'FEL' mode where U-Boot is loaded over USB. Add a CONFIG option and boot mode for this. Signed-off-by: Simon Glass Acked-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/include/asm/spl.h | 4 ++++ common/spl/spl.c | 5 +++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index 8acd7cd1bd..17b6f544da 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -26,10 +26,14 @@ enum { BOOT_DEVICE_SPI, BOOT_DEVICE_SATA, BOOT_DEVICE_I2C, + BOOT_DEVICE_BOARD, BOOT_DEVICE_NONE }; #endif +/* Board-specific load method */ +void spl_board_load_image(void); + /* Linker symbols. */ extern char __bss_start[], __bss_end[]; diff --git a/common/spl/spl.c b/common/spl/spl.c index daaeb507c4..ded0f30478 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -228,6 +228,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2) case BOOT_DEVICE_SATA: spl_sata_load_image(); break; +#endif +#ifdef CONFIG_SPL_BOARD_LOAD_IMAGE + case BOOT_DEVICE_BOARD: + spl_board_load_image(); + break; #endif default: #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT) From 942cb0b6a29f74507adeb0bce7ff7f23f69faf84 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 7 Feb 2015 10:47:30 -0700 Subject: [PATCH 099/222] sunxi: Normalise FEL support Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/start.S | 5 +- arch/arm/cpu/armv7/sunxi/Makefile | 4 +- arch/arm/cpu/armv7/sunxi/board.c | 21 ++++++ arch/arm/cpu/armv7/sunxi/config.mk | 2 - arch/arm/cpu/armv7/sunxi/fel_utils.S | 25 +++++++ arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds | 82 --------------------- arch/arm/include/asm/arch-sunxi/sys_proto.h | 10 +++ board/sunxi/Kconfig | 10 +++ include/configs/sunxi-common.h | 6 +- scripts/Makefile.spl | 2 - 10 files changed, 73 insertions(+), 94 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/fel_utils.S delete mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 9b49ece2d6..098a83ab71 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -54,7 +54,8 @@ save_boot_params_ret: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. * Continue to use ROM code vector only in OMAP4 spl) */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) && \ + !defined(CONFIG_SPL_FEL) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register bic r0, #CR_V @ V = 0 @@ -67,7 +68,9 @@ save_boot_params_ret: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT +#ifndef CONFIG_SPL_FEL bl cpu_init_cp15 +#endif bl cpu_init_crit #endif diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index a790a2392f..4bb12ad8bd 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -39,7 +39,5 @@ obj-$(CONFIG_MACH_SUN5I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN6I) += dram_sun6i.o obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN8I) += dram_sun8i.o -ifdef CONFIG_SPL_FEL -obj-y += start.o -endif +obj-y += fel_utils.o endif diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 6e28bcd040..b7492ac1fe 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -27,6 +27,13 @@ #include +struct fel_stash { + uint32_t sp; + uint32_t lr; +}; + +struct fel_stash fel_stash __attribute__((section(".data"))); + static int gpio_init(void) { #if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F) @@ -65,6 +72,12 @@ static int gpio_init(void) return 0; } +void spl_board_load_image(void) +{ + debug("Returning to FEL sp=%x, lr=%x\n", fel_stash.sp, fel_stash.lr); + return_to_fel(fel_stash.sp, fel_stash.lr); +} + void s_init(void) { #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I @@ -95,6 +108,14 @@ void s_init(void) */ u32 spl_boot_device(void) { + /* + * Have we been asked to return to the FEL portion of the boot ROM? + * TODO: We need a more robust test here, or bracket this with + * #ifdef CONFIG_SPL_FEL. + */ + if (fel_stash.lr >= 0xffff0000 && fel_stash.lr < 0xffff4000) + return BOOT_DEVICE_BOARD; + return BOOT_DEVICE_MMC1; } diff --git a/arch/arm/cpu/armv7/sunxi/config.mk b/arch/arm/cpu/armv7/sunxi/config.mk index 00f5ffc683..76ffec9df6 100644 --- a/arch/arm/cpu/armv7/sunxi/config.mk +++ b/arch/arm/cpu/armv7/sunxi/config.mk @@ -1,8 +1,6 @@ # Build a combined spl + u-boot image ifdef CONFIG_SPL ifndef CONFIG_SPL_BUILD -ifndef CONFIG_SPL_FEL ALL-y += u-boot-sunxi-with-spl.bin endif endif -endif diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S new file mode 100644 index 0000000000..0c1de52df8 --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S @@ -0,0 +1,25 @@ +/* + * Utility functions for FEL mode. + * + * Copyright (c) 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +ENTRY(save_boot_params) + ldr r0, =fel_stash + str sp, [r0, #0] + str lr, [r0, #4] + b save_boot_params_ret +ENDPROC(save_boot_params) + +ENTRY(return_to_fel) + mov sp, r0 + mov lr, r1 + bx lr +ENDPROC(return_to_fel) diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds deleted file mode 100644 index 928b7c19e0..0000000000 --- a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2013 - * Henrik Nordstrom - * - * SPDX-License-Identifier: GPL-2.0+ - */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(s_init) -SECTIONS -{ - . = 0x00002000; - - . = ALIGN(4); - .text : - { - *(.text.s_init) - *(.text*) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { - *(.data*) - } - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = ALIGN(4); - . = .; - - . = ALIGN(4); - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } - - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - - . = ALIGN(4); - .note.gnu.build-id : - { - *(.note.gnu.build-id) - } - _end = .; - - . = ALIGN(4096); - .mmutable : { - *(.mmutable) - } - - .bss_start __rel_dyn_start (OVERLAY) : { - KEEP(*(.__bss_start)); - __bss_base = .; - } - - .bss __bss_base (OVERLAY) : { - *(.bss*) - . = ALIGN(4); - __bss_limit = .; - } - - .bss_end __bss_limit (OVERLAY) : { - KEEP(*(.__bss_end)); - } - - /DISCARD/ : { *(.dynstr*) } - /DISCARD/ : { *(.dynamic*) } - /DISCARD/ : { *(.plt*) } - /DISCARD/ : { *(.interp*) } - /DISCARD/ : { *(.gnu*) } - /DISCARD/ : { *(.note*) } -} diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h index c3e636e1d9..60a5bd8c85 100644 --- a/arch/arm/include/asm/arch-sunxi/sys_proto.h +++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h @@ -13,4 +13,14 @@ void sdelay(unsigned long); +/* return_to_fel() - Return to BROM from SPL + * + * This returns back into the BROM after U-Boot SPL has performed its initial + * init. It uses the provided lr and sp to do so. + * + * @lr: BROM link register value (return address) + * @sp: BROM stack pointer + */ +void return_to_fel(uint32_t lr, uint32_t sp); + #endif diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 4a2158988f..3eab81fd12 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -149,6 +149,16 @@ config SPL_FEL bool "SPL/FEL mode support" depends on SPL default n + help + This enables support for Fast Early Loader (FEL) mode. This + allows U-Boot to be loaded to the board over USB by the on-chip + boot rom. U-Boot should be sent in two parts: SPL first, with + 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with + 'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option + shrinks the amount of SRAM available to SPL, so only enable it if + you need FEL. Note that enabling this option only allows FEL to be + used; it is still possible to boot U-Boot from boot media. U-Boot + SPL detects when it is being loaded using FEL. config UART0_PORT_F bool "UART0 on MicroSD breakout board" diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 33c06146c6..5ece0202a6 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -18,10 +18,8 @@ */ #define CONFIG_SUNXI /* sunxi family */ #ifdef CONFIG_SPL_BUILD -#ifndef CONFIG_SPL_FEL #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ #endif -#endif #include /* get chip and board defs */ @@ -149,10 +147,10 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_BOARD_LOAD_IMAGE + #ifdef CONFIG_SPL_FEL -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" -#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" #define CONFIG_SPL_TEXT_BASE 0x2000 #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index e4b9881186..cc189adc0c 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -154,10 +154,8 @@ ALL-y += $(obj)/$(BOARD)-spl.bin endif ifdef CONFIG_SUNXI -ifndef CONFIG_SPL_FEL ALL-y += $(obj)/sunxi-spl.bin endif -endif ifeq ($(CONFIG_SYS_SOC),"at91") ALL-y += boot.bin From 840fe95c3bcff7692c51b90ebc0d350792597ff0 Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Mon, 16 Feb 2015 10:23:59 +0200 Subject: [PATCH 100/222] sunxi: Support the FEL boot mode in the regular u-boot build So that the CONFIG_SPL_FEL option is not needed anymore. And the regular SPL binary, generated by the default u-boot build, is now also bootable over USB in the FEL mode. The SPL still can boot from the SD card too. A bunch of system registers need to be saved/restored in order to ensure that the IRQ handler still works in the BROM FEL code after getting control back from the SPL. This is done in the sunxi code instead of abusing ifdefs in 'start.S'. The decision whether to load the main u-boot binary from the SD card or return to the FEL code in the BROM is done at runtime. Signed-off-by: Siarhei Siamashka [hdegoede@redhat.com: Since we now restore various regs before returning to the FEL BROM code we can drop the sunxi specific #ifdefs in start.S] Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/start.S | 5 +--- arch/arm/cpu/armv7/sunxi/board.c | 35 +++++++++++++++++++++++----- arch/arm/cpu/armv7/sunxi/fel_utils.S | 17 ++++++++++++++ 3 files changed, 47 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 098a83ab71..9b49ece2d6 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -54,8 +54,7 @@ save_boot_params_ret: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. * Continue to use ROM code vector only in OMAP4 spl) */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) && \ - !defined(CONFIG_SPL_FEL) +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register bic r0, #CR_V @ V = 0 @@ -68,9 +67,7 @@ save_boot_params_ret: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT -#ifndef CONFIG_SPL_FEL bl cpu_init_cp15 -#endif bl cpu_init_crit #endif diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index b7492ac1fe..c02c015096 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -30,6 +30,10 @@ struct fel_stash { uint32_t sp; uint32_t lr; + uint32_t cpsr; + uint32_t sctlr; + uint32_t vbar; + uint32_t cr; }; struct fel_stash fel_stash __attribute__((section(".data"))); @@ -108,15 +112,34 @@ void s_init(void) */ u32 spl_boot_device(void) { +#ifdef CONFIG_SPL_FEL /* - * Have we been asked to return to the FEL portion of the boot ROM? - * TODO: We need a more robust test here, or bracket this with - * #ifdef CONFIG_SPL_FEL. + * This is the legacy compile time configuration for a special FEL + * enabled build. It has many restrictions and can only boot over USB. */ - if (fel_stash.lr >= 0xffff0000 && fel_stash.lr < 0xffff4000) + return BOOT_DEVICE_BOARD; +#else + /* + * When booting from the SD card, the "eGON.BT0" signature is expected + * to be found in memory at the address 0x0004 (see the "mksunxiboot" + * tool, which generates this header). + * + * When booting in the FEL mode over USB, this signature is patched in + * memory and replaced with something else by the 'fel' tool. This other + * signature is selected in such a way, that it can't be present in a + * valid bootable SD card image (because the BROM would refuse to + * execute the SPL in this case). + * + * This branch is just making a decision at runtime whether to load + * the main u-boot binary from the SD card (if the "eGON.BT0" signature + * is found) or return to the FEL code in the BROM to wait and receive + * the main u-boot binary over USB. + */ + if (readl(4) == 0x4E4F4765 && readl(8) == 0x3054422E) /* eGON.BT0 */ + return BOOT_DEVICE_MMC1; + else return BOOT_DEVICE_BOARD; - - return BOOT_DEVICE_MMC1; +#endif } /* No confirmation data available in SPL yet. Hardcode bootmode */ diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S index 0c1de52df8..bf0033552d 100644 --- a/arch/arm/cpu/armv7/sunxi/fel_utils.S +++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S @@ -15,11 +15,28 @@ ENTRY(save_boot_params) ldr r0, =fel_stash str sp, [r0, #0] str lr, [r0, #4] + mrs lr, cpsr @ Read CPSR + str lr, [r0, #8] + mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register + str lr, [r0, #12] + mrc p15, 0, lr, c12, c0, 0 @ Read VBAR + str lr, [r0, #16] + mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register + str lr, [r0, #20] b save_boot_params_ret ENDPROC(save_boot_params) ENTRY(return_to_fel) mov sp, r0 mov lr, r1 + ldr r0, =fel_stash + ldr r1, [r0, #20] + mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register + ldr r1, [r0, #16] + mcr p15, 0, r1, c12, c0, 0 @ Write VBAR + ldr r1, [r0, #12] + mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register + ldr r1, [r0, #8] + msr cpsr, r1 @ Write CPSR bx lr ENDPROC(return_to_fel) From 6eefd5279c4e80d613420066364ec3c8ba551a56 Mon Sep 17 00:00:00 2001 From: David Feng Date: Mon, 2 Feb 2015 16:53:13 +0800 Subject: [PATCH 101/222] PCI: add 64-bit prefetchable memory support PCI specification allow prefetchable memory to be 32-bit or 64-bit. PCI express specification states that all memmory bars for prefetchable memory must be implemented as 64-bit. They all require that 64 bit prefetchble memory are suported especially when u-boot is ported to more and more 64bit processors. Signed-off-by: David Feng Reviewed-by: Bin Meng --- drivers/pci/pci_auto.c | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index ed92857406..378efbfd9f 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -223,9 +223,12 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, struct pci_region *pci_mem = hose->pci_mem; struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io; - u16 cmdstat; + u16 cmdstat, prefechable_64; pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); + pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE, + &prefechable_64); + prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK; /* Configure bus number registers */ pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, @@ -252,12 +255,26 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, /* Set up memory and I/O filter limits, assume 32-bit I/O space */ pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, (pci_prefetch->bus_lower & 0xfff00000) >> 16); + if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) +#ifdef CONFIG_SYS_PCI_64BIT + pci_hose_write_config_dword(hose, dev, + PCI_PREF_BASE_UPPER32, + pci_prefetch->bus_lower >> 32); +#else + pci_hose_write_config_dword(hose, dev, + PCI_PREF_BASE_UPPER32, + 0x0); +#endif cmdstat |= PCI_COMMAND_MEMORY; } else { /* We don't support prefetchable memory for now, so disable */ pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000); pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x0); + if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) { + pci_hose_write_config_word(hose, dev, PCI_PREF_BASE_UPPER32, 0x0); + pci_hose_write_config_word(hose, dev, PCI_PREF_LIMIT_UPPER32, 0x0); + } } if (pci_io) { @@ -297,11 +314,28 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose, } if (pci_prefetch) { + u16 prefechable_64; + + pci_hose_read_config_word(hose, dev, + PCI_PREF_MEMORY_LIMIT, + &prefechable_64); + prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK; + /* Round memory allocator to 1MB boundary */ pciauto_region_align(pci_prefetch, 0x100000); pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, (pci_prefetch->bus_lower - 1) >> 16); + if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) +#ifdef CONFIG_SYS_PCI_64BIT + pci_hose_write_config_dword(hose, dev, + PCI_PREF_LIMIT_UPPER32, + (pci_prefetch->bus_lower - 1) >> 32); +#else + pci_hose_write_config_dword(hose, dev, + PCI_PREF_LIMIT_UPPER32, + 0x0); +#endif } if (pci_io) { From 30d06bd2fd70c2e940324f88d06aaeb2a7b61efe Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Tue, 3 Feb 2015 10:34:10 +0100 Subject: [PATCH 102/222] .travis.yml: remove 824x builds remove powerpc 824x build, as this architecture not longer exists. Signed-off-by: Heiko Schocher --- .travis.yml | 3 --- 1 file changed, 3 deletions(-) diff --git a/.travis.yml b/.travis.yml index 90f0fd7615..923c9ddc3e 100644 --- a/.travis.yml +++ b/.travis.yml @@ -106,9 +106,6 @@ matrix: - env: - TEST_CMD="tools/buildman/buildman mpc512x" INSTALL_TOOLCHAIN="ppc" - - env: - - TEST_CMD="tools/buildman/buildman mpc824x" - INSTALL_TOOLCHAIN="ppc" - env: - TEST_CMD="tools/buildman/buildman mpc8260" INSTALL_TOOLCHAIN="ppc" From b9ea0c3a2076c3ef8c150d35aa31f2329ad9efef Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 6 Feb 2015 09:31:36 +0100 Subject: [PATCH 103/222] spl, spl_nor: fix compiler warning executing "tools/buildman/buildman mpc5xx" drops this warning: common/spl/spl_nor.c: In function 'spl_nor_load_image': common/spl/spl_nor.c:26:10: warning: assignment discards 'const' qualifier from pointer target type [enabled by default] fix this. Signed-off-by: Heiko Schocher --- common/spl/spl_nor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index 2c0e8e00dd..c2fee01ac1 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -17,7 +17,7 @@ void spl_nor_load_image(void) #ifdef CONFIG_SPL_OS_BOOT if (!spl_start_uboot()) { - struct image_header *header; + const struct image_header *header; /* * Load Linux from its location in NOR flash to its defined From 16ac90c7ee6fe973ee86fa9b08f876e5c33751bc Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Tue, 10 Feb 2015 17:10:13 +0100 Subject: [PATCH 104/222] KM/IVM: split the IVM reading and parsing in 2 parts This allows to first read the IVM content (earlier in the boot sequence) and define the ethaddr env variable thanks to the ivm_read_eepromi(). Later, the IVM content can be parsed and used to define some hush variables, when the hush subsystem is available thanks to ivm_analyze_eeprom(). To avoid the HW read to happen twice, the buffer passed to ivm_read_eeprom() has to be reused by ivm_analyze_eeprom (and thus allocated before calling ivm_read_eeprom()). Signed-off-by: Valentin Longchamp --- board/keymile/common/common.h | 2 + board/keymile/common/ivm.c | 86 +++++++++++++++++++++++++---------- 2 files changed, 63 insertions(+), 25 deletions(-) diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h index e075f4687b..7e16d2570b 100644 --- a/board/keymile/common/common.h +++ b/board/keymile/common/common.h @@ -127,6 +127,8 @@ struct bfticu_iomap { int ethernet_present(void); int ivm_read_eeprom(void); +int ivm_simple_read_eeprom(unsigned char *buf, int len); +int ivm_analyze_eeprom(unsigned char *buf, int len); int trigger_fpga_config(void); int wait_for_fpga_config(void); diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index b6b19ccb8e..9abc09abc6 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -10,6 +10,8 @@ #include #include "common.h" +#define MAC_STR_SZ 20 + static int ivm_calc_crc(unsigned char *buf, int len) { const unsigned short crc_tab[16] = { @@ -185,45 +187,37 @@ static int ivm_check_crc(unsigned char *buf, int block) return 0; } -static int calculate_mac_offset(unsigned char *valbuf, unsigned char *buf, +/* take care of the possible MAC address offset and the IVM content offset */ +static int process_mac(unsigned char *valbuf, unsigned char *buf, int offset) { + unsigned char mac[6]; unsigned long val = (buf[4] << 16) + (buf[5] << 8) + buf[6]; - if (offset == 0) - return 0; + /* use an intermediate buffer, to not change IVM content + * MAC address is at offset 1 + */ + memcpy(mac, buf+1, 6); - val += offset; - buf[4] = (val >> 16) & 0xff; - buf[5] = (val >> 8) & 0xff; - buf[6] = val & 0xff; - sprintf((char *)valbuf, "%pM", buf + 1); + if (offset) { + val += offset; + mac[3] = (val >> 16) & 0xff; + mac[4] = (val >> 8) & 0xff; + mac[5] = val & 0xff; + } + + sprintf((char *)valbuf, "%pM", mac); return 0; } static int ivm_analyze_block2(unsigned char *buf, int len) { - unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; + unsigned char valbuf[MAC_STR_SZ]; unsigned long count; /* IVM_MAC Adress begins at offset 1 */ sprintf((char *)valbuf, "%pM", buf + 1); ivm_set_value("IVM_MacAddress", (char *)valbuf); - /* if an offset is defined, add it */ - calculate_mac_offset(buf, valbuf, CONFIG_PIGGY_MAC_ADRESS_OFFSET); -#ifdef MACH_TYPE_KM_KIRKWOOD - setenv((char *)"ethaddr", (char *)valbuf); -#else - if (getenv("ethaddr") == NULL) - setenv((char *)"ethaddr", (char *)valbuf); -#endif -#ifdef CONFIG_KMVECT1 -/* KMVECT1 has two ethernet interfaces */ - if (getenv("eth1addr") == NULL) { - calculate_mac_offset(buf, valbuf, 1); - setenv((char *)"eth1addr", (char *)valbuf); - } -#endif /* IVM_MacCount */ count = (buf[10] << 24) + (buf[11] << 16) + @@ -236,7 +230,7 @@ static int ivm_analyze_block2(unsigned char *buf, int len) return 0; } -static int ivm_analyze_eeprom(unsigned char *buf, int len) +int ivm_analyze_eeprom(unsigned char *buf, int len) { unsigned short val; unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; @@ -296,6 +290,48 @@ static int ivm_analyze_eeprom(unsigned char *buf, int len) return 0; } +static int ivm_populate_env(unsigned char *buf, int len) +{ + unsigned char *page2; + unsigned char valbuf[MAC_STR_SZ]; + + /* do we have the page 2 filled ? if not return */ + if (ivm_check_crc(buf, 2)) + return 0; + page2 = &buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN*2]; + + /* if an offset is defined, add it */ + process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET); + if (getenv("ethaddr") == NULL) + setenv((char *)"ethaddr", (char *)valbuf); +#ifdef CONFIG_KMVECT1 +/* KMVECT1 has two ethernet interfaces */ + if (getenv("eth1addr") == NULL) { + process_mac(valbuf, page2, 1); + setenv((char *)"eth1addr", (char *)valbuf); + } +#endif + + return 0; +} + +int ivm_simple_read_eeprom(unsigned char *buf, int len) +{ + int ret; + + i2c_set_bus_num(CONFIG_KM_IVM_BUS); + /* add deblocking here */ + i2c_make_abort(); + + ret = i2c_read(CONFIG_SYS_IVM_EEPROM_ADR, 0, 1, buf, len); + if (ret != 0) { + printf("Error reading EEprom\n"); + return -2; + } + + return ivm_populate_env(buf, len); +} + int ivm_read_eeprom(void) { uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; From 0bb95a68fc92bce3cc044ae3c006f6e33431617d Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Tue, 10 Feb 2015 17:10:14 +0100 Subject: [PATCH 105/222] kirkwood/km_arm: read the IVM eeprom earlier This allows to define the ethaddr env variable according to the the IVM content by reading the IVM in misc_init_r. Later, when HUSH is available the content read earlier is analyzed to populate some non env variables. Signed-off-by: Valentin Longchamp --- board/keymile/km_arm/km_arm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 1c7c108cb5..6eb6712b39 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -102,6 +102,8 @@ static const u32 kwmpp_config[] = { 0 }; +static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; + #if defined(CONFIG_KM_MGCOGE3UN) /* * Wait for startup OK from mgcoge3ne @@ -210,6 +212,8 @@ int misc_init_r(void) } #endif + ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + initialize_unit_leds(); set_km_env(); set_bootcount_addr(); @@ -419,7 +423,7 @@ void reset_phy(void) #if defined(CONFIG_HUSH_INIT_VAR) int hush_init_var(void) { - ivm_read_eeprom(); + ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } #endif From 0fdb6eadff19da604ea8907140421ec07b8bcc19 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Tue, 10 Feb 2015 17:10:15 +0100 Subject: [PATCH 106/222] 85xx/kmp204x: read the IVM eeprom earlier This allows to define the ethaddr env variable according to the the IVM content by reading the IVM in misc_init_r. Later, when HUSH is available the content read earlier is analyzed to populate some non env variables. Signed-off-by: Valentin Longchamp --- board/keymile/kmp204x/kmp204x.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index a74f75bad4..0f544fb979 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -26,6 +26,8 @@ DECLARE_GLOBAL_DATA_PTR; +static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; + int checkboard(void) { printf("Board: Keymile %s\n", CONFIG_KM_BOARD_NAME); @@ -195,13 +197,14 @@ int misc_init_r(void) } } + ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } #if defined(CONFIG_HUSH_INIT_VAR) int hush_init_var(void) { - ivm_read_eeprom(); + ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } #endif From f32b3d3fcec10dfc6a6848f8cc6a9eab9407aabf Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Tue, 10 Feb 2015 17:10:16 +0100 Subject: [PATCH 107/222] 83xx/km83xx: read the IVM eeprom earlier This allows to define the ethaddr env variable according to the the IVM content by reading the IVM in misc_init_r. Later, when HUSH is available the content read earlier is analyzed to populate some non env variables. Signed-off-by: Valentin Longchamp --- board/keymile/km83xx/km83xx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 1da0dcb9d8..fc68a2f41f 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -28,6 +28,8 @@ #include "../common/common.h" +static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; + const qe_iop_conf_t qe_iop_conf_tab[] = { /* port pin dir open_drain assign */ #if defined(CONFIG_MPC8360) @@ -190,6 +192,7 @@ int board_early_init_r(void) int misc_init_r(void) { + ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } @@ -370,7 +373,7 @@ int ft_board_setup(void *blob, bd_t *bd) #if defined(CONFIG_HUSH_INIT_VAR) int hush_init_var(void) { - ivm_read_eeprom(); + ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } #endif From 2973b098baf6fcb49d9fb7a2ed187e6a65532175 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Tue, 10 Feb 2015 17:10:17 +0100 Subject: [PATCH 108/222] 82xx/km82xx: read the IVM eeprom earlier This allows to define the ethaddr env variable according to the the IVM content by reading the IVM in misc_init_r. Later, when HUSH is available the content read earlier is analyzed to populate some non env variables. Signed-off-by: Valentin Longchamp --- board/keymile/km82xx/km82xx.c | 10 +++++++++- include/configs/km82xx.h | 2 ++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index bf84676b9b..c3a113172c 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -18,6 +18,8 @@ #include #include "../common/common.h" +static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; + /* * I/O Port configuration table * @@ -393,9 +395,15 @@ int board_early_init_r(void) return 0; } +int misc_init_r(void) +{ + ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + return 0; +} + int hush_init_var(void) { - ivm_read_eeprom(); + ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } diff --git a/include/configs/km82xx.h b/include/configs/km82xx.h index 14fd290be1..12f9d424cb 100644 --- a/include/configs/km82xx.h +++ b/include/configs/km82xx.h @@ -34,6 +34,8 @@ #define CONFIG_SYS_TEXT_BASE 0xFE000000 +#define CONFIG_MISC_INIT_R + /* include common defines/options for all Keymile boards */ #include "km/keymile-common.h" #include "km/km-powerpc.h" From 60c4ae00be11f07a9b60f95e76538785062f873b Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Tue, 10 Feb 2015 17:10:18 +0100 Subject: [PATCH 109/222] KM/IVM: remove ivm_read_eeprom(void) This is not used anymore since the procedure was split into a simple read function and a later alaysis. The ivm_read_eeprom name is now used for the previous ivm_simple_read_eeprom function. Signed-off-by: Valentin Longchamp --- board/keymile/common/common.h | 3 +-- board/keymile/common/ivm.c | 21 +-------------------- board/keymile/km82xx/km82xx.c | 2 +- board/keymile/km83xx/km83xx.c | 2 +- board/keymile/km_arm/km_arm.c | 2 +- board/keymile/kmp204x/kmp204x.c | 2 +- 6 files changed, 6 insertions(+), 26 deletions(-) diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h index 7e16d2570b..dcfefc46b3 100644 --- a/board/keymile/common/common.h +++ b/board/keymile/common/common.h @@ -126,8 +126,7 @@ struct bfticu_iomap { #endif int ethernet_present(void); -int ivm_read_eeprom(void); -int ivm_simple_read_eeprom(unsigned char *buf, int len); +int ivm_read_eeprom(unsigned char *buf, int len); int ivm_analyze_eeprom(unsigned char *buf, int len); int trigger_fpga_config(void); diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 9abc09abc6..42db54221b 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -315,7 +315,7 @@ static int ivm_populate_env(unsigned char *buf, int len) return 0; } -int ivm_simple_read_eeprom(unsigned char *buf, int len) +int ivm_read_eeprom(unsigned char *buf, int len) { int ret; @@ -331,22 +331,3 @@ int ivm_simple_read_eeprom(unsigned char *buf, int len) return ivm_populate_env(buf, len); } - -int ivm_read_eeprom(void) -{ - uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; - int ret; - - i2c_set_bus_num(CONFIG_KM_IVM_BUS); - /* add deblocking here */ - i2c_make_abort(); - - ret = i2c_read(CONFIG_SYS_IVM_EEPROM_ADR, 0, 1, i2c_buffer, - CONFIG_SYS_IVM_EEPROM_MAX_LEN); - if (ret != 0) { - printf("Error reading EEprom\n"); - return -2; - } - - return ivm_analyze_eeprom(i2c_buffer, CONFIG_SYS_IVM_EEPROM_MAX_LEN); -} diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index c3a113172c..c599b40936 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -397,7 +397,7 @@ int board_early_init_r(void) int misc_init_r(void) { - ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index fc68a2f41f..89e9e1e57c 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -192,7 +192,7 @@ int board_early_init_r(void) int misc_init_r(void) { - ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 6eb6712b39..2938861f36 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -212,7 +212,7 @@ int misc_init_r(void) } #endif - ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); initialize_unit_leds(); set_km_env(); diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 0f544fb979..eebb47fc21 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -197,7 +197,7 @@ int misc_init_r(void) } } - ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); return 0; } From 0ce3f1f90ae6168805f20e473a9ed7fab5fb13a8 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 12 Feb 2015 00:24:20 +0200 Subject: [PATCH 110/222] ARM: lpc3250: config: add generic board support The only LPC3250 board works fine with enabled generic board support, add CONFIG_SYS_GENERIC_BOARD right into the arch config header. Signed-off-by: Vladimir Zapolskiy --- arch/arm/include/asm/arch-lpc32xx/config.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index 8f6426bc1b..564441cbfa 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -1,7 +1,7 @@ /* * Common definitions for LPC32XX board configurations * - * Copyright (C) 2011 Vladimir Zapolskiy + * Copyright (C) 2011-2015 Vladimir Zapolskiy * * SPDX-License-Identifier: GPL-2.0+ */ @@ -9,6 +9,8 @@ #ifndef _LPC32XX_CONFIG_H #define _LPC32XX_CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD + /* Basic CPU architecture */ #define CONFIG_ARCH_CPU_INIT From de19eddf6c196669222839b3f39a38d0315bdb3e Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Mon, 16 Feb 2015 05:59:09 +0100 Subject: [PATCH 111/222] add example for file on VFAT filesystem usage For example on a raspberry pi the u-boot environment can be saved in a file on the first VFAT partition. This example illustrates how to use it with fw_printenv/fw_setenv. Signed-off-by: Waldemar Brodkorb --- tools/env/fw_env.config | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/env/fw_env.config b/tools/env/fw_env.config index c9b9f6a160..6f216f9c64 100644 --- a/tools/env/fw_env.config +++ b/tools/env/fw_env.config @@ -20,3 +20,6 @@ # Block device example #/dev/mmcblk0 0xc0000 0x20000 + +# VFAT example +#/boot/uboot.env 0x0000 0x4000 From 5290ab876e18d87bd51e29520494abc6473806ec Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 16 Feb 2015 15:48:49 -0500 Subject: [PATCH 112/222] Revert "sunxi: configs/sunxi-common.h: Enable CONFIG_CMD_PART" This reverts commit bd2a4888b123713adec271d6c8040ca9f609aa2f which was an older version of af21f2f which is what we actually want in. Signed-off-by: Tom Rini --- include/configs/sunxi-common.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5e8885277f..1238d821b3 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -79,9 +79,6 @@ #define CONFIG_CMD_MEMORY #define CONFIG_CMD_SETEXPR -#define CONFIG_PARTITION_UUIDS -#define CONFIG_CMD_PART - #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG From 1e7b357a4ebf9a99a6258a0bbedf4e318a5263e0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 17 Feb 2015 11:07:19 -0500 Subject: [PATCH 113/222] Prepare v2015.04-rc2 Signed-off-by: Tom Rini --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 0538821b5c..bd4ababe00 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ VERSION = 2015 PATCHLEVEL = 04 SUBLEVEL = -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 NAME = # *DOCUMENTATION* From dbdb5abd070163f59901884c672b49c25b1aeea9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:39 +0100 Subject: [PATCH 114/222] avr32: use dlmalloc for DMA buffers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/include/asm/dma-mapping.h | 7 +++- arch/avr32/lib/board.c | 51 ---------------------------- include/configs/atngw100.h | 1 - include/configs/atngw100mkii.h | 1 - include/configs/atstk1002.h | 1 - include/configs/atstk1006.h | 1 - include/configs/favr-32-ezkit.h | 1 - include/configs/grasshopper.h | 1 - include/configs/hammerhead.h | 1 - include/configs/mimc200.h | 1 - 10 files changed, 6 insertions(+), 60 deletions(-) diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h index dbdd2fee38..1cde8275f4 100644 --- a/arch/avr32/include/asm/dma-mapping.h +++ b/arch/avr32/include/asm/dma-mapping.h @@ -14,7 +14,12 @@ enum dma_data_direction { DMA_TO_DEVICE = 1, DMA_FROM_DEVICE = 2, }; -extern void *dma_alloc_coherent(size_t len, unsigned long *handle); + +static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) +{ + *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len); + return (void *)*handle; +} static inline unsigned long dma_map_single(volatile void *vaddr, size_t len, enum dma_data_direction dir) diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index bf0997f98d..7d13ac534b 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -45,50 +45,6 @@ int cpu_mmc_init(bd_t *bd) return atmel_mci_init((void *)ATMEL_BASE_MMCI); } -#ifdef CONFIG_SYS_DMA_ALLOC_LEN -#include -#include - -static unsigned long dma_alloc_start; -static unsigned long dma_alloc_end; -static unsigned long dma_alloc_brk; - -static void dma_alloc_init(void) -{ - unsigned long monitor_addr; - - monitor_addr = CONFIG_SYS_MONITOR_BASE + gd->reloc_off; - dma_alloc_end = monitor_addr - CONFIG_SYS_MALLOC_LEN; - dma_alloc_start = dma_alloc_end - CONFIG_SYS_DMA_ALLOC_LEN; - dma_alloc_brk = dma_alloc_start; - - printf("DMA: Using memory from 0x%08lx to 0x%08lx\n", - dma_alloc_start, dma_alloc_end); - - invalidate_dcache_range((unsigned long)cached(dma_alloc_start), - dma_alloc_end); -} - -void *dma_alloc_coherent(size_t len, unsigned long *handle) -{ - unsigned long paddr = dma_alloc_brk; - - if (dma_alloc_brk + len > dma_alloc_end) - return NULL; - - dma_alloc_brk = ((paddr + len + CONFIG_SYS_DCACHE_LINESZ - 1) - & ~(CONFIG_SYS_DCACHE_LINESZ - 1)); - - *handle = paddr; - return uncached(paddr); -} -#else -static inline void dma_alloc_init(void) -{ - -} -#endif - static int init_baudrate(void) { gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); @@ -180,12 +136,6 @@ void board_init_f(ulong board_type) /* Reserve memory for malloc() */ addr -= CONFIG_SYS_MALLOC_LEN; -#ifdef CONFIG_SYS_DMA_ALLOC_LEN - /* Reserve DMA memory (must be cache aligned) */ - addr &= ~(CONFIG_SYS_DCACHE_LINESZ - 1); - addr -= CONFIG_SYS_DMA_ALLOC_LEN; -#endif - #ifdef CONFIG_LCD #ifdef CONFIG_FB_ADDR printf("LCD: Frame buffer allocated at preset 0x%08x\n", @@ -264,7 +214,6 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) /* The malloc area is right below the monitor image in RAM */ mem_malloc_init(CONFIG_SYS_MONITOR_BASE + gd->reloc_off - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN); - dma_alloc_init(); enable_interrupts(); diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 9c81e3199f..540e86ae47 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -143,7 +143,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h index 7b4f9cf206..35eae76930 100644 --- a/include/configs/atngw100mkii.h +++ b/include/configs/atngw100mkii.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 8f3fd0bb00..9e58238f1d 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -158,7 +158,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h index bbe0aea861..25090a68fa 100644 --- a/include/configs/atstk1006.h +++ b/include/configs/atstk1006.h @@ -159,7 +159,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h index 338d3dc782..75bff4ce28 100644 --- a/include/configs/favr-32-ezkit.h +++ b/include/configs/favr-32-ezkit.h @@ -162,7 +162,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h index 73534addfc..83f0ed2a62 100644 --- a/include/configs/grasshopper.h +++ b/include/configs/grasshopper.h @@ -151,7 +151,6 @@ CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h index 4f0603abc1..0bc42f12e0 100644 --- a/include/configs/hammerhead.h +++ b/include/configs/hammerhead.h @@ -137,7 +137,6 @@ #define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000) diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h index fc7ecfaee4..2fd3addc1a 100644 --- a/include/configs/mimc200.h +++ b/include/configs/mimc200.h @@ -157,7 +157,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) #define CONFIG_SYS_MALLOC_LEN (1024*1024) -#define CONFIG_SYS_DMA_ALLOC_LEN (16384) /* Allow 4MB for the kernel run-time image */ #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) From aa0ea2a5538ab7b0f3e8975a27ab8c0a764a69cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:40 +0100 Subject: [PATCH 115/222] avr32: rename cpu_init() -> arch_cpu_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann Reviewed-by: Simon Glass --- arch/avr32/cpu/cpu.c | 2 +- arch/avr32/include/asm/u-boot.h | 2 ++ arch/avr32/lib/board.c | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c index cef630ed45..cd226a6f71 100644 --- a/arch/avr32/cpu/cpu.c +++ b/arch/avr32/cpu/cpu.c @@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; -int cpu_init(void) +int arch_cpu_init(void) { extern void _evba(void); diff --git a/arch/avr32/include/asm/u-boot.h b/arch/avr32/include/asm/u-boot.h index 6aef808749..2387f8af62 100644 --- a/arch/avr32/include/asm/u-boot.h +++ b/arch/avr32/include/asm/u-boot.h @@ -25,4 +25,6 @@ typedef struct bd_info { /* For image.h:image_check_target_arch() */ #define IH_ARCH_DEFAULT IH_ARCH_AVR32 +int arch_cpu_init(void); + #endif /* __ASM_U_BOOT_H__ */ diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 7d13ac534b..95f95266f1 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -98,7 +98,7 @@ void board_init_f(ulong board_type) /* Perform initialization sequence */ board_early_init_f(); - cpu_init(); + arch_cpu_init(); board_postclk_init(); env_init(); init_baudrate(); From 26db7903f5102b8cf5570237ccbfc7f2c0dfd7aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:41 +0100 Subject: [PATCH 116/222] avr32: factor out cpu_mmc_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit cpu_mmc_init() is required by the init sequence to have a working MMC interface on avr32. This will not be included in the binary if we omit the avr32 board.c when building the generic board. Signed-off-by: Andreas Bießmann --- arch/avr32/cpu/Makefile | 1 + arch/avr32/cpu/mmc.c | 16 ++++++++++++++++ arch/avr32/lib/board.c | 8 -------- 3 files changed, 17 insertions(+), 8 deletions(-) create mode 100644 arch/avr32/cpu/mmc.c diff --git a/arch/avr32/cpu/Makefile b/arch/avr32/cpu/Makefile index 00cede3fd9..e111db3e75 100644 --- a/arch/avr32/cpu/Makefile +++ b/arch/avr32/cpu/Makefile @@ -16,5 +16,6 @@ obj-y += cache.o obj-y += interrupts.o obj-$(CONFIG_PORTMUX_PIO) += portmux-pio.o obj-$(CONFIG_PORTMUX_GPIO) += portmux-gpio.o +obj-y += mmc.o obj-$(if $(filter at32ap700x,$(SOC)),y) += at32ap700x/ diff --git a/arch/avr32/cpu/mmc.c b/arch/avr32/cpu/mmc.c new file mode 100644 index 0000000000..b7213e4e7a --- /dev/null +++ b/arch/avr32/cpu/mmc.c @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2004-2006 Atmel Corporation + * Copyright (C) 2015 Andreas Bießmann + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include +#include +#include + +/* provide cpu_mmc_init, to overwrite provide board_mmc_init */ +int cpu_mmc_init(bd_t *bd) +{ + /* This calls the atmel_mci_init in gen_atmel_mci.c */ + return atmel_mci_init((void *)ATMEL_BASE_MMCI); +} diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 95f95266f1..e86530fe77 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -9,7 +9,6 @@ #include #include #include -#include #ifdef CONFIG_BITBANGMII #include @@ -38,13 +37,6 @@ static int __do_nothing(void) int board_postclk_init(void) __attribute__((weak, alias("__do_nothing"))); int board_early_init_r(void) __attribute__((weak, alias("__do_nothing"))); -/* provide cpu_mmc_init, to overwrite provide board_mmc_init */ -int cpu_mmc_init(bd_t *bd) -{ - /* This calls the atmel_mci_init in gen_atmel_mci.c */ - return atmel_mci_init((void *)ATMEL_BASE_MMCI); -} - static int init_baudrate(void) { gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); From e9ed41cc5c684b4b08988934544449eb782c14db Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:42 +0100 Subject: [PATCH 117/222] avr32: rename mmu.h definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Prefix mmu.h PAGE_xxx definitions with MMU_ in order to prevent a naming conflict with other definitions. Signed-off-by: Andreas Bießmann --- arch/avr32/cpu/at32ap700x/mmu.c | 8 ++++---- arch/avr32/include/asm/arch-at32ap700x/mmu.h | 6 +++--- board/atmel/atngw100/atngw100.c | 12 ++++++------ board/atmel/atngw100mkii/atngw100mkii.c | 18 +++++++++--------- board/atmel/atstk1000/atstk1000.c | 12 ++++++------ board/earthlcd/favr-32-ezkit/favr-32-ezkit.c | 12 ++++++------ board/in-circuit/grasshopper/grasshopper.c | 12 ++++++------ board/mimc/mimc200/mimc200.c | 18 +++++++++--------- board/miromico/hammerhead/hammerhead.c | 12 ++++++------ 9 files changed, 55 insertions(+), 55 deletions(-) diff --git a/arch/avr32/cpu/at32ap700x/mmu.c b/arch/avr32/cpu/at32ap700x/mmu.c index 0e28b21eef..f5e62f27eb 100644 --- a/arch/avr32/cpu/at32ap700x/mmu.c +++ b/arch/avr32/cpu/at32ap700x/mmu.c @@ -7,7 +7,7 @@ void mmu_init_r(unsigned long dest_addr) uintptr_t vmr_table_addr; /* Round monitor address down to the nearest page boundary */ - dest_addr &= PAGE_ADDR_MASK; + dest_addr &= MMU_PAGE_ADDR_MASK; /* Initialize TLB entry 0 to cover the monitor, and lock it */ sysreg_write(TLBEHI, dest_addr | SYSREG_BIT(TLBEHI_V)); @@ -36,7 +36,7 @@ int mmu_handle_tlb_miss(void) unsigned int fault_pgno; int first, last; - fault_pgno = sysreg_read(TLBEAR) >> PAGE_SHIFT; + fault_pgno = sysreg_read(TLBEAR) >> MMU_PAGE_SHIFT; vmr_table = (const struct mmu_vm_range *)sysreg_read(PTBR); /* Do a binary search through the VM ranges */ @@ -60,8 +60,8 @@ int mmu_handle_tlb_miss(void) /* Got it; let's slam it into the TLB */ uint32_t tlbelo; - tlbelo = vmr->phys & ~PAGE_ADDR_MASK; - tlbelo |= fault_pgno << PAGE_SHIFT; + tlbelo = vmr->phys & ~MMU_PAGE_ADDR_MASK; + tlbelo |= fault_pgno << MMU_PAGE_SHIFT; sysreg_write(TLBELO, tlbelo); __builtin_tlbw(); diff --git a/arch/avr32/include/asm/arch-at32ap700x/mmu.h b/arch/avr32/include/asm/arch-at32ap700x/mmu.h index fcd9a05609..4736312f5d 100644 --- a/arch/avr32/include/asm/arch-at32ap700x/mmu.h +++ b/arch/avr32/include/asm/arch-at32ap700x/mmu.h @@ -13,9 +13,9 @@ #include -#define PAGE_SHIFT 20 -#define PAGE_SIZE (1UL << PAGE_SHIFT) -#define PAGE_ADDR_MASK (~(PAGE_SIZE - 1)) +#define MMU_PAGE_SHIFT 20 +#define MMU_PAGE_SIZE (1UL << MMU_PAGE_SHIFT) +#define MMU_PAGE_ADDR_MASK (~(MMU_PAGE_SIZE - 1)) #define MMU_VMR_CACHE_NONE \ (SYSREG_BF(AP, 3) | SYSREG_BF(SZ, 3) | SYSREG_BIT(TLBELO_D)) diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index 03d767a4a8..ed09c8c7e4 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -18,14 +18,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; diff --git a/board/atmel/atngw100mkii/atngw100mkii.c b/board/atmel/atngw100mkii/atngw100mkii.c index 72d19e430e..912ea10fe4 100644 --- a/board/atmel/atngw100mkii/atngw100mkii.c +++ b/board/atmel/atngw100mkii/atngw100mkii.c @@ -23,21 +23,21 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { /* Atmel AT49BV640D 8 MiB x16 NOR flash on NCS0 */ - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { /* Micron MT29F2G16AAD 256 MiB x16 NAND flash on NCS3 */ - .virt_pgno = EBI_SRAM_CS3_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SRAM_CS3_SIZE >> PAGE_SHIFT, - .phys = (EBI_SRAM_CS3_BASE >> PAGE_SHIFT) + .virt_pgno = EBI_SRAM_CS3_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SRAM_CS3_SIZE >> MMU_PAGE_SHIFT, + .phys = (EBI_SRAM_CS3_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { /* 2x16-bit ISSI IS42S16320B 64 MiB SDRAM (128 MiB total) */ - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 4b6b90f683..f3546946c4 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -17,14 +17,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c index a74547bf65..f9fde793f5 100644 --- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c +++ b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c @@ -17,14 +17,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; diff --git a/board/in-circuit/grasshopper/grasshopper.c b/board/in-circuit/grasshopper/grasshopper.c index 340b713188..2ac54db295 100644 --- a/board/in-circuit/grasshopper/grasshopper.c +++ b/board/in-circuit/grasshopper/grasshopper.c @@ -18,14 +18,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index 2ad53ec2ab..186ac7df62 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -20,19 +20,19 @@ struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = EBI_SRAM_CS2_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SRAM_CS2_SIZE >> PAGE_SHIFT, - .phys = (EBI_SRAM_CS2_BASE >> PAGE_SHIFT) + .virt_pgno = EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SRAM_CS2_SIZE >> MMU_PAGE_SHIFT, + .phys = (EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c index d82fee7b90..e9a9e4b3cf 100644 --- a/board/miromico/hammerhead/hammerhead.c +++ b/board/miromico/hammerhead/hammerhead.c @@ -21,14 +21,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; From 186678600a3aa81f883e4bf4b94ca4d40081d93a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:43 +0100 Subject: [PATCH 118/222] avr32: convert to dram_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann Reviewed-by: Simon Glass --- arch/avr32/include/asm/u-boot.h | 1 + arch/avr32/lib/Makefile | 1 + arch/avr32/lib/board.c | 20 +++++++++---------- arch/avr32/lib/dram_init.c | 17 ++++++++++++++++ board/atmel/atngw100/atngw100.c | 20 ++----------------- board/atmel/atngw100mkii/atngw100mkii.c | 21 +++----------------- board/atmel/atstk1000/atstk1000.c | 21 +++----------------- board/earthlcd/favr-32-ezkit/favr-32-ezkit.c | 21 +++----------------- board/in-circuit/grasshopper/grasshopper.c | 20 ++----------------- board/mimc/mimc200/mimc200.c | 20 ++----------------- board/miromico/hammerhead/hammerhead.c | 20 ++----------------- 11 files changed, 46 insertions(+), 136 deletions(-) create mode 100644 arch/avr32/lib/dram_init.c diff --git a/arch/avr32/include/asm/u-boot.h b/arch/avr32/include/asm/u-boot.h index 2387f8af62..232350ead8 100644 --- a/arch/avr32/include/asm/u-boot.h +++ b/arch/avr32/include/asm/u-boot.h @@ -26,5 +26,6 @@ typedef struct bd_info { #define IH_ARCH_DEFAULT IH_ARCH_AVR32 int arch_cpu_init(void); +int dram_init(void); #endif /* __ASM_U_BOOT_H__ */ diff --git a/arch/avr32/lib/Makefile b/arch/avr32/lib/Makefile index bb45cbe153..5f2d97bfc7 100644 --- a/arch/avr32/lib/Makefile +++ b/arch/avr32/lib/Makefile @@ -11,3 +11,4 @@ obj-y += memset.o obj-y += board.o obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += interrupts.o +obj-y += dram_init.o diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index e86530fe77..13b7fede74 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -29,6 +29,12 @@ DECLARE_GLOBAL_DATA_PTR; unsigned long monitor_flash_len; +__weak void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = gd->ram_size; +} + /* Weak aliases for optional board functions */ static int __do_nothing(void) { @@ -82,7 +88,6 @@ void board_init_f(ulong board_type) unsigned long monitor_len; unsigned long monitor_addr; unsigned long addr; - long sdram_size; /* Initialize the global data pointer */ memset(&gd_data, 0, sizeof(gd_data)); @@ -97,10 +102,10 @@ void board_init_f(ulong board_type) serial_init(); console_init_f(); display_banner(); - sdram_size = initdram(board_type); + dram_init(); /* If we have no SDRAM, we can't go on */ - if (sdram_size <= 0) + if (gd->ram_size <= 0) panic("No working SDRAM available\n"); /* @@ -114,7 +119,7 @@ void board_init_f(ulong board_type) * - global data struct * - stack */ - addr = CONFIG_SYS_SDRAM_BASE + sdram_size; + addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size; monitor_len = (char *)(&__bss_end) - _text; /* @@ -156,12 +161,7 @@ void board_init_f(ulong board_type) *(--new_sp) = 0; *(--new_sp) = 0; - /* - * Initialize the board information struct with the - * information we have. - */ - bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - bd->bi_dram[0].size = sdram_size; + dram_init_banksize(); memcpy(new_gd, gd, sizeof(gd_t)); diff --git a/arch/avr32/lib/dram_init.c b/arch/avr32/lib/dram_init.c new file mode 100644 index 0000000000..5078e77f17 --- /dev/null +++ b/arch/avr32/lib/dram_init.c @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2015 Andreas Bießmann + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + /* check for the maximum amount of memory possible on AP7000 devices */ + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + (256<<20)); + return 0; +} diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index ed09c8c7e4..dacd427831 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -52,6 +52,8 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -68,24 +70,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/atmel/atngw100mkii/atngw100mkii.c b/board/atmel/atngw100mkii/atngw100mkii.c index 912ea10fe4..8e215d5fcf 100644 --- a/board/atmel/atngw100mkii/atngw100mkii.c +++ b/board/atmel/atngw100mkii/atngw100mkii.c @@ -69,6 +69,9 @@ int board_early_init_f(void) portmux_select_gpio(PORTMUX_PORT_E, 1 << 23, PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH | PORTMUX_DRIVE_MIN); + + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -85,24 +88,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index f3546946c4..fd4363bece 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -78,7 +78,10 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); + #if defined(CONFIG_MACB) portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW); portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW); @@ -90,24 +93,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x10; diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c index f9fde793f5..f9ac330c33 100644 --- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c +++ b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c @@ -52,6 +52,9 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); + + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart3(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); @@ -63,24 +66,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/in-circuit/grasshopper/grasshopper.c b/board/in-circuit/grasshopper/grasshopper.c index 2ac54db295..91b41162de 100644 --- a/board/in-circuit/grasshopper/grasshopper.c +++ b/board/in-circuit/grasshopper/grasshopper.c @@ -53,6 +53,8 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(SDRAM_DATA_32BIT, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart0(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -69,24 +71,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x00; diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index 186ac7df62..f078295508 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -91,6 +91,8 @@ int board_early_init_f(void) /* Enable 26 address bits and NCS2 */ portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); /* de-assert "force sys reset" pin */ @@ -151,24 +153,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c index e9a9e4b3cf..a0c7d3b323 100644 --- a/board/miromico/hammerhead/hammerhead.c +++ b/board/miromico/hammerhead/hammerhead.c @@ -63,6 +63,8 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -74,24 +76,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; From 4db896236cdac37db17b215ba3ff2d2701bddb49 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:44 +0100 Subject: [PATCH 119/222] avr32: use generic gd->start_addr_sp MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Before avr32 had an extra storage for stack end to have a nice stack printout on exception. Remove this extra storage and use generic gd->start_addr_sp instead. Signed-off-by: Andreas Bießmann --- arch/avr32/cpu/exception.c | 6 +++--- arch/avr32/include/asm/global_data.h | 1 - arch/avr32/lib/board.c | 2 +- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/avr32/cpu/exception.c b/arch/avr32/cpu/exception.c index 5d1bc689f8..d6991f6668 100644 --- a/arch/avr32/cpu/exception.c +++ b/arch/avr32/cpu/exception.c @@ -96,11 +96,11 @@ void do_unknown_exception(unsigned int ecr, struct pt_regs *regs) printf("CPU Mode: %s\n", cpu_modes[mode]); /* Avoid exception loops */ - if (regs->sp < (gd->arch.stack_end - CONFIG_STACKSIZE) - || regs->sp >= gd->arch.stack_end) + if (regs->sp < (gd->start_addr_sp - CONFIG_STACKSIZE) || + regs->sp >= gd->start_addr_sp) printf("\nStack pointer seems bogus, won't do stack dump\n"); else - dump_mem("\nStack: ", regs->sp, gd->arch.stack_end); + dump_mem("\nStack: ", regs->sp, gd->start_addr_sp); panic("Unhandled exception\n"); } diff --git a/arch/avr32/include/asm/global_data.h b/arch/avr32/include/asm/global_data.h index d82fb7cc6d..60abd00782 100644 --- a/arch/avr32/include/asm/global_data.h +++ b/arch/avr32/include/asm/global_data.h @@ -8,7 +8,6 @@ /* Architecture-specific global data */ struct arch_global_data { - unsigned long stack_end; /* highest stack address */ unsigned long cpu_hz; /* cpu core clock frequency */ }; diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 13b7fede74..99aa96e23f 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -157,7 +157,7 @@ void board_init_f(ulong board_type) /* And finally, a new, bigger stack. */ new_sp = (unsigned long *)addr; - gd->arch.stack_end = addr; + gd->start_addr_sp = addr; *(--new_sp) = 0; *(--new_sp) = 0; From 68145d4c7b3aa83d74c2dc904a39fab17cee1691 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:45 +0100 Subject: [PATCH 120/222] common/board_f: factor out reserve_stacks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce arch_reserve_stacks() to tailor gd->start_addr_sp and gd->irq_sp to the architecture needs. Signed-off-by: Andreas Bießmann Reviewed-by: Simon Glass --- arch/arm/lib/Makefile | 1 + arch/arm/lib/stack.c | 42 +++++++++++++++++++++++++++++++++++++ arch/powerpc/lib/Makefile | 1 + arch/powerpc/lib/stack.c | 31 +++++++++++++++++++++++++++ common/board_f.c | 44 ++++++++------------------------------- include/common.h | 18 ++++++++++++++++ 6 files changed, 102 insertions(+), 35 deletions(-) create mode 100644 arch/arm/lib/stack.c create mode 100644 arch/powerpc/lib/stack.c diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index d74e4b8415..da8ed72a11 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -35,6 +35,7 @@ endif obj-$(CONFIG_SEMIHOSTING) += semihosting.o obj-y += sections.o +obj-y += stack.o ifdef CONFIG_ARM64 obj-y += gic_64.o obj-y += interrupts_64.o diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c new file mode 100644 index 0000000000..cf10a53ec6 --- /dev/null +++ b/arch/arm/lib/stack.c @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2015 Andreas Bießmann + * + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2002-2006 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Marius Groeger + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include + +DECLARE_GLOBAL_DATA_PTR; + +int arch_reserve_stacks(void) +{ +#ifdef CONFIG_SPL_BUILD + gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ + gd->irq_sp = gd->start_addr_sp; +#else + /* setup stack pointer for exceptions */ + gd->irq_sp = gd->start_addr_sp; + +# if !defined(CONFIG_ARM64) +# ifdef CONFIG_USE_IRQ + gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); + debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", + CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); + + /* 8-byte alignment for ARM ABI compliance */ + gd->start_addr_sp &= ~0x07; +# endif + /* leave 3 words for abort-stack, plus 1 for alignment */ + gd->start_addr_sp -= 16; +# endif +#endif + + return 0; +} diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 0f6298269a..05b22bb5f7 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -40,6 +40,7 @@ obj-y += extable.o obj-y += interrupts.o obj-$(CONFIG_CMD_KGDB) += kgdb.o obj-$(CONFIG_CMD_IDE) += ide.o +obj-y += stack.o obj-y += time.o # Don't include the MPC5xxx special memcpy into the diff --git a/arch/powerpc/lib/stack.c b/arch/powerpc/lib/stack.c new file mode 100644 index 0000000000..1985f0348d --- /dev/null +++ b/arch/powerpc/lib/stack.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2015 Andreas Bießmann + * + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2002-2006 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Marius Groeger + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include + +DECLARE_GLOBAL_DATA_PTR; + +int arch_reserve_stacks(void) +{ + ulong *s; + + /* setup stack pointer for exceptions */ + gd->irq_sp = gd->start_addr_sp; + + /* Clear initial stack frame */ + s = (ulong *)gd->start_addr_sp; + *s = 0; /* Terminate back chain */ + *++s = 0; /* NULL return address */ + + return 0; +} diff --git a/common/board_f.c b/common/board_f.c index 2c10215a17..ef3f036dad 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -573,48 +573,22 @@ static int reserve_fdt(void) return 0; } +int arch_reserve_stacks(void) +{ + return 0; +} + static int reserve_stacks(void) { -#ifdef CONFIG_SPL_BUILD -# ifdef CONFIG_ARM - gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ - gd->irq_sp = gd->start_addr_sp; -# endif -#else -# ifdef CONFIG_PPC - ulong *s; -# endif - - /* setup stack pointer for exceptions */ + /* make stack pointer 16-byte aligned */ gd->start_addr_sp -= 16; gd->start_addr_sp &= ~0xf; - gd->irq_sp = gd->start_addr_sp; /* - * Handle architecture-specific things here - * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() - * to handle this and put in arch/xxx/lib/stack.c + * let the architecture specific code tailor gd->start_addr_sp and + * gd->irq_sp */ -# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) -# ifdef CONFIG_USE_IRQ - gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); - debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", - CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); - - /* 8-byte alignment for ARM ABI compliance */ - gd->start_addr_sp &= ~0x07; -# endif - /* leave 3 words for abort-stack, plus 1 for alignment */ - gd->start_addr_sp -= 16; -# elif defined(CONFIG_PPC) - /* Clear initial stack frame */ - s = (ulong *) gd->start_addr_sp; - *s = 0; /* Terminate back chain */ - *++s = 0; /* NULL return address */ -# endif /* Architecture specific code */ - - return 0; -#endif + return arch_reserve_stacks(); } static int display_new_sp(void) diff --git a/include/common.h b/include/common.h index 91294547f5..77c55c6f26 100644 --- a/include/common.h +++ b/include/common.h @@ -252,6 +252,24 @@ static inline int print_cpuinfo(void) int update_flash_size(int flash_size); int arch_early_init_r(void); +/** + * Reserve all necessary stacks + * + * This is used in generic board init sequence in common/board_f.c. Each + * architecture could provide this function to tailor the required stacks. + * + * On entry gd->start_addr_sp is pointing to the suggested top of the stack. + * The callee ensures gd->start_add_sp is 16-byte aligned, so architectures + * require only this can leave it untouched. + * + * On exit gd->start_addr_sp and gd->irq_sp should be set to the respective + * positions of the stack. The stack pointer(s) will be set to this later. + * gd->irq_sp is only required, if the architecture needs it. + * + * @return 0 if no error + */ +__weak int arch_reserve_stacks(void); + /** * Show the DRAM size in a board-specific way * From c722f0b026249385bbbcec4f5be9bd3abd69342c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:47 +0100 Subject: [PATCH 121/222] common/board_r: allocate bootparams MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann Reviewed-by: Simon Glass --- common/board_r.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/common/board_r.c b/common/board_r.c index 907b33cca7..f0b4f9d935 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -459,6 +459,18 @@ static int initr_env(void) return 0; } +#ifdef CONFIG_SYS_BOOTPARAMS_LEN +static int initr_malloc_bootparams(void) +{ + gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN); + if (!gd->bd->bi_boot_params) { + puts("WARNING: Cannot allocate space for boot parameters\n"); + return -ENOMEM; + } + return 0; +} +#endif + #ifdef CONFIG_SC3 /* TODO: with new initcalls, move this into the driver */ extern void sc3_read_eeprom(void); @@ -775,6 +787,9 @@ init_fnc_t init_sequence_r[] = { initr_dataflash, #endif initr_env, +#ifdef CONFIG_SYS_BOOTPARAMS_LEN + initr_malloc_bootparams, +#endif INIT_FUNC_WATCHDOG_RESET initr_secondary_cpu, #ifdef CONFIG_SC3 From a752a8b4c49d67daa4ea9f9ebac3972bb1c2328b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:48 +0100 Subject: [PATCH 122/222] avr32: add generic board support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/config.mk | 3 +++ arch/avr32/cpu/u-boot.lds | 2 ++ arch/avr32/include/asm/config.h | 1 + arch/avr32/include/asm/u-boot.h | 7 +++++++ arch/avr32/lib/Makefile | 2 ++ arch/avr32/lib/interrupts.c | 5 +++++ common/board_f.c | 2 +- common/board_r.c | 13 ++++++++++--- common/cmd_bdinfo.c | 4 ++-- include/asm-generic/u-boot.h | 4 ++++ 10 files changed, 37 insertions(+), 6 deletions(-) diff --git a/arch/avr32/config.mk b/arch/avr32/config.mk index 469185e8b4..8252f598c3 100644 --- a/arch/avr32/config.mk +++ b/arch/avr32/config.mk @@ -9,6 +9,9 @@ ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := avr32-linux- endif +# avr32 has generic board support +__HAVE_ARCH_GENERIC_BOARD := y + CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000 PLATFORM_RELFLAGS += -ffixed-r5 -fPIC -mno-init-got -mrelax diff --git a/arch/avr32/cpu/u-boot.lds b/arch/avr32/cpu/u-boot.lds index cb29a22b1e..b0180e3534 100644 --- a/arch/avr32/cpu/u-boot.lds +++ b/arch/avr32/cpu/u-boot.lds @@ -48,9 +48,11 @@ SECTIONS _edata = .; .bss (NOLOAD) : { + __bss_start = .; *(.bss) *(.bss.*) } . = ALIGN(8); __bss_end = .; + __init_end = .; } diff --git a/arch/avr32/include/asm/config.h b/arch/avr32/include/asm/config.h index 63056a4dfa..529fe227a6 100644 --- a/arch/avr32/include/asm/config.h +++ b/arch/avr32/include/asm/config.h @@ -8,5 +8,6 @@ #define _ASM_CONFIG_H_ #define CONFIG_NEEDS_MANUAL_RELOC +#define CONFIG_SYS_GENERIC_GLOBAL_DATA #endif diff --git a/arch/avr32/include/asm/u-boot.h b/arch/avr32/include/asm/u-boot.h index 232350ead8..8b047ec7c8 100644 --- a/arch/avr32/include/asm/u-boot.h +++ b/arch/avr32/include/asm/u-boot.h @@ -6,6 +6,11 @@ #ifndef __ASM_U_BOOT_H__ #define __ASM_U_BOOT_H__ 1 +#ifdef CONFIG_SYS_GENERIC_BOARD +/* Use the generic board which requires a unified bd_info */ +#include +#else + typedef struct bd_info { unsigned char bi_phy_id[4]; unsigned long bi_board_number; @@ -22,6 +27,8 @@ typedef struct bd_info { #define bi_memstart bi_dram[0].start #define bi_memsize bi_dram[0].size +#endif + /* For image.h:image_check_target_arch() */ #define IH_ARCH_DEFAULT IH_ARCH_AVR32 diff --git a/arch/avr32/lib/Makefile b/arch/avr32/lib/Makefile index 5f2d97bfc7..6750913630 100644 --- a/arch/avr32/lib/Makefile +++ b/arch/avr32/lib/Makefile @@ -8,7 +8,9 @@ # obj-y += memset.o +ifndef CONFIG_SYS_GENERIC_BOARD obj-y += board.o +endif obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += interrupts.o obj-y += dram_init.o diff --git a/arch/avr32/lib/interrupts.c b/arch/avr32/lib/interrupts.c index bacb2d186a..5f3a49e152 100644 --- a/arch/avr32/lib/interrupts.c +++ b/arch/avr32/lib/interrupts.c @@ -7,6 +7,11 @@ #include +int interrupt_init(void) +{ + return 0; +} + void enable_interrupts(void) { asm volatile("csrf %0" : : "n"(SYSREG_GM_OFFSET)); diff --git a/common/board_f.c b/common/board_f.c index ef3f036dad..4d8b8a626b 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -883,7 +883,7 @@ static init_fnc_t init_sequence_f[] = { #endif announce_dram_init, /* TODO: unify all these dram functions? */ -#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) +#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) dram_init, /* configure available RAM banks */ #endif #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) diff --git a/common/board_r.c b/common/board_r.c index f0b4f9d935..4fcd4f6a70 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -55,6 +55,9 @@ #include #include #include +#ifdef CONFIG_AVR32 +#include +#endif DECLARE_GLOBAL_DATA_PTR; @@ -498,7 +501,7 @@ static int initr_api(void) #endif /* enable exceptions */ -#ifdef CONFIG_ARM +#if defined(CONFIG_ARM) || defined(CONFIG_AVR32) static int initr_enable_interrupts(void) { enable_interrupts(); @@ -825,10 +828,10 @@ init_fnc_t init_sequence_r[] = { initr_kgdb, #endif interrupt_init, -#if defined(CONFIG_ARM) +#if defined(CONFIG_ARM) || defined(CONFIG_AVR32) initr_enable_interrupts, #endif -#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) +#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) timer_init, /* initialize timer */ #endif #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) @@ -893,6 +896,10 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) int i; #endif +#ifdef CONFIG_AVR32 + mmu_init_r(dest_addr); +#endif + #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64) gd = new_gd; #endif diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index e9eab232f9..aa81da227b 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -345,8 +345,8 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) bd_t *bd = gd->bd; print_num("boot_params", (ulong)bd->bi_boot_params); - print_num("memstart", (ulong)bd->bi_memstart); - print_lnum("memsize", (u64)bd->bi_memsize); + print_num("memstart", (ulong)bd->bi_dram[0].start); + print_lnum("memsize", (u64)bd->bi_dram[0].size); print_num("flashstart", (ulong)bd->bi_flashstart); print_num("flashsize", (ulong)bd->bi_flashsize); print_num("flashoffset", (ulong)bd->bi_flashoffset); diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index aef39d7884..a63a87a287 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -32,6 +32,10 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ +#ifdef CONFIG_AVR32 + unsigned char bi_phy_id[4]; /* PHY address for ATAG_ETHERNET */ + unsigned long bi_board_number;/* ATAG_BOARDINFO */ +#endif #ifdef CONFIG_ARM unsigned long bi_arm_freq; /* arm frequency */ unsigned long bi_dsp_freq; /* dsp core frequency */ From 573feec8a43bd1b44134a1a5ce10676b577d0358 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:49 +0100 Subject: [PATCH 123/222] grasshopper: enable generic board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- include/configs/grasshopper.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h index 83f0ed2a62..54eb9777d7 100644 --- a/include/configs/grasshopper.h +++ b/include/configs/grasshopper.h @@ -62,6 +62,10 @@ #define CONFIG_USART_BASE ATMEL_BASE_USART1 #define CONFIG_USART_ID 1 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R + /* User serviceable stuff */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS From 5c98d7ffb0b11c9e3909f56ec5ce9dff682f1e30 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Fri, 6 Feb 2015 23:06:50 +0100 Subject: [PATCH 124/222] atstk1002: enable generic board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- include/configs/atstk1002.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 9e58238f1d..a9c064a45d 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -104,6 +104,10 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY +/* generic board */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R /* * Command line configuration. From 90fbee3e4051badff770a0ee1b1ca21cb808d634 Mon Sep 17 00:00:00 2001 From: Joe Hershberger Date: Wed, 4 Feb 2015 21:56:53 -0600 Subject: [PATCH 125/222] cmd_fdt: Actually fix fdt command in sandbox Commit 90bac29a76bc8d649b41a55f2786c0abef9bb2c1 claims to fix this bug that was introduced in commit a92fd6577ea17751ead9b50243e3c562125cf581 but doesn't actually make the change that the commit message describes. Actually fix the bug this time. Signed-off-by: Joe Hershberger Acked-by: Simon Glass --- common/bootm.c | 2 +- common/cmd_fdt.c | 8 ++++---- common/image-fdt.c | 2 +- include/fdt_support.h | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/common/bootm.c b/common/bootm.c index e2dc16486b..34f60bbb53 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -233,7 +233,7 @@ static int bootm_find_fdt(int flag, int argc, char * const argv[]) return 1; } - set_working_fdt_addr(images.ft_addr); + set_working_fdt_addr((ulong)images.ft_addr); return 0; } diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c index dc59fab828..5878496575 100644 --- a/common/cmd_fdt.c +++ b/common/cmd_fdt.c @@ -38,13 +38,13 @@ static int is_printable_string(const void *data, int len); */ struct fdt_header *working_fdt; -void set_working_fdt_addr(void *addr) +void set_working_fdt_addr(ulong addr) { void *buf; - buf = map_sysmem((ulong)addr, 0); + buf = map_sysmem(addr, 0); working_fdt = buf; - setenv_addr("fdtaddr", addr); + setenv_ulong("fdtaddr", addr); } /* @@ -123,7 +123,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (control) gd->fdt_blob = blob; else - set_working_fdt_addr((void *)blob); + set_working_fdt_addr(addr); if (argc >= 2) { int len; diff --git a/common/image-fdt.c b/common/image-fdt.c index e3f06cdd1a..d9e47283c7 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -190,7 +190,7 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size) *of_flat_tree = of_start; *of_size = of_len; - set_working_fdt_addr(*of_flat_tree); + set_working_fdt_addr((ulong)*of_flat_tree); return 0; error: diff --git a/include/fdt_support.h b/include/fdt_support.h index 1f19fe4c96..ae5e8a3ef6 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -100,7 +100,7 @@ void ft_pci_setup(void *blob, bd_t *bd); */ int ft_system_setup(void *blob, bd_t *bd); -void set_working_fdt_addr(void *addr); +void set_working_fdt_addr(ulong addr); int fdt_shrink_to_minimum(void *blob); int fdt_increase_size(void *fdt, int add_len); From c71a0164d9b23e624552fb614bcb426a11119b57 Mon Sep 17 00:00:00 2001 From: Joe Hershberger Date: Wed, 4 Feb 2015 21:56:54 -0600 Subject: [PATCH 126/222] cmd_fdt: Print the control fdt in terms of virtual memory If you want to inspect the control device tree using the fdt command, the "fdt address -c" command previously unhelpfully printed the phys memory address of the device tree. That address could not then be used to set the fdt address for inspection. Changed the resulting print to one that can be copied directly to the 'fdt address ' command. Signed-off-by: Joe Hershberger Acked-by: Simon Glass --- common/cmd_fdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c index 5878496575..48b3e70415 100644 --- a/common/cmd_fdt.c +++ b/common/cmd_fdt.c @@ -111,7 +111,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (!blob || !fdt_valid(&blob)) return 1; printf("The address of the fdt is %#08lx\n", - control ? (ulong)blob : + control ? (ulong)map_to_sysmem(blob) : getenv_hex("fdtaddr", 0)); return 0; } From 9e533cb0462a7d28ec14a816ea627d38ce48dbf3 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 5 Feb 2015 13:50:26 +0900 Subject: [PATCH 127/222] cmd_i2c: quit I2C commands immediately on error If the i2c driver returns an error status, error out immediately. Continuing the loop just results in printing error messages again and again. Signed-off-by: Masahiro Yamada Cc: Simon Glass Cc: Heiko Schocher Reviewed-by: Simon Glass --- common/cmd_i2c.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index fe8f77aaec..62b0b4863d 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -518,7 +518,7 @@ static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] ret = i2c_read(chip, addr, alen, linebuf, linebytes); #endif if (ret) - i2c_report_err(ret, I2C_ERR_READ); + return i2c_report_err(ret, I2C_ERR_READ); else { printf("%04x:", addr); cp = linebuf; @@ -616,7 +616,7 @@ static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] ret = i2c_write(chip, addr++, alen, &byte, 1); #endif if (ret) - i2c_report_err(ret, I2C_ERR_WRITE); + return i2c_report_err(ret, I2C_ERR_WRITE); /* * Wait for the write to complete. The write can take * up to 10mSec (we allow a little more time). @@ -798,16 +798,15 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const arg ret = i2c_read(chip, addr, alen, (uchar *)&data, size); #endif if (ret) - i2c_report_err(ret, I2C_ERR_READ); - else { - data = cpu_to_be32(data); - if (size == 1) - printf(" %02lx", (data >> 24) & 0x000000FF); - else if (size == 2) - printf(" %04lx", (data >> 16) & 0x0000FFFF); - else - printf(" %08lx", data); - } + return i2c_report_err(ret, I2C_ERR_READ); + + data = cpu_to_be32(data); + if (size == 1) + printf(" %02lx", (data >> 24) & 0x000000FF); + else if (size == 2) + printf(" %04lx", (data >> 16) & 0x0000FFFF); + else + printf(" %08lx", data); nbytes = cli_readline(" ? "); if (nbytes == 0) { @@ -848,7 +847,8 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const arg (uchar *)&data, size); #endif if (ret) - i2c_report_err(ret, I2C_ERR_WRITE); + return i2c_report_err(ret, + I2C_ERR_WRITE); #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); #endif From ed16f14689b98c1ec98c9f30b92b8edea9d2d60c Mon Sep 17 00:00:00 2001 From: Lubomir Popov Date: Fri, 30 Jan 2015 19:56:04 +0200 Subject: [PATCH 128/222] cmd_i2c: Provide option for bulk 'i2c write' in one transaction I2C chips do exist that require a write of some multi-byte data to occur in a single bus transaction (aka atomic transfer), otherwise either the write does not come into effect at all, or normal operation of internal circuitry cannot be guaranteed. The current implementation of the 'i2c write' command (transfer of multiple bytes from a memory buffer) in fact performs a separate transaction for each byte to be written and thus cannot support such types of I2C slave devices. This patch provides an alternative by allowing 'i2c write' to execute the write transfer of the given number of bytes in a single bus transaction if the '-s' option is specified as a final command argument. Else the current re-addressing method is used. Signed-off-by: Lubomir Popov hs: adapt to CONFIG_DM_I2C --- common/cmd_i2c.c | 45 ++++++++++++++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 62b0b4863d..ad38cbf6e1 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -342,9 +342,10 @@ static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[ int ret; #ifdef CONFIG_DM_I2C struct udevice *dev; + struct dm_i2c_chip *i2c_chip; #endif - if (argc != 5) + if ((argc < 5) || (argc > 6)) return cmd_usage(cmdtp); /* @@ -367,7 +368,7 @@ static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[ return cmd_usage(cmdtp); /* - * Length is the number of objects, not number of bytes. + * Length is the number of bytes. */ length = simple_strtoul(argv[4], NULL, 16); @@ -377,22 +378,47 @@ static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[ ret = i2c_set_chip_offset_len(dev, alen); if (ret) return i2c_report_err(ret, I2C_ERR_WRITE); + i2c_chip = dev_get_parent_platdata(dev); + if (!i2c_chip) + return i2c_report_err(ret, I2C_ERR_WRITE); #endif - while (length-- > 0) { + if (argc == 6 && !strcmp(argv[5], "-s")) { + /* + * Write all bytes in a single I2C transaction. If the target + * device is an EEPROM, it is your responsibility to not cross + * a page boundary. No write delay upon completion, take this + * into account if linking commands. + */ #ifdef CONFIG_DM_I2C - ret = dm_i2c_write(dev, devaddr++, memaddr++, 1); + i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS; + ret = dm_i2c_write(dev, devaddr, memaddr, length); #else - ret = i2c_write(chip, devaddr++, alen, memaddr++, 1); + ret = i2c_write(chip, devaddr, alen, memaddr, length); #endif if (ret) return i2c_report_err(ret, I2C_ERR_WRITE); + } else { + /* + * Repeated addressing - perform separate + * write transactions of one byte each + */ + while (length-- > 0) { +#ifdef CONFIG_DM_I2C + i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS; + ret = dm_i2c_write(dev, devaddr++, memaddr++, 1); +#else + ret = i2c_write(chip, devaddr++, alen, memaddr++, 1); +#endif + if (ret) + return i2c_report_err(ret, I2C_ERR_WRITE); /* * No write delay with FRAM devices. */ #if !defined(CONFIG_SYS_I2C_FRAM) - udelay(11000); + udelay(11000); #endif + } } return 0; } @@ -1827,7 +1853,7 @@ static cmd_tbl_t cmd_i2c_sub[] = { U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), - U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""), + U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""), #ifdef CONFIG_DM_I2C U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""), #endif @@ -1894,7 +1920,8 @@ static char i2c_help_text[] = "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" "i2c probe [address] - test for and show device(s) on the I2C bus\n" "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n" - "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n" + "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n" + " to I2C; the -s option selects bulk write in a single transaction\n" #ifdef CONFIG_DM_I2C "i2c flags chip [flags] - set or get chip flags\n" #endif @@ -1906,7 +1933,7 @@ static char i2c_help_text[] = #endif U_BOOT_CMD( - i2c, 6, 1, do_i2c, + i2c, 7, 1, do_i2c, "I2C sub-system", i2c_help_text ); From 6fb9ac15ebac4bcc4864be7958bf9b2b2b7420de Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 13 Feb 2015 12:20:47 -0700 Subject: [PATCH 129/222] dm: cros_ec: Convert to Kconfig Since both I2C and SPI are converted to Kconfig, we can convert cros_ec to Kconfig for these buses. LPC will need to wait until driver mode PCI is available. Signed-off-by: Simon Glass --- configs/peach-pi_defconfig | 4 +++ configs/peach-pit_defconfig | 4 +++ configs/sandbox_defconfig | 5 +++ configs/snow_defconfig | 5 +++ drivers/input/Kconfig | 6 ++++ drivers/misc/Kconfig | 48 ++++++++++++++++++++++++++++- include/configs/exynos5-dt-common.h | 3 -- include/configs/peach-pi.h | 1 - include/configs/peach-pit.h | 1 - include/configs/sandbox.h | 4 --- include/configs/snow.h | 2 -- 11 files changed, 71 insertions(+), 12 deletions(-) diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 8ada0dbe40..333e335a26 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -3,3 +3,7 @@ CONFIG_SPL=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_PEACH_PI=y CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" +CONFIG_CROS_EC=y +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_KEYB=y +CONFIG_CMD_CROS_EC=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index b944b3bb50..cf84444950 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -3,3 +3,7 @@ CONFIG_SPL=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_PEACH_PIT=y CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" +CONFIG_CROS_EC=y +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_KEYB=y +CONFIG_CMD_CROS_EC=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 0bf5ea34d0..70f5b86b85 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -7,3 +7,8 @@ CONFIG_DM=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SYS_MALLOC_F=y CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_CROS_EC=y +CONFIG_DM_CROS_EC=y +CONFIG_CROS_EC_SANDBOX=y +CONFIG_CROS_EC_KEYB=y +CONFIG_CMD_CROS_EC=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 14ed793f6d..353ddb03a0 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -3,3 +3,8 @@ CONFIG_SPL=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_SNOW=y CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" +CONFIG_CROS_EC=y +CONFIG_DM_CROS_EC=y +CONFIG_CROS_EC_I2C=y +CONFIG_CROS_EC_KEYB=y +CONFIG_CMD_CROS_EC=y diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index e69de29bb2..bb00de7c57 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -0,0 +1,6 @@ +config CROS_EC_KEYB + bool "Enable Chrome OS EC keyboard support" + help + Most ARM Chromebooks use an EC to provide access to the keyboard. + Messages are used to request key scans from the EC and these are + then decoded into keys by this driver. diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 813d1c24b9..0df25c331f 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -1,3 +1,49 @@ +config CMD_CROS_EC + bool "Enable crosec command" + depends on CROS_EC + help + Enable command-line access to the Chrome OS EC (Embedded + Controller). This provides the 'crosec' command which has + a number of sub-commands for performing EC tasks such as + updating its flash, accessing a small saved context area + and talking to the I2C bus behind the EC (if there is one). + +config CROS_EC + bool "Enable Chrome OS EC" + help + Enable access to the Chrome OS EC. This is a separate + microcontroller typically available on a SPI bus on Chromebooks. It + provides access to the keyboard, some internal storage and may + control access to the battery and main PMIC depending on the + device. You can use the 'crosec' command to access it. + +config CROS_EC_I2C + bool "Enable Chrome OS EC I2C driver" + depends on CROS_EC + help + Enable I2C access to the Chrome OS EC. This is used on older + ARM Chromebooks such as snow and spring before the standard bus + changed to SPI. The EC will accept commands across the I2C using + a special message protocol, and provide responses. + +config CROS_EC_LPC + bool "Enable Chrome OS EC LPC driver" + depends on CROS_EC + help + Enable I2C access to the Chrome OS EC. This is used on x86 + Chromebooks such as link and falco. The keyboard is provided + through a legacy port interface, so on x86 machines the main + function of the EC is power and thermal management. + +config CROS_EC_SPI + bool "Enable Chrome OS EC SPI driver" + depends on CROS_EC + help + Enable SPI access to the Chrome OS EC. This is used on newer + ARM Chromebooks such as pit, pi and nyan-big. The SPI interface + provides a faster and more robust interface than I2C but the bugs + are less interesting. + config DM_CROS_EC bool "Enable Driver Model for Chrome OS EC" depends on DM @@ -5,5 +51,5 @@ config DM_CROS_EC Enable driver model for the Chrome OS EC interface. This allows the cros_ec SPI driver to operate with CONFIG_DM_SPI but otherwise makes few changes. Since cros_ec also supports - I2C and LPC (which don't support driver model yet), a full + LPC (which doesn't support driver model yet), a full conversion is not yet possible. diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index 9cef0b0a38..b1b8e1ace7 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -24,9 +24,6 @@ #define CONFIG_POWER_TPS65090 /* Enable keyboard */ -#define CONFIG_CROS_EC /* CROS_EC protocol */ -#define CONFIG_CROS_EC_KEYB /* CROS_EC keyboard input */ -#define CONFIG_CMD_CROS_EC #define CONFIG_KEYBOARD #endif diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index f724164d89..f04f0613aa 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -43,7 +43,6 @@ #endif #define CONFIG_POWER_TPS65090_EC -#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */ #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_EXYNOS diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index de12a9e1b1..b5efbdcaa6 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -43,7 +43,6 @@ #endif #define CONFIG_POWER_TPS65090_EC -#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */ #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_EXYNOS diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 5c116508d0..febbfb69f6 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -141,9 +141,6 @@ #define CONFIG_BOOTARGS "" -#define CONFIG_CROS_EC -#define CONFIG_CMD_CROS_EC -#define CONFIG_CROS_EC_SANDBOX #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_BOARD_LATE_INIT @@ -166,7 +163,6 @@ #define LCD_BPP LCD_COLOR16 #define CONFIG_LCD_BMP_RLE8 -#define CONFIG_CROS_EC_KEYB #define CONFIG_KEYBOARD #define CONFIG_EXTRA_ENV_SETTINGS "stdin=serial,cros-ec-keyb\0" \ diff --git a/include/configs/snow.h b/include/configs/snow.h index ce6676eae7..fe802f253c 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -20,9 +20,7 @@ #include -#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */ #define CONFIG_POWER_TPS65090_I2C -#define CONFIG_DM_CROS_EC #define CONFIG_BOARD_COMMON #define CONFIG_ARCH_EARLY_INIT_R From 4bba9d3f77061ea742d8f697ce72251fb79c8016 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 13 Feb 2015 12:20:48 -0700 Subject: [PATCH 130/222] dm: Move CONFIG_I2C_COMPAT to Kconfig Make this option available in Kconfig and clean up the board that uses it. Note there is also an entry in exynos5-common.h but this affects multiple boards and should be dropped as part of the Samsung I2C migration to driver model. Signed-off-by: Simon Glass --- configs/odroid_defconfig | 2 ++ drivers/i2c/Kconfig | 9 +++++++++ include/configs/exynos5-common.h | 2 ++ include/configs/odroid.h | 2 -- 4 files changed, 13 insertions(+), 2 deletions(-) diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index a8428373ac..816a3fad3c 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -3,3 +3,5 @@ CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_ODROID=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" +CONFIG_DM_I2C=y +CONFIG_DM_I2C_COMPAT=y diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 2cc776c73f..692810d057 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -13,6 +13,15 @@ config DM_I2C enabled together (it is not possible to use driver model for one and not the other). +config DM_I2C_COMPAT + bool "Enable I2C compatibility layer" + depends on DM + help + Enable old-style I2C functions for compatibility with existing code. + This option can be enabled as a temporary measure to avoid needing + to convert all code for a board in a single commit. It should not + be enabled for any board in an official release. + config SYS_I2C_UNIPHIER bool "UniPhier I2C driver" depends on ARCH_UNIPHIER && DM_I2C diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 0ba39a23dd..3ab8d559bf 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -126,6 +126,8 @@ #define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) /* I2C */ + +/* TODO(sjg@chromium.org): Move these two options to Kconfig */ #define CONFIG_DM_I2C #define CONFIG_DM_I2C_COMPAT #define CONFIG_CMD_I2C diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 9d5dbdce36..8b47537614 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -177,8 +177,6 @@ /* I2C */ #define CONFIG_CMD_I2C -#define CONFIG_DM_I2C -#define CONFIG_DM_I2C_COMPAT #define CONFIG_SYS_I2C_S3C24X0 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0 From f11199f0d0495177fe17e651e99955dc7494ab52 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 13 Feb 2015 12:20:49 -0700 Subject: [PATCH 131/222] dm: mx6: Adjust mx6sxsabresd to use Kconfig for DM_THERMAL Use Kconfig instead of board config for DM and DM_THERMAL. Signed-off-by: Simon Glass --- configs/mx6sxsabresd_defconfig | 2 ++ configs/mx6sxsabresd_spl_defconfig | 2 ++ include/configs/mx6sxsabresd.h | 2 -- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 72e0f103ec..cc823226c1 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -3,3 +3,5 @@ CONFIG_ARM=y CONFIG_TARGET_MX6SXSABRESD=y CONFIG_SYS_MALLOC_F=y CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 6b36e06a85..901b01bf98 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6SX" +S:CONFIG_ARM=y +S:CONFIG_TARGET_MX6SXSABRESD=y +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 1005b9e6bc..a2901294a6 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -227,8 +227,6 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif -#define CONFIG_DM -#define CONFIG_DM_THERMAL #define CONFIG_IMX6_THERMAL #define CONFIG_CMD_FUSE From ba25779384671c533a778e53d59fe3f317bfefa8 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 12 Feb 2015 18:49:33 +0900 Subject: [PATCH 132/222] Documentation: gpio: fix bindings document [ imported from Linux Kernel, commit 74981fb81d83 ] Signed-off-by: Masahiro Yamada Acked-by: Laurent Pinchart Signed-off-by: Linus Walleij Acked-by: Simon Glass --- doc/device-tree-bindings/gpio/gpio.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/doc/device-tree-bindings/gpio/gpio.txt b/doc/device-tree-bindings/gpio/gpio.txt index b9bd1d64cf..f7a158d858 100644 --- a/doc/device-tree-bindings/gpio/gpio.txt +++ b/doc/device-tree-bindings/gpio/gpio.txt @@ -69,7 +69,8 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. ---------------------------------- A gpio-specifier should contain a flag indicating the GPIO polarity; active- -high or active-low. If it does, the follow best practices should be followed: +high or active-low. If it does, the following best practices should be +followed: The gpio-specifier's polarity flag should represent the physical level at the GPIO controller that achieves (or represents, for inputs) a logically asserted @@ -147,7 +148,7 @@ contains information structures as follows: numeric-gpio-range ::= named-gpio-range ::= '<0 0>' - gpio-phandle : phandle to pin controller node. + pinctrl-phandle : phandle to pin controller node gpio-base : Base GPIO ID in the GPIO controller pinctrl-base : Base pinctrl pin ID in the pin controller count : The number of GPIOs/pins in this range From 2f964aa7b1bf7de50587a1864cf60d187ebefb2c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 26 Jan 2015 18:27:07 -0700 Subject: [PATCH 133/222] serial: Support an early UART for debugging This came up in a discussion on the mailing list here: https://patchwork.ozlabs.org/patch/384613/ My concerns at the time were: - it doesn't need to be written in assembler - it doesn't need to be ARM-specific This patch provides a possible alternative. It works by allowing any serial driver to export one init function and provide a putc() function. These can be used to output debug data before the real serial driver is available. This implementation does not depend on driver model, and it is possible for it to operate without a stack on some architectures (e.g. PowerPC, ARM). It provides the same features as the ARM-specific debug.S but with more UART and architecture support. Signed-off-by: Simon Glass --- configs/minnowmax_defconfig | 2 - drivers/serial/Kconfig | 46 ++++++++++++ include/debug_uart.h | 139 ++++++++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+), 2 deletions(-) create mode 100644 include/debug_uart.h diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 7bc9085b32..d12428996d 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -7,7 +7,5 @@ CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_VIDEO_X86=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y -CONFIG_DEBUG_UART_NS16550=y -CONFIG_DEBUG_UART=y CONFIG_MMCONF_BASE_ADDRESS=0xe0000000 CONFIG_HAVE_INTEL_ME=y diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index c94353ba6a..6313258eac 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -7,6 +7,52 @@ config DM_SERIAL implements serial_putc() etc. The uclass interface is defined in include/serial.h. +config DEBUG_UART + bool "Enable an early debug UART for debugging" + help + The debug UART is intended for use very early in U-Boot to debug + problems when an ICE or other debug mechanism is not available. + + To use it you should: + - Make sure your UART supports this interface + - Enable CONFIG_DEBUG_UART + - Enable the CONFIG for your UART to tell it to provide this interface + (e.g. CONFIG_DEBUG_UART_NS16550) + - Define the required settings as needed (see below) + - Call debug_uart_init() before use + - Call debug_uart_putc() to output a character + + Depending on your platform it may be possible to use this UART before + a stack is available. + + If your UART does not support this interface you can probably add + support quite easily. Remember that you cannot use driver model and + it is preferred to use no stack. + + You must not use this UART once driver model is working and the + serial drivers are up and running (done in serial_init()). Otherwise + the drivers may conflict and you will get strange output. + +config DEBUG_UART_BASE + hex "Base address of UART" + depends on DEBUG_UART + help + This is the base address of your UART for memory-mapped UARTs. + + A default should be provided by your board, but if not you will need + to use the correct value here. + +config DEBUG_UART_CLOCK + int "UART input clock" + depends on DEBUG_UART + help + The UART input clock determines the speed of the internal UART + circuitry. The baud rate is derived from this by dividing the input + clock down. + + A default should be provided by your board, but if not you will need + to use the correct value here. + config UNIPHIER_SERIAL bool "UniPhier on-chip UART support" depends on ARCH_UNIPHIER && DM_SERIAL diff --git a/include/debug_uart.h b/include/debug_uart.h new file mode 100644 index 0000000000..f56797b72f --- /dev/null +++ b/include/debug_uart.h @@ -0,0 +1,139 @@ +/* + * Early debug UART support + * + * (C) Copyright 2014 Google, Inc + * Writte by Simon Glass + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DEBUG_UART_H +#define _DEBUG_UART_H + +#include + +/* + * The debug UART is intended for use very early in U-Boot to debug problems + * when an ICE or other debug mechanism is not available. + * + * To use it you should: + * - Make sure your UART supports this interface + * - Enable CONFIG_DEBUG_UART + * - Enable the CONFIG for your UART to tell it to provide this interface + * (e.g. CONFIG_DEBUG_UART_NS16550) + * - Define the required settings as needed (see below) + * - Call debug_uart_init() before use + * - Call printch() to output a character + * + * Depending on your platform it may be possible to use this UART before a + * stack is available. + * + * If your UART does not support this interface you can probably add support + * quite easily. Remember that you cannot use driver model and it is preferred + * to use no stack. + * + * You must not use this UART once driver model is working and the serial + * drivers are up and running (done in serial_init()). Otherwise the drivers + * may conflict and you will get strange output. + * + * + * To enable the debug UART in your serial driver: + * + * - #include + * - Define debug_uart_init(), trying to avoid using the stack + * - Define _debug_uart_putc() as static inline (avoiding stack usage) + * - Immediately afterwards, add DEBUG_UART_FUNCS to define the rest of the + * functionality (printch(), etc.) + */ + +/** + * debug_uart_init() - Set up the debug UART ready for use + * + * This sets up the UART with the correct baud rate, etc. + * + * Available CONFIG is: + * + * - CONFIG_DEBUG_UART_BASE: Base address of UART + * - CONFIG_BAUDRATE: Requested baud rate + * - CONFIG_DEBUG_UART_CLOCK: Input clock for UART + */ +void debug_uart_init(void); + +/** + * printch() - Output a character to the debug UART + * + * @ch: Character to output + */ +asmlinkage void printch(int ch); + +/** + * printascii() - Output an ASCII string to the debug UART + * + * @str: String to output + */ +asmlinkage void printascii(const char *str); + +/** + * printhex2() - Output a 2-digit hex value + * + * @value: Value to output + */ +asmlinkage void printhex2(uint value); + +/** + * printhex4() - Output a 4-digit hex value + * + * @value: Value to output + */ +asmlinkage void printhex4(uint value); + +/** + * printhex8() - Output a 8-digit hex value + * + * @value: Value to output + */ +asmlinkage void printhex8(uint value); + +/* + * Now define some functions - this should be inserted into the serial driver + */ +#define DEBUG_UART_FUNCS \ + asmlinkage void printch(int ch) \ + { \ + _debug_uart_putc(ch); \ + } \ +\ + asmlinkage void printascii(const char *str) \ + { \ + while (*str) \ + _debug_uart_putc(*str++); \ + } \ +\ + static inline void printhex1(uint digit) \ + { \ + digit &= 0xf; \ + _debug_uart_putc(digit > 9 ? digit - 10 + 'a' : digit + '0'); \ + } \ +\ + static inline void printhex(uint value, int digits) \ + { \ + while (digits-- > 0) \ + printhex1(value >> (4 * digits)); \ + } \ +\ + asmlinkage void printhex2(uint value) \ + { \ + printhex(value, 2); \ + } \ +\ + asmlinkage void printhex4(uint value) \ + { \ + printhex(value, 4); \ + } \ +\ + asmlinkage void printhex8(uint value) \ + { \ + printhex(value, 8); \ + } + +#endif From 765716744f6743d6c1e6b3c92eea163b4ee59f3c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 26 Jan 2015 18:27:08 -0700 Subject: [PATCH 134/222] serial: ns16550: Add access functions that don't need platdata For the debug UART we need to be able to provide any parameters before driver model is set up. Add parameters to the low-level access functions to make this possible. Signed-off-by: Simon Glass --- drivers/serial/ns16550.c | 56 ++++++++++++++++++++++++---------------- 1 file changed, 34 insertions(+), 22 deletions(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 70c946249f..57e6125de2 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -55,6 +55,37 @@ DECLARE_GLOBAL_DATA_PTR; #endif /* CONFIG_SYS_NS16550_IER */ #ifdef CONFIG_DM_SERIAL + +static inline void serial_out_shift(unsigned char *addr, int shift, int value) +{ +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + outb(value, (ulong)addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) + out_le32(addr, value); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) + out_be32(addr, value); +#elif defined(CONFIG_SYS_BIG_ENDIAN) + writeb(value, addr + (1 << shift) - 1); +#else + writeb(value, addr); +#endif +} + +static inline int serial_in_shift(unsigned char *addr, int shift) +{ +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + return inb((ulong)addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) + return in_le32(addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) + return in_be32(addr); +#elif defined(CONFIG_SYS_BIG_ENDIAN) + return readb(addr + (1 << reg_shift) - 1); +#else + return readb(addr); +#endif +} + static void ns16550_writeb(NS16550_t port, int offset, int value) { struct ns16550_platdata *plat = port->plat; @@ -66,17 +97,7 @@ static void ns16550_writeb(NS16550_t port, int offset, int value) * As far as we know it doesn't make sense to support selection of * these options at run-time, so use the existing CONFIG options. */ -#ifdef CONFIG_SYS_NS16550_PORT_MAPPED - outb(value, (ulong)addr); -#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) - out_le32(addr, value); -#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) - out_be32(addr, value); -#elif defined(CONFIG_SYS_BIG_ENDIAN) - writeb(value, addr + (1 << plat->reg_shift) - 1); -#else - writeb(value, addr); -#endif + serial_out_shift(addr, plat->reg_shift, value); } static int ns16550_readb(NS16550_t port, int offset) @@ -86,17 +107,8 @@ static int ns16550_readb(NS16550_t port, int offset) offset *= 1 << plat->reg_shift; addr = map_sysmem(plat->base, 0) + offset; -#ifdef CONFIG_SYS_NS16550_PORT_MAPPED - return inb((ulong)addr); -#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) - return in_le32(addr); -#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) - return in_be32(addr); -#elif defined(CONFIG_SYS_BIG_ENDIAN) - return readb(addr + (1 << plat->reg_shift) - 1); -#else - return readb(addr); -#endif + + return serial_in_shift(addr, plat->reg_shift); } /* We can clean these up once everything is moved to driver model */ From 21d004368fc8a4da07147c58dfe9a4e16d4ab761 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 26 Jan 2015 18:27:09 -0700 Subject: [PATCH 135/222] serial: ns16550: Support debug UART Add debug UART functions to permit ns16550 to provide an early debug UART. Try to avoid using the stack so that this can be called from assembler before a stack is set up (at least on ARM and PowerPC). Signed-off-by: Simon Glass --- drivers/serial/Kconfig | 13 +++++++++++ drivers/serial/ns16550.c | 50 ++++++++++++++++++++++++++++++++++++++-- 2 files changed, 61 insertions(+), 2 deletions(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 6313258eac..1686a1f951 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -33,6 +33,19 @@ config DEBUG_UART serial drivers are up and running (done in serial_init()). Otherwise the drivers may conflict and you will get strange output. +choice + prompt "Select which UART will provide the debug UART" + depends on DEBUG_UART + +config DEBUG_UART_NS16550 + bool "ns16550" + help + Select this to enable a debug UART using the ns16550 driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver model serial is running. + +endchoice + config DEBUG_UART_BASE hex "Base address of UART" depends on DEBUG_UART diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 57e6125de2..eb00f1ca8a 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -118,10 +118,15 @@ static int ns16550_readb(NS16550_t port, int offset) ns16550_readb(com_port, addr - (unsigned char *)com_port) #endif -int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) +static inline int calc_divisor(NS16550_t port, int clock, int baudrate) { const unsigned int mode_x_div = 16; + return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); +} + +int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) +{ #ifdef CONFIG_OMAP1510 /* If can't cleanly clock 115200 set div to 1 */ if ((clock == 12000000) && (baudrate == 115200)) { @@ -131,7 +136,7 @@ int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) port->osc_12m_sel = 0; /* clear if previsouly set */ #endif - return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); + return calc_divisor(port, clock, baudrate); } static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) @@ -231,6 +236,47 @@ int NS16550_tstc(NS16550_t com_port) #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ +#ifdef CONFIG_DEBUG_UART_NS16550 + +#include + +void debug_uart_init(void) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + int baud_divisor; + + /* + * We copy the code from above because it is already horribly messy. + * Trying to refactor to nicely remove the duplication doesn't seem + * feasible. The better fix is to move all users of this driver to + * driver model. + */ + baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); + + serial_out_shift(&com_port->ier, 0, CONFIG_SYS_NS16550_IER); + serial_out_shift(&com_port->mcr, 0, UART_MCRVAL); + serial_out_shift(&com_port->fcr, 0, UART_FCRVAL); + + serial_out_shift(&com_port->lcr, 0, UART_LCR_BKSE | UART_LCRVAL); + serial_out_shift(&com_port->dll, 0, baud_divisor & 0xff); + serial_out_shift(&com_port->dlm, 0, (baud_divisor >> 8) & 0xff); + serial_out_shift(&com_port->lcr, 0, UART_LCRVAL); +} + +static inline void _debug_uart_putc(int ch) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + + while (!(serial_in_shift(&com_port->lsr, 0) & UART_LSR_THRE)) + ; + serial_out_shift(&com_port->thr, 0, ch); +} + +DEBUG_UART_FUNCS + +#endif + #ifdef CONFIG_DM_SERIAL static int ns16550_serial_putc(struct udevice *dev, const char ch) { From 66c03151fc8752c29b7d17003b9c87218640b10b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 18 Feb 2015 22:36:18 +0100 Subject: [PATCH 136/222] dm: Protect device_unbind() with CONFIG_DM_DEVICE_REMOVE Since device_unbind() is also defined in device-remove.c, which is compiled in only in case CONFIG_DM_DEVICE_REMOVE is defined, protect the device_unbind() prototype with the same CONFIG_DM_DEVICE_REMOVE check. Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Stefan Roese Cc: Tom Rini Acked-by: Simon Glass --- include/dm/device-internal.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h index f0cc794750..e2418fedb9 100644 --- a/include/dm/device-internal.h +++ b/include/dm/device-internal.h @@ -101,7 +101,11 @@ static inline int device_remove(struct udevice *dev) { return 0; } * @dev: Pointer to device to unbind * @return 0 if OK, -ve on error */ +#ifdef CONFIG_DM_DEVICE_REMOVE int device_unbind(struct udevice *dev); +#else +static inline int device_unbind(struct udevice *dev) { return 0; } +#endif #ifdef CONFIG_DM_DEVICE_REMOVE void device_free(struct udevice *dev); From 242e3d893d1311ea38abd25613076a29961d422e Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 16 Feb 2015 17:26:41 +0100 Subject: [PATCH 137/222] sunxi: video: Add support for LCD reset pin On some boards there is a gpio to reset the LCD panel, add support for this. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- board/sunxi/Kconfig | 8 ++++++++ drivers/video/sunxi_display.c | 11 ++++++++++- 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 3eab81fd12..a170c561aa 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -312,6 +312,14 @@ config VIDEO_LCD_POWER Set the power enable pin for the LCD panel. This takes a string in the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. +config VIDEO_LCD_RESET + string "LCD panel reset pin" + depends on VIDEO + default "" + ---help--- + Set the reset pin for the LCD panel. This takes a string in the format + understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + config VIDEO_LCD_BL_EN string "LCD panel backlight enable pin" depends on VIDEO diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index dbda97e746..7f01401252 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -592,7 +592,7 @@ static void sunxi_lcdc_enable(void) static void sunxi_lcdc_panel_enable(void) { - int pin; + int pin, reset_pin; /* * Start with backlight disabled to avoid the screen flashing to @@ -610,6 +610,12 @@ static void sunxi_lcdc_panel_enable(void) gpio_direction_output(pin, PWM_OFF); } + reset_pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_RESET); + if (reset_pin != -1) { + gpio_request(reset_pin, "lcd_reset"); + gpio_direction_output(reset_pin, 0); /* Assert reset */ + } + /* Give the backlight some time to turn off and power up the panel. */ mdelay(40); pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_POWER); @@ -617,6 +623,9 @@ static void sunxi_lcdc_panel_enable(void) gpio_request(pin, "lcd_power"); gpio_direction_output(pin, 1); } + + if (reset_pin != -1) + gpio_direction_output(reset_pin, 1); /* De-assert reset */ } static void sunxi_lcdc_backlight_enable(void) From 55410089cb979d7a86ee817c0309c4c2348a90df Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 16 Feb 2015 17:23:25 +0100 Subject: [PATCH 138/222] sunxi: video: Add support for LCD panels which need to be configured via i2c This commits adds support for configuring a a bitbang i2c controller, which is used on some boards to configure the LCD panel (via i2c). Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- board/sunxi/Kconfig | 24 ++++++++++++++++++++++++ board/sunxi/board.c | 10 ++++++++++ include/configs/sunxi-common.h | 16 ++++++++++++++++ 3 files changed, 50 insertions(+) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index a170c561aa..bbb4d1b1e5 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -344,6 +344,30 @@ config VIDEO_LCD_BL_PWM_ACTIVE_LOW ---help--- Set this if the backlight pwm output is active low. +config VIDEO_LCD_PANEL_I2C + bool "LCD panel needs to be configured via i2c" + depends on VIDEO + default m + ---help--- + Say y here if the LCD panel needs to be configured via i2c. This + will add a bitbang i2c controller using gpios to talk to the LCD. + +config VIDEO_LCD_PANEL_I2C_SDA + string "LCD panel i2c interface SDA pin" + depends on VIDEO_LCD_PANEL_I2C + default "PG12" + ---help--- + Set the SDA pin for the LCD i2c interface. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + +config VIDEO_LCD_PANEL_I2C_SCL + string "LCD panel i2c interface SCL pin" + depends on VIDEO_LCD_PANEL_I2C + default "PG10" + ---help--- + Set the SCL pin for the LCD i2c interface. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + # Note only one of these may be selected at a time! But hidden choices are # not supported by Kconfig diff --git a/board/sunxi/board.c b/board/sunxi/board.c index b70e00ce6b..e1891d198e 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -33,6 +33,12 @@ #include #include +#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) +/* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */ +int soft_i2c_gpio_sda; +int soft_i2c_gpio_scl; +#endif + DECLARE_GLOBAL_DATA_PTR; /* add board specific code here */ @@ -152,6 +158,10 @@ void i2c_init_board(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0); sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0); clock_twi_onoff(0, 1); +#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) + soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA); + soft_i2c_gpio_scl = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SCL); +#endif } #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1238d821b3..f5efebbf28 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -183,6 +183,22 @@ #define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x7f + +#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) +#define CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 +#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ +#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ +/* We use pin names in Kconfig and sunxi_name_to_gpio() */ +#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda +#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl +#ifndef __ASSEMBLY__ +extern int soft_i2c_gpio_sda; +extern int soft_i2c_gpio_scl; +#endif +#endif + #define CONFIG_CMD_I2C /* PMU */ From aad2ac24c0871bb897be676aca946f37dd05f187 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 16 Feb 2015 17:49:47 +0100 Subject: [PATCH 139/222] sunxi: video: Add support for tl059wv5c0 lcd panels Add support for the 6" 480x800 tl059wv5c0 panel used on e.g. Utoo P66 and Aigo M60/M608/M606 tablets. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- board/sunxi/Kconfig | 8 ++++++++ drivers/video/sunxi_display.c | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index bbb4d1b1e5..f5471a14c5 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -406,6 +406,14 @@ config VIDEO_LCD_PANEL_HITACHI_TX18D42VM ---help--- 7.85" 1024x768 Hitachi tx18d42vm LCD panel support +config VIDEO_LCD_TL059WV5C0 + bool "tl059wv5c0 LCD panel" + select VIDEO_LCD_PANEL_I2C + select VIDEO_LCD_IF_PARALLEL + ---help--- + 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and + Aigo M60/M608/M606 tablets. + endchoice diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index 7f01401252..4e12150027 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include "videomodes.h" #include "hitachi_tx18d42vm_lcd.h" @@ -1030,6 +1031,12 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode, mdelay(50); /* Wait for lcd controller power on */ hitachi_tx18d42vm_init(); } + if (IS_ENABLED(CONFIG_VIDEO_LCD_TL059WV5C0)) { + unsigned int orig_i2c_bus = i2c_get_bus_num(); + i2c_set_bus_num(CONFIG_VIDEO_LCD_I2C_BUS); + i2c_reg_write(0x5c, 0x04, 0x42); /* Turn on the LCD */ + i2c_set_bus_num(orig_i2c_bus); + } sunxi_composer_mode_set(mode, address); sunxi_lcdc_tcon0_mode_set(mode, false); sunxi_composer_enable(); From 4614b891347dde81b59f32e1ea659c8251f0c4ca Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:01 +0900 Subject: [PATCH 140/222] ARM: at91: move board select menu and common settings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The board select menu in arch/arm/Kconfig is still big. To slim down it, this commit moves AT91 boards to arch/arm/mach-at91/Kconfig. Also, consolidate "config SYS_SOC" in each board Kconfig. The Kconfig files under board/ directory were modified with the following command: find board -name Kconfig | xargs sed -i -e ' /config SYS_SOC/ { N /default "at91"/ { N d } } ' Signed-off-by: Masahiro Yamada Acked-by: Andreas Bießmann --- arch/arm/Kconfig | 159 +---------------- arch/arm/mach-at91/Kconfig | 168 ++++++++++++++++++ board/BuS/eb_cpux9k2/Kconfig | 3 - board/BuS/vl_ma2sc/Kconfig | 3 - board/afeb9260/Kconfig | 3 - board/atmel/at91rm9200ek/Kconfig | 3 - board/atmel/at91sam9260ek/Kconfig | 3 - board/atmel/at91sam9261ek/Kconfig | 3 - board/atmel/at91sam9263ek/Kconfig | 3 - board/atmel/at91sam9m10g45ek/Kconfig | 3 - board/atmel/at91sam9n12ek/Kconfig | 3 - board/atmel/at91sam9rlek/Kconfig | 3 - board/atmel/at91sam9x5ek/Kconfig | 3 - board/atmel/sama5d3_xplained/Kconfig | 3 - board/atmel/sama5d3xek/Kconfig | 3 - board/atmel/sama5d4_xplained/Kconfig | 3 - board/atmel/sama5d4ek/Kconfig | 3 - board/bluewater/snapper9260/Kconfig | 3 - board/calao/sbc35_a9g20/Kconfig | 3 - board/calao/tny_a9260/Kconfig | 3 - board/calao/usb_a9263/Kconfig | 3 - board/egnite/ethernut5/Kconfig | 3 - board/esd/meesc/Kconfig | 3 - board/esd/otc570/Kconfig | 3 - board/eukrea/cpu9260/Kconfig | 3 - board/eukrea/cpuat91/Kconfig | 3 - board/ronetix/pm9261/Kconfig | 3 - board/ronetix/pm9263/Kconfig | 3 - board/ronetix/pm9g45/Kconfig | 3 - board/siemens/corvus/Kconfig | 3 - board/siemens/taurus/Kconfig | 3 - board/taskit/stamp9g20/Kconfig | 3 - configs/afeb9260_defconfig | 1 + configs/at91rm9200ek_defconfig | 1 + configs/at91rm9200ek_ram_defconfig | 1 + configs/at91sam9260ek_dataflash_cs0_defconfig | 1 + configs/at91sam9260ek_dataflash_cs1_defconfig | 1 + configs/at91sam9260ek_nandflash_defconfig | 1 + configs/at91sam9261ek_dataflash_cs0_defconfig | 1 + configs/at91sam9261ek_dataflash_cs3_defconfig | 1 + configs/at91sam9261ek_nandflash_defconfig | 1 + configs/at91sam9263ek_dataflash_cs0_defconfig | 1 + configs/at91sam9263ek_dataflash_defconfig | 1 + configs/at91sam9263ek_nandflash_defconfig | 1 + configs/at91sam9263ek_norflash_boot_defconfig | 1 + configs/at91sam9263ek_norflash_defconfig | 1 + configs/at91sam9g10ek_dataflash_cs0_defconfig | 1 + configs/at91sam9g10ek_dataflash_cs3_defconfig | 1 + configs/at91sam9g10ek_nandflash_defconfig | 1 + configs/at91sam9g20ek_2mmc_defconfig | 1 + .../at91sam9g20ek_2mmc_nandflash_defconfig | 1 + configs/at91sam9g20ek_dataflash_cs0_defconfig | 1 + configs/at91sam9g20ek_dataflash_cs1_defconfig | 1 + configs/at91sam9g20ek_nandflash_defconfig | 1 + configs/at91sam9m10g45ek_mmc_defconfig | 1 + configs/at91sam9m10g45ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9rlek_dataflash_defconfig | 1 + configs/at91sam9rlek_nandflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 1 + configs/at91sam9x5ek_spiflash_defconfig | 1 + configs/at91sam9xeek_dataflash_cs0_defconfig | 1 + configs/at91sam9xeek_dataflash_cs1_defconfig | 1 + configs/at91sam9xeek_nandflash_defconfig | 1 + configs/axm_defconfig | 1 + configs/corvus_defconfig | 1 + configs/cpu9260_128M_defconfig | 1 + configs/cpu9260_defconfig | 1 + configs/cpu9260_nand_128M_defconfig | 1 + configs/cpu9260_nand_defconfig | 1 + configs/cpu9G20_128M_defconfig | 1 + configs/cpu9G20_defconfig | 1 + configs/cpu9G20_nand_128M_defconfig | 1 + configs/cpu9G20_nand_defconfig | 1 + configs/cpuat91_defconfig | 1 + configs/cpuat91_ram_defconfig | 1 + configs/eb_cpux9k2_defconfig | 1 + configs/eb_cpux9k2_ram_defconfig | 1 + configs/ethernut5_defconfig | 1 + configs/meesc_dataflash_defconfig | 1 + configs/meesc_defconfig | 1 + configs/otc570_dataflash_defconfig | 1 + configs/otc570_defconfig | 1 + configs/pm9261_defconfig | 1 + configs/pm9263_defconfig | 1 + configs/pm9g45_defconfig | 1 + configs/portuxg20_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 1 + configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 1 + configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + configs/sbc35_a9g20_eeprom_defconfig | 1 + configs/sbc35_a9g20_nandflash_defconfig | 1 + configs/snapper9260_defconfig | 1 + configs/snapper9g20_defconfig | 1 + configs/stamp9g20_defconfig | 1 + configs/taurus_defconfig | 1 + configs/tny_a9260_eeprom_defconfig | 1 + configs/tny_a9260_nandflash_defconfig | 1 + configs/tny_a9g20_eeprom_defconfig | 1 + configs/tny_a9g20_nandflash_defconfig | 1 + configs/usb_a9263_dataflash_defconfig | 1 + configs/vl_ma2sc_defconfig | 1 + configs/vl_ma2sc_ram_defconfig | 1 + 115 files changed, 255 insertions(+), 245 deletions(-) create mode 100644 arch/arm/mach-at91/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 41f3220580..06c34682c4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -77,17 +77,8 @@ config TARGET_A320EVB bool "Support a320evb" select CPU_ARM920T -config TARGET_AT91RM9200EK - bool "Support at91rm9200ek" - select CPU_ARM920T - -config TARGET_EB_CPUX9K2 - bool "Support eb_cpux9k2" - select CPU_ARM920T - -config TARGET_CPUAT91 - bool "Support cpuat91" - select CPU_ARM920T +config ARCH_AT91 + bool "Atmel AT91" config TARGET_EDB93XX bool "Support edb93xx" @@ -129,100 +120,6 @@ config TARGET_GPLUGD bool "Support gplugd" select CPU_ARM926EJS -config TARGET_AFEB9260 - bool "Support afeb9260" - select CPU_ARM926EJS - -config TARGET_AT91SAM9260EK - bool "Support at91sam9260ek" - select CPU_ARM926EJS - -config TARGET_AT91SAM9261EK - bool "Support at91sam9261ek" - select CPU_ARM926EJS - -config TARGET_AT91SAM9263EK - bool "Support at91sam9263ek" - select CPU_ARM926EJS - -config TARGET_AT91SAM9M10G45EK - bool "Support at91sam9m10g45ek" - select CPU_ARM926EJS - -config TARGET_AT91SAM9N12EK - bool "Support at91sam9n12ek" - select CPU_ARM926EJS - -config TARGET_AT91SAM9RLEK - bool "Support at91sam9rlek" - select CPU_ARM926EJS - -config TARGET_AT91SAM9X5EK - bool "Support at91sam9x5ek" - select CPU_ARM926EJS - -config TARGET_SNAPPER9260 - bool "Support snapper9260" - select CPU_ARM926EJS - -config TARGET_VL_MA2SC - bool "Support vl_ma2sc" - select CPU_ARM926EJS - -config TARGET_SBC35_A9G20 - bool "Support sbc35_a9g20" - select CPU_ARM926EJS - -config TARGET_TNY_A9260 - bool "Support tny_a9260" - select CPU_ARM926EJS - -config TARGET_USB_A9263 - bool "Support usb_a9263" - select CPU_ARM926EJS - -config TARGET_ETHERNUT5 - bool "Support ethernut5" - select CPU_ARM926EJS - -config TARGET_MEESC - bool "Support meesc" - select CPU_ARM926EJS - -config TARGET_OTC570 - bool "Support otc570" - select CPU_ARM926EJS - -config TARGET_CPU9260 - bool "Support cpu9260" - select CPU_ARM926EJS - -config TARGET_PM9261 - bool "Support pm9261" - select CPU_ARM926EJS - -config TARGET_PM9263 - bool "Support pm9263" - select CPU_ARM926EJS - -config TARGET_PM9G45 - bool "Support pm9g45" - select CPU_ARM926EJS - -config TARGET_CORVUS - select SUPPORT_SPL - bool "Support corvus" - select CPU_ARM926EJS - -config TARGET_TAURUS - select SUPPORT_SPL - bool "Support taurus" - select CPU_ARM926EJS - -config TARGET_STAMP9G20 - bool "Support stamp9g20" - select CPU_ARM926EJS - config ARCH_DAVINCI bool "TI DaVinci" select CPU_ARM926EJS @@ -514,26 +411,6 @@ config TARGET_TI816X_EVM select CPU_V7 select SUPPORT_SPL -config TARGET_SAMA5D3_XPLAINED - bool "Support sama5d3_xplained" - select CPU_V7 - select SUPPORT_SPL - -config TARGET_SAMA5D3XEK - bool "Support sama5d3xek" - select CPU_V7 - select SUPPORT_SPL - -config TARGET_SAMA5D4_XPLAINED - bool "Support sama5d4_xplained" - select CPU_V7 - select SUPPORT_SPL - -config TARGET_SAMA5D4EK - bool "Support sama5d4ek" - select CPU_V7 - select SUPPORT_SPL - config TARGET_BCM28155_AP bool "Support bcm28155_ap" select CPU_V7 @@ -837,6 +714,8 @@ config ARCH_UNIPHIER endchoice +source "arch/arm/mach-at91/Kconfig" + source "arch/arm/cpu/arm926ejs/davinci/Kconfig" source "arch/arm/cpu/arm1176/bcm2835/Kconfig" @@ -876,44 +755,25 @@ source "arch/arm/cpu/armv7/Kconfig" source "board/aristainetos/Kconfig" source "board/BuR/kwb/Kconfig" source "board/BuR/tseries/Kconfig" -source "board/BuS/eb_cpux9k2/Kconfig" -source "board/BuS/vl_ma2sc/Kconfig" source "board/CarMediaLab/flea3/Kconfig" source "board/Marvell/aspenite/Kconfig" source "board/Marvell/db-mv784mp-gp/Kconfig" source "board/Marvell/dkb/Kconfig" source "board/Marvell/gplugd/Kconfig" -source "board/afeb9260/Kconfig" source "board/altera/socfpga/Kconfig" source "board/armadeus/apf27/Kconfig" source "board/armltd/integrator/Kconfig" source "board/armltd/vexpress/Kconfig" source "board/armltd/vexpress64/Kconfig" -source "board/atmel/at91rm9200ek/Kconfig" -source "board/atmel/at91sam9260ek/Kconfig" -source "board/atmel/at91sam9261ek/Kconfig" -source "board/atmel/at91sam9263ek/Kconfig" -source "board/atmel/at91sam9m10g45ek/Kconfig" -source "board/atmel/at91sam9n12ek/Kconfig" -source "board/atmel/at91sam9rlek/Kconfig" -source "board/atmel/at91sam9x5ek/Kconfig" -source "board/atmel/sama5d3_xplained/Kconfig" -source "board/atmel/sama5d3xek/Kconfig" -source "board/atmel/sama5d4_xplained/Kconfig" -source "board/atmel/sama5d4ek/Kconfig" source "board/bachmann/ot1200/Kconfig" source "board/balloon3/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/bluegiga/apx4devkit/Kconfig" -source "board/bluewater/snapper9260/Kconfig" source "board/boundary/nitrogen6x/Kconfig" source "board/broadcom/bcm28155_ap/Kconfig" source "board/broadcom/bcmcygnus/Kconfig" source "board/broadcom/bcmnsp/Kconfig" -source "board/calao/sbc35_a9g20/Kconfig" -source "board/calao/tny_a9260/Kconfig" -source "board/calao/usb_a9263/Kconfig" source "board/cirrus/edb93xx/Kconfig" source "board/cm4008/Kconfig" source "board/cm41xx/Kconfig" @@ -924,13 +784,8 @@ source "board/creative/xfi3/Kconfig" source "board/davedenx/qong/Kconfig" source "board/denx/m28evk/Kconfig" source "board/denx/m53evk/Kconfig" -source "board/egnite/ethernut5/Kconfig" source "board/embest/mx6boards/Kconfig" -source "board/esd/meesc/Kconfig" -source "board/esd/otc570/Kconfig" source "board/esg/ima3-mx53/Kconfig" -source "board/eukrea/cpu9260/Kconfig" -source "board/eukrea/cpuat91/Kconfig" source "board/faraday/a320evb/Kconfig" source "board/freescale/ls2085a/Kconfig" source "board/freescale/ls1021aqds/Kconfig" @@ -975,18 +830,13 @@ source "board/phytec/pcm051/Kconfig" source "board/ppcag/bg0900/Kconfig" source "board/pxa255_idp/Kconfig" source "board/raspberrypi/rpi/Kconfig" -source "board/ronetix/pm9261/Kconfig" -source "board/ronetix/pm9263/Kconfig" -source "board/ronetix/pm9g45/Kconfig" source "board/samsung/smdk2410/Kconfig" source "board/sandisk/sansa_fuze_plus/Kconfig" source "board/scb9328/Kconfig" source "board/schulercontrol/sc_sps_1/Kconfig" -source "board/siemens/corvus/Kconfig" source "board/siemens/draco/Kconfig" source "board/siemens/pxm2/Kconfig" source "board/siemens/rut/Kconfig" -source "board/siemens/taurus/Kconfig" source "board/silica/pengwyn/Kconfig" source "board/solidrun/hummingboard/Kconfig" source "board/spear/spear300/Kconfig" @@ -1000,7 +850,6 @@ source "board/st/stv0991/Kconfig" source "board/sunxi/Kconfig" source "board/syteco/jadecpu/Kconfig" source "board/syteco/zmx25/Kconfig" -source "board/taskit/stamp9g20/Kconfig" source "board/tbs/tbs2910/Kconfig" source "board/ti/am335x/Kconfig" source "board/ti/am43xx/Kconfig" diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig new file mode 100644 index 0000000000..30945c101b --- /dev/null +++ b/arch/arm/mach-at91/Kconfig @@ -0,0 +1,168 @@ +if ARCH_AT91 + +choice + prompt "Atmel AT91 board select" + +config TARGET_AT91RM9200EK + bool "Atmel AT91RM9200 evaluation kit" + select CPU_ARM920T + +config TARGET_EB_CPUX9K2 + bool "Support eb_cpux9k2" + select CPU_ARM920T + +config TARGET_CPUAT91 + bool "Support cpuat91" + select CPU_ARM920T + +config TARGET_AT91SAM9260EK + bool "Atmel at91sam9260 reference board" + select CPU_ARM926EJS + +config TARGET_ETHERNUT5 + bool "Ethernut5 board" + select CPU_ARM926EJS + +config TARGET_TNY_A9260 + bool "Caloa TNY A9260 board" + select CPU_ARM926EJS + +config TARGET_SNAPPER9260 + bool "Support snapper9260" + select CPU_ARM926EJS + +config TARGET_AFEB9260 + bool "Support afeb9260" + select CPU_ARM926EJS + +config TARGET_AT91SAM9261EK + bool "Atmel at91sam9261 reference board" + select CPU_ARM926EJS + +config TARGET_PM9261 + bool "Ronetix pm9261 board" + select CPU_ARM926EJS + +config TARGET_AT91SAM9263EK + bool "Atmel at91sam9263 reference board" + select CPU_ARM926EJS + +config TARGET_USB_A9263 + bool "Caloa USB A9260 board" + select CPU_ARM926EJS + +config TARGET_PM9263 + bool "Ronetix pm9263 board" + select CPU_ARM926EJS + +config TARGET_SBC35_A9G20 + bool "Support sbc35_a9g20" + select CPU_ARM926EJS + +config TARGET_STAMP9G20 + bool "Support stamp9g20" + select CPU_ARM926EJS + +config TARGET_AT91SAM9M10G45EK + bool "Atmel AT91SAM9M10G45-EK board" + select CPU_ARM926EJS + +config TARGET_PM9G45 + bool "Ronetix pm9g45 board" + select CPU_ARM926EJS + +config TARGET_AT91SAM9N12EK + bool "Atmel AT91SAM9N12-EK board" + select CPU_ARM926EJS + +config TARGET_AT91SAM9RLEK + bool "Atmel at91sam9rl reference board" + select CPU_ARM926EJS + +config TARGET_AT91SAM9X5EK + bool "Atmel AT91SAM9X5-EK board" + select CPU_ARM926EJS + +config TARGET_SAMA5D3_XPLAINED + bool "SAMA5D3 Xplained board" + select CPU_V7 + select SUPPORT_SPL + +config TARGET_SAMA5D3XEK + bool "SAMA5D3X-EK board" + select CPU_V7 + select SUPPORT_SPL + +config TARGET_SAMA5D4_XPLAINED + bool "SAMA5D4 Xplained board" + select CPU_V7 + select SUPPORT_SPL + +config TARGET_SAMA5D4EK + bool "SAMA5D4 Evaluation Kit" + select CPU_V7 + select SUPPORT_SPL + +config TARGET_VL_MA2SC + bool "Support vl_ma2sc" + select CPU_ARM926EJS + +config TARGET_MEESC + bool "Support meesc" + select CPU_ARM926EJS + +config TARGET_OTC570 + bool "Support otc570" + select CPU_ARM926EJS + +config TARGET_CPU9260 + bool "Support cpu9260" + select CPU_ARM926EJS + +config TARGET_CORVUS + bool "Support corvus" + select CPU_ARM926EJS + select SUPPORT_SPL + +config TARGET_TAURUS + bool "Support taurus" + select CPU_ARM926EJS + select SUPPORT_SPL + +endchoice + +config SYS_SOC + default "at91" + +source "board/atmel/at91rm9200ek/Kconfig" +source "board/atmel/at91sam9260ek/Kconfig" +source "board/atmel/at91sam9261ek/Kconfig" +source "board/atmel/at91sam9263ek/Kconfig" +source "board/atmel/at91sam9m10g45ek/Kconfig" +source "board/atmel/at91sam9n12ek/Kconfig" +source "board/atmel/at91sam9rlek/Kconfig" +source "board/atmel/at91sam9x5ek/Kconfig" +source "board/atmel/sama5d3_xplained/Kconfig" +source "board/atmel/sama5d3xek/Kconfig" +source "board/atmel/sama5d4_xplained/Kconfig" +source "board/atmel/sama5d4ek/Kconfig" +source "board/BuS/eb_cpux9k2/Kconfig" +source "board/eukrea/cpuat91/Kconfig" +source "board/afeb9260/Kconfig" +source "board/bluewater/snapper9260/Kconfig" +source "board/BuS/vl_ma2sc/Kconfig" +source "board/calao/sbc35_a9g20/Kconfig" +source "board/calao/tny_a9260/Kconfig" +source "board/calao/usb_a9263/Kconfig" +source "board/egnite/ethernut5/Kconfig" +source "board/esd/meesc/Kconfig" +source "board/esd/otc570/Kconfig" +source "board/eukrea/cpu9260/Kconfig" +source "board/ronetix/pm9261/Kconfig" +source "board/ronetix/pm9263/Kconfig" +source "board/ronetix/pm9g45/Kconfig" +source "board/siemens/corvus/Kconfig" +source "board/siemens/taurus/Kconfig" +source "board/taskit/stamp9g20/Kconfig" + +endif diff --git a/board/BuS/eb_cpux9k2/Kconfig b/board/BuS/eb_cpux9k2/Kconfig index 230e64d8fc..e2a787a1a8 100644 --- a/board/BuS/eb_cpux9k2/Kconfig +++ b/board/BuS/eb_cpux9k2/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "BuS" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "eb_cpux9k2" diff --git a/board/BuS/vl_ma2sc/Kconfig b/board/BuS/vl_ma2sc/Kconfig index 2f43519089..848177f4c4 100644 --- a/board/BuS/vl_ma2sc/Kconfig +++ b/board/BuS/vl_ma2sc/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "BuS" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "vl_ma2sc" diff --git a/board/afeb9260/Kconfig b/board/afeb9260/Kconfig index 6a5a93139d..fb64c9cec7 100644 --- a/board/afeb9260/Kconfig +++ b/board/afeb9260/Kconfig @@ -3,9 +3,6 @@ if TARGET_AFEB9260 config SYS_BOARD default "afeb9260" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "afeb9260" diff --git a/board/atmel/at91rm9200ek/Kconfig b/board/atmel/at91rm9200ek/Kconfig index bad4a37da0..952351dcdb 100644 --- a/board/atmel/at91rm9200ek/Kconfig +++ b/board/atmel/at91rm9200ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91rm9200ek" diff --git a/board/atmel/at91sam9260ek/Kconfig b/board/atmel/at91sam9260ek/Kconfig index fe00ed5e60..3844f086b4 100644 --- a/board/atmel/at91sam9260ek/Kconfig +++ b/board/atmel/at91sam9260ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91sam9260ek" diff --git a/board/atmel/at91sam9261ek/Kconfig b/board/atmel/at91sam9261ek/Kconfig index d839c1a632..2971b3cf9f 100644 --- a/board/atmel/at91sam9261ek/Kconfig +++ b/board/atmel/at91sam9261ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91sam9261ek" diff --git a/board/atmel/at91sam9263ek/Kconfig b/board/atmel/at91sam9263ek/Kconfig index 311c504da2..3f0873fe51 100644 --- a/board/atmel/at91sam9263ek/Kconfig +++ b/board/atmel/at91sam9263ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91sam9263ek" diff --git a/board/atmel/at91sam9m10g45ek/Kconfig b/board/atmel/at91sam9m10g45ek/Kconfig index 1bc086a483..211c411ef6 100644 --- a/board/atmel/at91sam9m10g45ek/Kconfig +++ b/board/atmel/at91sam9m10g45ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91sam9m10g45ek" diff --git a/board/atmel/at91sam9n12ek/Kconfig b/board/atmel/at91sam9n12ek/Kconfig index cf1d1a3670..816003a5de 100644 --- a/board/atmel/at91sam9n12ek/Kconfig +++ b/board/atmel/at91sam9n12ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91sam9n12ek" diff --git a/board/atmel/at91sam9rlek/Kconfig b/board/atmel/at91sam9rlek/Kconfig index 438d300421..81a839ac03 100644 --- a/board/atmel/at91sam9rlek/Kconfig +++ b/board/atmel/at91sam9rlek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91sam9rlek" diff --git a/board/atmel/at91sam9x5ek/Kconfig b/board/atmel/at91sam9x5ek/Kconfig index 5c5ec61577..3f92754fb9 100644 --- a/board/atmel/at91sam9x5ek/Kconfig +++ b/board/atmel/at91sam9x5ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "at91sam9x5ek" diff --git a/board/atmel/sama5d3_xplained/Kconfig b/board/atmel/sama5d3_xplained/Kconfig index 0ba8a7bf93..2df751a264 100644 --- a/board/atmel/sama5d3_xplained/Kconfig +++ b/board/atmel/sama5d3_xplained/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "sama5d3_xplained" diff --git a/board/atmel/sama5d3xek/Kconfig b/board/atmel/sama5d3xek/Kconfig index 2a9ed23ecf..abd1ad81fc 100644 --- a/board/atmel/sama5d3xek/Kconfig +++ b/board/atmel/sama5d3xek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "sama5d3xek" diff --git a/board/atmel/sama5d4_xplained/Kconfig b/board/atmel/sama5d4_xplained/Kconfig index f320a68d30..2cb03cb178 100644 --- a/board/atmel/sama5d4_xplained/Kconfig +++ b/board/atmel/sama5d4_xplained/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "sama5d4_xplained" diff --git a/board/atmel/sama5d4ek/Kconfig b/board/atmel/sama5d4ek/Kconfig index 7dc569c411..1a634032ac 100644 --- a/board/atmel/sama5d4ek/Kconfig +++ b/board/atmel/sama5d4ek/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "atmel" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "sama5d4ek" diff --git a/board/bluewater/snapper9260/Kconfig b/board/bluewater/snapper9260/Kconfig index c896c46895..b8e9cbc585 100644 --- a/board/bluewater/snapper9260/Kconfig +++ b/board/bluewater/snapper9260/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "bluewater" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "snapper9260" diff --git a/board/calao/sbc35_a9g20/Kconfig b/board/calao/sbc35_a9g20/Kconfig index fb5a1a3f42..37ecfb5f7d 100644 --- a/board/calao/sbc35_a9g20/Kconfig +++ b/board/calao/sbc35_a9g20/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "calao" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "sbc35_a9g20" diff --git a/board/calao/tny_a9260/Kconfig b/board/calao/tny_a9260/Kconfig index b1de8f8ba8..2b663298f3 100644 --- a/board/calao/tny_a9260/Kconfig +++ b/board/calao/tny_a9260/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "calao" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "tny_a9260" diff --git a/board/calao/usb_a9263/Kconfig b/board/calao/usb_a9263/Kconfig index 7a159dc3ba..19e446ded5 100644 --- a/board/calao/usb_a9263/Kconfig +++ b/board/calao/usb_a9263/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "calao" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "usb_a9263" diff --git a/board/egnite/ethernut5/Kconfig b/board/egnite/ethernut5/Kconfig index c42c734f1f..5a6c1c5de1 100644 --- a/board/egnite/ethernut5/Kconfig +++ b/board/egnite/ethernut5/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "egnite" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "ethernut5" diff --git a/board/esd/meesc/Kconfig b/board/esd/meesc/Kconfig index 5041041dd2..150348ac34 100644 --- a/board/esd/meesc/Kconfig +++ b/board/esd/meesc/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "esd" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "meesc" diff --git a/board/esd/otc570/Kconfig b/board/esd/otc570/Kconfig index 55a2f70f40..4966f5f755 100644 --- a/board/esd/otc570/Kconfig +++ b/board/esd/otc570/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "esd" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "otc570" diff --git a/board/eukrea/cpu9260/Kconfig b/board/eukrea/cpu9260/Kconfig index 9bd077b1ff..90d2124557 100644 --- a/board/eukrea/cpu9260/Kconfig +++ b/board/eukrea/cpu9260/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "eukrea" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "cpu9260" diff --git a/board/eukrea/cpuat91/Kconfig b/board/eukrea/cpuat91/Kconfig index b69e4c3f82..27b005cdf4 100644 --- a/board/eukrea/cpuat91/Kconfig +++ b/board/eukrea/cpuat91/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "eukrea" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "cpuat91" diff --git a/board/ronetix/pm9261/Kconfig b/board/ronetix/pm9261/Kconfig index a4934c582e..8c54198102 100644 --- a/board/ronetix/pm9261/Kconfig +++ b/board/ronetix/pm9261/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "ronetix" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "pm9261" diff --git a/board/ronetix/pm9263/Kconfig b/board/ronetix/pm9263/Kconfig index 339a6ea169..5b47d34845 100644 --- a/board/ronetix/pm9263/Kconfig +++ b/board/ronetix/pm9263/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "ronetix" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "pm9263" diff --git a/board/ronetix/pm9g45/Kconfig b/board/ronetix/pm9g45/Kconfig index 65fc5c4838..ad5309f816 100644 --- a/board/ronetix/pm9g45/Kconfig +++ b/board/ronetix/pm9g45/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "ronetix" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "pm9g45" diff --git a/board/siemens/corvus/Kconfig b/board/siemens/corvus/Kconfig index 7b505aac36..69fe0f0723 100644 --- a/board/siemens/corvus/Kconfig +++ b/board/siemens/corvus/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "siemens" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "corvus" diff --git a/board/siemens/taurus/Kconfig b/board/siemens/taurus/Kconfig index c07d244bc3..cf71e4ce56 100644 --- a/board/siemens/taurus/Kconfig +++ b/board/siemens/taurus/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "siemens" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "taurus" diff --git a/board/taskit/stamp9g20/Kconfig b/board/taskit/stamp9g20/Kconfig index 3139f9af86..1121dacfc7 100644 --- a/board/taskit/stamp9g20/Kconfig +++ b/board/taskit/stamp9g20/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "taskit" -config SYS_SOC - default "at91" - config SYS_CONFIG_NAME default "stamp9g20" diff --git a/configs/afeb9260_defconfig b/configs/afeb9260_defconfig index 2616d2d027..694d24d888 100644 --- a/configs/afeb9260_defconfig +++ b/configs/afeb9260_defconfig @@ -1,2 +1,3 @@ CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AFEB9260=y diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig index 95b5c2797b..e1fd2ec225 100644 --- a/configs/at91rm9200ek_defconfig +++ b/configs/at91rm9200ek_defconfig @@ -1,2 +1,3 @@ CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91RM9200EK=y diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig index 5039ebc9b9..64f5e54325 100644 --- a/configs/at91rm9200ek_ram_defconfig +++ b/configs/at91rm9200ek_ram_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91RM9200EK=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 7f929c8376..46ce31ba49 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index e2c32bf7c7..9fd40dfd3f 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 1168cace31..98adab2b10 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 486eeb295f..9c311a3a82 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 5f42a90ca5..3711fe4893 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 4d7aa9064e..503f760f11 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index 4dce54e5c6..15925b6574 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index 4dce54e5c6..15925b6574 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 6f60daa9c7..457fb1ab33 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 944c14dde0..e49b17732b 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index b54ef7f0ba..fcd176480a 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9263EK=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 132102db3c..833412261b 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 3dd3f9a817..25626ce2a6 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index a2bd6df384..7ae07940f4 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 4eef04f179..e277557351 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 1a4c505849..29219fb902 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index cf35782ebb..4587f49640 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 1377ad91f4..c9fcc6eac3 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index cfe91273c6..1d60e0abd5 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 1681bc8b71..6949d3a007 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9M10G45EK=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 61ae56e452..30967e39c4 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9M10G45EK=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 71d16588f3..4fc417a4a4 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_MMC" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9N12EK=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 6f677b1744..f908246d3d 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9N12EK=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 7e898f0c43..d106b5a28e 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9N12EK=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index 90516e0c45..ee632d1ea9 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9RLEK=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 0e2edfd0e0..6465f577cd 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9RLEK=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index d00eed5876..15b5fa9f0c 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 64f7af9bab..c8096c22f4 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_MMC" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 47cd1e013b..c2ebb00a97 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 1b7391e096..76f68a6039 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9X5EK=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index ccbccd43c8..1449791b06 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index e8f4cc32c9..b465064446 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 49c5d78778..7e73d48c3c 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 076ad0fe8d..abb64b6def 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_TAURUS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 5d60847523..82be323a79 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_CORVUS=y diff --git a/configs/cpu9260_128M_defconfig b/configs/cpu9260_128M_defconfig index 86fc6bd7c5..6fe59ddcbb 100644 --- a/configs/cpu9260_128M_defconfig +++ b/configs/cpu9260_128M_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9260,CPU9260_128M" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpu9260_defconfig b/configs/cpu9260_defconfig index 10299e3bde..63e7c73c75 100644 --- a/configs/cpu9260_defconfig +++ b/configs/cpu9260_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9260" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpu9260_nand_128M_defconfig b/configs/cpu9260_nand_128M_defconfig index e582a15ce4..11c5bce975 100644 --- a/configs/cpu9260_nand_128M_defconfig +++ b/configs/cpu9260_nand_128M_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9260,CPU9260_128M,NANDBOOT" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpu9260_nand_defconfig b/configs/cpu9260_nand_defconfig index 40988cdf2a..d4d6ec9dbd 100644 --- a/configs/cpu9260_nand_defconfig +++ b/configs/cpu9260_nand_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9260,NANDBOOT" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpu9G20_128M_defconfig b/configs/cpu9G20_128M_defconfig index 4c28d252f9..8d33f082ce 100644 --- a/configs/cpu9G20_128M_defconfig +++ b/configs/cpu9G20_128M_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,CPU9G20_128M" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpu9G20_defconfig b/configs/cpu9G20_defconfig index 468b2c8c9b..fcfebb86d7 100644 --- a/configs/cpu9G20_defconfig +++ b/configs/cpu9G20_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9G20" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpu9G20_nand_128M_defconfig b/configs/cpu9G20_nand_128M_defconfig index a74df9d124..315042d4e7 100644 --- a/configs/cpu9G20_nand_128M_defconfig +++ b/configs/cpu9G20_nand_128M_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,CPU9G20_128M,NANDBOOT" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpu9G20_nand_defconfig b/configs/cpu9G20_nand_defconfig index 11cc276838..c405c5077b 100644 --- a/configs/cpu9G20_nand_defconfig +++ b/configs/cpu9G20_nand_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CPU9G20,NANDBOOT" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPU9260=y diff --git a/configs/cpuat91_defconfig b/configs/cpuat91_defconfig index d25bd3ae78..5a1ef3a3eb 100644 --- a/configs/cpuat91_defconfig +++ b/configs/cpuat91_defconfig @@ -1,2 +1,3 @@ CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPUAT91=y diff --git a/configs/cpuat91_ram_defconfig b/configs/cpuat91_ram_defconfig index f5b722dd4c..275919251a 100644 --- a/configs/cpuat91_ram_defconfig +++ b/configs/cpuat91_ram_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_CPUAT91=y diff --git a/configs/eb_cpux9k2_defconfig b/configs/eb_cpux9k2_defconfig index 5f0ab44f45..257fee5901 100644 --- a/configs/eb_cpux9k2_defconfig +++ b/configs/eb_cpux9k2_defconfig @@ -1,2 +1,3 @@ CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_EB_CPUX9K2=y diff --git a/configs/eb_cpux9k2_ram_defconfig b/configs/eb_cpux9k2_ram_defconfig index c6e8b71773..4393ccce26 100644 --- a/configs/eb_cpux9k2_ram_defconfig +++ b/configs/eb_cpux9k2_ram_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_EB_CPUX9K2=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 5be495cfa3..9a3d40a80f 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_ETHERNUT5=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index fa737ef206..0430d58ba2 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_MEESC=y diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index f58efbbe6c..b8a48f8e2b 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_MEESC=y diff --git a/configs/otc570_dataflash_defconfig b/configs/otc570_dataflash_defconfig index 992d6b649c..7aac6d8fcf 100644 --- a/configs/otc570_dataflash_defconfig +++ b/configs/otc570_dataflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_OTC570=y diff --git a/configs/otc570_defconfig b/configs/otc570_defconfig index 65295cb734..5204245798 100644 --- a/configs/otc570_defconfig +++ b/configs/otc570_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_OTC570=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index b8a02483c1..0c7efc70ae 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_PM9261=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 3a5029a665..6e88046cc7 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_PM9263=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 89297e0dbe..112ad5f784 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_PM9G45=y diff --git a/configs/portuxg20_defconfig b/configs/portuxg20_defconfig index b1634e9a68..9f3a8e18a5 100644 --- a/configs/portuxg20_defconfig +++ b/configs/portuxg20_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,PORTUXG20" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_STAMP9G20=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index a7d791f85c..1d95487b4c 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D3_XPLAINED=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index b97286081e..91dd104cdb 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D3_XPLAINED=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 3f8d997af5..c03106ca08 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D3XEK=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 7a924172fe..54bf79c963 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D3XEK=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index c83a7ab1fb..07bff18fb4 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D3XEK=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 73df28ccff..da5f811f77 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D4_XPLAINED=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 046fe0682e..ea06200509 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D4_XPLAINED=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 755dd8b55f..0408fa4b87 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D4_XPLAINED=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index aafb4c2247..1f66d373c6 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D4EK=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index d430fa768f..c623d9b21c 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D4EK=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 796fa4b15a..3b4e124a5c 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_SAMA5D4EK=y diff --git a/configs/sbc35_a9g20_eeprom_defconfig b/configs/sbc35_a9g20_eeprom_defconfig index aa9cd3e4a0..cd0909c881 100644 --- a/configs/sbc35_a9g20_eeprom_defconfig +++ b/configs/sbc35_a9g20_eeprom_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_EEPROM" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_SBC35_A9G20=y diff --git a/configs/sbc35_a9g20_nandflash_defconfig b/configs/sbc35_a9g20_nandflash_defconfig index fba9f311c6..017346f38c 100644 --- a/configs/sbc35_a9g20_nandflash_defconfig +++ b/configs/sbc35_a9g20_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_SBC35_A9G20=y diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 97c49f3363..3a475053ba 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -1,5 +1,6 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_SNAPPER9260=y CONFIG_DM=y CONFIG_DM_GPIO=y diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index d5f1d9fa19..1f0244b251 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -1,5 +1,6 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_SNAPPER9260=y CONFIG_DM=y CONFIG_DM_GPIO=y diff --git a/configs/stamp9g20_defconfig b/configs/stamp9g20_defconfig index 8c0f874c88..03bf492fcd 100644 --- a/configs/stamp9g20_defconfig +++ b/configs/stamp9g20_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_STAMP9G20=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 438e25d84f..fac3316421 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS" +S:CONFIG_ARM=y ++S:CONFIG_ARCH_AT91=y +S:CONFIG_TARGET_TAURUS=y diff --git a/configs/tny_a9260_eeprom_defconfig b/configs/tny_a9260_eeprom_defconfig index a662669d96..28a1d5e517 100644 --- a/configs/tny_a9260_eeprom_defconfig +++ b/configs/tny_a9260_eeprom_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_EEPROM" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_TNY_A9260=y diff --git a/configs/tny_a9260_nandflash_defconfig b/configs/tny_a9260_nandflash_defconfig index 41fd9c1192..14710c0b29 100644 --- a/configs/tny_a9260_nandflash_defconfig +++ b/configs/tny_a9260_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_TNY_A9260=y diff --git a/configs/tny_a9g20_eeprom_defconfig b/configs/tny_a9g20_eeprom_defconfig index a2eb60ef71..f4023cc55a 100644 --- a/configs/tny_a9g20_eeprom_defconfig +++ b/configs/tny_a9g20_eeprom_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_EEPROM" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_TNY_A9260=y diff --git a/configs/tny_a9g20_nandflash_defconfig b/configs/tny_a9g20_nandflash_defconfig index 60ebfa2512..2452e1ec31 100644 --- a/configs/tny_a9g20_nandflash_defconfig +++ b/configs/tny_a9g20_nandflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_TNY_A9260=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 8c0ac11ed9..ae2b9a14e7 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_USB_A9263=y diff --git a/configs/vl_ma2sc_defconfig b/configs/vl_ma2sc_defconfig index 39cd7258e5..e6478a7dc1 100644 --- a/configs/vl_ma2sc_defconfig +++ b/configs/vl_ma2sc_defconfig @@ -1,2 +1,3 @@ CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_VL_MA2SC=y diff --git a/configs/vl_ma2sc_ram_defconfig b/configs/vl_ma2sc_ram_defconfig index 70a07abe65..fdb262d4c8 100644 --- a/configs/vl_ma2sc_ram_defconfig +++ b/configs/vl_ma2sc_ram_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMLOAD" CONFIG_ARM=y +CONFIG_ARCH_AT91=y CONFIG_TARGET_VL_MA2SC=y From 01f14456306c84f9bcd3945a10c98ae50e30542a Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:02 +0900 Subject: [PATCH 141/222] ARM: prepare for moving SoC sources into mach-* In U-boot, the directory structure, arch/$(ARCH)/cpu/$(CPU)/$(SOC)/ has been adopted except that $(CPU) is missing from some architectures and $(SOC) is missing from some CPUs. This structure did not fit very well in some cases. [1] AT91 AT91 SoC family have been developed across some ARM processor generations. Generally speaking, some IPs are often re-used in the same SoC family (same SoC vendor) even when the main processor is updated. As a result, a SoC-common directory is needed in the upper level. Currently, AT91 source files are placed as follows: arch/arm/cpu/arm920t/at91/* arch/arm/cpu/arm926ejs/at91/* arch/arm/cpu/armv7/at91/* arch/arm/cpu/at91-common/* Once directories are split, the motivation for refactorings across CPU directories is lost. Some files in arm920t/at91/ and arm926ejs/at91/ are so similar that they could be merged. [2] Tegra Tegra is a little bit special case where different CPUs are used for SPL and the main U-boot. To obey the arch/$(ARCH)/cpu/$(CPU)/$(SOC) structure, the source files must be placed across the CPUs, again SoC-common directory is necessary in the upper level. Moreover, there are several families in Tegra: Tegra20, Tegra30, Tegra114, Tegra124. Here again, the tegra-common directory is needed to contain commonly-used files. Tegra directories have been sprinkled in the directory structure. arch/arm/cpu/arm720t/tegra20 arch/arm/cpu/arm720t/tegra30 arch/arm/cpu/arm720t/tegra114 arch/arm/cpu/arm720t/tegra124 arch/arm/cpu/arm720t/tegra-common arch/arm/cpu/armv7/tegra20 arch/arm/cpu/armv7/tegra30 arch/arm/cpu/armv7/tegra114 arch/arm/cpu/armv7/tegra124 arch/arm/cpu/armv7/tegra-common arch/arm/cpu/tegra20-common arch/arm/cpu/tegra30-common arch/arm/cpu/tegra114-common arch/arm/cpu/tegra124-common arch/arm/cpu/tegra-common As you see, splitting SoC code by the CPU is not going well, especially for ARM. Why don't we collect SoC-specific files into a single place? A good example we can follow is Linux's arch/arm/mach-* structure. This item was discussed in the following thread: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/188548/ Looks like I got some positive responses and we are almost ready to start this movement. This commit prepares arch/arm/Makefile for describing machdirs in it. After this commit, we can move SoC directory to arch/arm/mach-$(SOC) in simple steps although some cases such as AT91 and Tegra need more fixes. What we generally have to do is: [1] Move files arch/arm/cpu/$(CPU)/$(SOC)/* to arch/arm/mach-$(SOC)/* [2] Add machine entry into arch/arm/Makefile [3] Remove "obj-y += $(SOC)" from arch/arm/cpu/$(CPU)/Makefile [4] Fix the Kconfig file path in arch/arm/Kconfig [5] Modify MAINTAINERS if necessary Signed-off-by: Masahiro Yamada --- arch/arm/Makefile | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ebb7dc34ac..5da2c231e9 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -2,6 +2,13 @@ # SPDX-License-Identifier: GPL-2.0+ # +# Machine directory name. This list is sorted alphanumerically +# by CONFIG_* macro name. + +machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) + +libs-y += $(machdirs) + head-y := arch/arm/cpu/$(CPU)/start.o ifeq ($(CONFIG_SPL_BUILD),y) @@ -27,3 +34,6 @@ endif ifneq (,$(filter $(SOC), armada-xp kirkwood)) libs-y += arch/arm/mvebu-common/ endif + +# deprecated +-include $(machdirs)/config.mk From 620118403e1521b4c883848a84d2fb68e3fa1aa0 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:03 +0900 Subject: [PATCH 142/222] ARM: at91: collect SoC sources into mach-at91 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit moves source files as follows: arch/arm/cpu/arm920t/at91/* -> arch/arm/mach-at91/arm920t/* arch/arm/cpu/arm926ejs/at91/* -> arch/arm/mach-at91/arm926ejs/* arch/arm/cpu/armv7/at91/* -> arch/arm/mach-at91/armv7/* arch/arm/cpu/at91-common/* -> arch/arm/mach-at91/* Signed-off-by: Masahiro Yamada Acked-by: Andreas Bießmann --- MAINTAINERS | 3 +-- arch/arm/Makefile | 1 + arch/arm/cpu/Makefile | 1 - arch/arm/cpu/arm920t/Makefile | 1 - arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/cpu/arm926ejs/at91/config.mk | 2 -- arch/arm/cpu/armv7/Makefile | 1 - arch/arm/cpu/armv7/at91/config.mk | 8 -------- arch/arm/{cpu/at91-common => mach-at91}/Makefile | 14 ++++---------- .../arm920t/at91 => mach-at91/arm920t}/Makefile | 0 .../arm920t}/at91rm9200_devices.c | 0 .../arm920t/at91 => mach-at91/arm920t}/clock.c | 0 .../{cpu/arm920t/at91 => mach-at91/arm920t}/cpu.c | 0 .../at91 => mach-at91/arm920t}/lowlevel_init.S | 0 .../arm920t/at91 => mach-at91/arm920t}/reset.c | 0 .../arm920t/at91 => mach-at91/arm920t}/timer.c | 0 .../at91 => mach-at91/arm926ejs}/Makefile | 0 .../arm926ejs}/at91sam9260_devices.c | 0 .../arm926ejs}/at91sam9261_devices.c | 0 .../arm926ejs}/at91sam9263_devices.c | 0 .../arm926ejs}/at91sam9m10g45_devices.c | 0 .../arm926ejs}/at91sam9n12_devices.c | 0 .../arm926ejs}/at91sam9rl_devices.c | 0 .../arm926ejs}/at91sam9x5_devices.c | 0 .../arm926ejs/at91 => mach-at91/arm926ejs}/clock.c | 0 .../arm926ejs/at91 => mach-at91/arm926ejs}/cpu.c | 0 .../at91 => mach-at91/arm926ejs}/eflash.c | 0 .../arm926ejs/at91 => mach-at91/arm926ejs}/led.c | 0 .../at91 => mach-at91/arm926ejs}/lowlevel_init.S | 0 .../arm926ejs/at91 => mach-at91/arm926ejs}/reset.c | 0 .../arm926ejs/at91 => mach-at91/arm926ejs}/timer.c | 0 .../{cpu/armv7/at91 => mach-at91/armv7}/Makefile | 0 .../{cpu/armv7/at91 => mach-at91/armv7}/clock.c | 0 arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/cpu.c | 0 .../{cpu/armv7/at91 => mach-at91/armv7}/reset.c | 0 .../at91 => mach-at91/armv7}/sama5d3_devices.c | 0 .../at91 => mach-at91/armv7}/sama5d4_devices.c | 0 .../{cpu/armv7/at91 => mach-at91/armv7}/timer.c | 0 arch/arm/mach-at91/config.mk | 9 +++++++++ arch/arm/{cpu/at91-common => mach-at91}/mpddrc.c | 0 arch/arm/{cpu/at91-common => mach-at91}/phy.c | 0 arch/arm/{cpu/at91-common => mach-at91}/sdram.c | 0 arch/arm/{cpu/at91-common => mach-at91}/spl.c | 0 arch/arm/{cpu/at91-common => mach-at91}/spl_at91.c | 0 .../arm/{cpu/at91-common => mach-at91}/spl_atmel.c | 0 .../{cpu/at91-common => mach-at91}/u-boot-spl.lds | 0 include/configs/sama5d3_xplained.h | 2 +- include/configs/sama5d3xek.h | 2 +- 48 files changed, 17 insertions(+), 28 deletions(-) delete mode 100644 arch/arm/cpu/arm926ejs/at91/config.mk delete mode 100644 arch/arm/cpu/armv7/at91/config.mk rename arch/arm/{cpu/at91-common => mach-at91}/Makefile (58%) rename arch/arm/{cpu/arm920t/at91 => mach-at91/arm920t}/Makefile (100%) rename arch/arm/{cpu/arm920t/at91 => mach-at91/arm920t}/at91rm9200_devices.c (100%) rename arch/arm/{cpu/arm920t/at91 => mach-at91/arm920t}/clock.c (100%) rename arch/arm/{cpu/arm920t/at91 => mach-at91/arm920t}/cpu.c (100%) rename arch/arm/{cpu/arm920t/at91 => mach-at91/arm920t}/lowlevel_init.S (100%) rename arch/arm/{cpu/arm920t/at91 => mach-at91/arm920t}/reset.c (100%) rename arch/arm/{cpu/arm920t/at91 => mach-at91/arm920t}/timer.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/Makefile (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/at91sam9260_devices.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/at91sam9261_devices.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/at91sam9263_devices.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/at91sam9m10g45_devices.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/at91sam9n12_devices.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/at91sam9rl_devices.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/at91sam9x5_devices.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/clock.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/cpu.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/eflash.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/led.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/lowlevel_init.S (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/reset.c (100%) rename arch/arm/{cpu/arm926ejs/at91 => mach-at91/arm926ejs}/timer.c (100%) rename arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/Makefile (100%) rename arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/clock.c (100%) rename arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/cpu.c (100%) rename arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/reset.c (100%) rename arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/sama5d3_devices.c (100%) rename arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/sama5d4_devices.c (100%) rename arch/arm/{cpu/armv7/at91 => mach-at91/armv7}/timer.c (100%) create mode 100644 arch/arm/mach-at91/config.mk rename arch/arm/{cpu/at91-common => mach-at91}/mpddrc.c (100%) rename arch/arm/{cpu/at91-common => mach-at91}/phy.c (100%) rename arch/arm/{cpu/at91-common => mach-at91}/sdram.c (100%) rename arch/arm/{cpu/at91-common => mach-at91}/spl.c (100%) rename arch/arm/{cpu/at91-common => mach-at91}/spl_at91.c (100%) rename arch/arm/{cpu/at91-common => mach-at91}/spl_atmel.c (100%) rename arch/arm/{cpu/at91-common => mach-at91}/u-boot-spl.lds (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 74a56ecf4f..a558bd4fcb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -76,8 +76,7 @@ ARM ATMEL AT91 M: Andreas Bießmann S: Maintained T: git git://git.denx.de/u-boot-atmel.git -F: arch/arm/cpu/armv7/at91/ -F: arch/arm/cpu/at91-common/ +F: arch/arm/mach-at91/ F: arch/arm/include/asm/arch-at91/ ARM FREESCALE IMX diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5da2c231e9..f4e9af6598 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -4,6 +4,7 @@ # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. +machine-$(CONFIG_ARCH_AT91) += at91 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile index 35d8d387bd..ba4f3900f7 100644 --- a/arch/arm/cpu/Makefile +++ b/arch/arm/cpu/Makefile @@ -1,4 +1,3 @@ -obj-$(CONFIG_AT91FAMILY) += at91-common/ obj-$(CONFIG_TEGRA20) += tegra20-common/ obj-$(CONFIG_TEGRA30) += tegra30-common/ obj-$(CONFIG_TEGRA114) += tegra114-common/ diff --git a/arch/arm/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile index a72e5de99e..a16838b479 100644 --- a/arch/arm/cpu/arm920t/Makefile +++ b/arch/arm/cpu/arm920t/Makefile @@ -11,7 +11,6 @@ obj-y += cpu.o obj-$(CONFIG_USE_IRQ) += interrupts.o obj-$(if $(filter a320,$(SOC)),y) += a320/ -obj-$(CONFIG_AT91FAMILY) += at91/ obj-$(CONFIG_EP93XX) += ep93xx/ obj-$(CONFIG_IMX) += imx/ obj-$(CONFIG_KS8695) += ks8695/ diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index adcea9f683..f41357aaeb 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -15,7 +15,6 @@ endif endif obj-$(CONFIG_ARMADA100) += armada100/ -obj-$(CONFIG_AT91FAMILY) += at91/ obj-$(CONFIG_ARCH_DAVINCI) += davinci/ obj-$(CONFIG_KIRKWOOD) += kirkwood/ obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/ diff --git a/arch/arm/cpu/arm926ejs/at91/config.mk b/arch/arm/cpu/arm926ejs/at91/config.mk deleted file mode 100644 index 370630d4de..0000000000 --- a/arch/arm/cpu/arm926ejs/at91/config.mk +++ /dev/null @@ -1,2 +0,0 @@ -PF_CPPFLAGS_TUNE := $(call cc-option,-mtune=arm926ejs,) -PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_TUNE) diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 409e6f5651..6dbca26ceb 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -40,7 +40,6 @@ endif obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/ obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/ -obj-$(CONFIG_AT91FAMILY) += at91/ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ diff --git a/arch/arm/cpu/armv7/at91/config.mk b/arch/arm/cpu/armv7/at91/config.mk deleted file mode 100644 index db6030880f..0000000000 --- a/arch/arm/cpu/armv7/at91/config.mk +++ /dev/null @@ -1,8 +0,0 @@ -# -# Copyright (C) 2014, Andreas Bießmann -# -# SPDX-License-Identifier: GPL-2.0+ -# -ifndef CONFIG_SPL_BUILD -ALL-y += u-boot.img -endif diff --git a/arch/arm/cpu/at91-common/Makefile b/arch/arm/mach-at91/Makefile similarity index 58% rename from arch/arm/cpu/at91-common/Makefile rename to arch/arm/mach-at91/Makefile index 03614d4140..e596ba6ce8 100644 --- a/arch/arm/cpu/at91-common/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -1,13 +1,3 @@ -# -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2013 Atmel Corporation -# Bo Shen -# -# SPDX-License-Identifier: GPL-2.0+ -# - obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o ifneq ($(CONFIG_SPL_BUILD),) obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o @@ -16,3 +6,7 @@ obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o obj-y += spl.o endif + +obj-$(CONFIG_CPU_ARM920T) += arm920t/ +obj-$(CONFIG_CPU_ARM926EJS) += arm926ejs/ +obj-$(CONFIG_CPU_V7) += armv7/ diff --git a/arch/arm/cpu/arm920t/at91/Makefile b/arch/arm/mach-at91/arm920t/Makefile similarity index 100% rename from arch/arm/cpu/arm920t/at91/Makefile rename to arch/arm/mach-at91/arm920t/Makefile diff --git a/arch/arm/cpu/arm920t/at91/at91rm9200_devices.c b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c similarity index 100% rename from arch/arm/cpu/arm920t/at91/at91rm9200_devices.c rename to arch/arm/mach-at91/arm920t/at91rm9200_devices.c diff --git a/arch/arm/cpu/arm920t/at91/clock.c b/arch/arm/mach-at91/arm920t/clock.c similarity index 100% rename from arch/arm/cpu/arm920t/at91/clock.c rename to arch/arm/mach-at91/arm920t/clock.c diff --git a/arch/arm/cpu/arm920t/at91/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c similarity index 100% rename from arch/arm/cpu/arm920t/at91/cpu.c rename to arch/arm/mach-at91/arm920t/cpu.c diff --git a/arch/arm/cpu/arm920t/at91/lowlevel_init.S b/arch/arm/mach-at91/arm920t/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/arm920t/at91/lowlevel_init.S rename to arch/arm/mach-at91/arm920t/lowlevel_init.S diff --git a/arch/arm/cpu/arm920t/at91/reset.c b/arch/arm/mach-at91/arm920t/reset.c similarity index 100% rename from arch/arm/cpu/arm920t/at91/reset.c rename to arch/arm/mach-at91/arm920t/reset.c diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/mach-at91/arm920t/timer.c similarity index 100% rename from arch/arm/cpu/arm920t/at91/timer.c rename to arch/arm/mach-at91/arm920t/timer.c diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/mach-at91/arm926ejs/Makefile similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/Makefile rename to arch/arm/mach-at91/arm926ejs/Makefile diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c rename to arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c rename to arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c rename to arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c rename to arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c rename to arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c rename to arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c rename to arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/clock.c rename to arch/arm/mach-at91/arm926ejs/clock.c diff --git a/arch/arm/cpu/arm926ejs/at91/cpu.c b/arch/arm/mach-at91/arm926ejs/cpu.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/cpu.c rename to arch/arm/mach-at91/arm926ejs/cpu.c diff --git a/arch/arm/cpu/arm926ejs/at91/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/eflash.c rename to arch/arm/mach-at91/arm926ejs/eflash.c diff --git a/arch/arm/cpu/arm926ejs/at91/led.c b/arch/arm/mach-at91/arm926ejs/led.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/led.c rename to arch/arm/mach-at91/arm926ejs/led.c diff --git a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/lowlevel_init.S rename to arch/arm/mach-at91/arm926ejs/lowlevel_init.S diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/mach-at91/arm926ejs/reset.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/reset.c rename to arch/arm/mach-at91/arm926ejs/reset.c diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/mach-at91/arm926ejs/timer.c similarity index 100% rename from arch/arm/cpu/arm926ejs/at91/timer.c rename to arch/arm/mach-at91/arm926ejs/timer.c diff --git a/arch/arm/cpu/armv7/at91/Makefile b/arch/arm/mach-at91/armv7/Makefile similarity index 100% rename from arch/arm/cpu/armv7/at91/Makefile rename to arch/arm/mach-at91/armv7/Makefile diff --git a/arch/arm/cpu/armv7/at91/clock.c b/arch/arm/mach-at91/armv7/clock.c similarity index 100% rename from arch/arm/cpu/armv7/at91/clock.c rename to arch/arm/mach-at91/armv7/clock.c diff --git a/arch/arm/cpu/armv7/at91/cpu.c b/arch/arm/mach-at91/armv7/cpu.c similarity index 100% rename from arch/arm/cpu/armv7/at91/cpu.c rename to arch/arm/mach-at91/armv7/cpu.c diff --git a/arch/arm/cpu/armv7/at91/reset.c b/arch/arm/mach-at91/armv7/reset.c similarity index 100% rename from arch/arm/cpu/armv7/at91/reset.c rename to arch/arm/mach-at91/armv7/reset.c diff --git a/arch/arm/cpu/armv7/at91/sama5d3_devices.c b/arch/arm/mach-at91/armv7/sama5d3_devices.c similarity index 100% rename from arch/arm/cpu/armv7/at91/sama5d3_devices.c rename to arch/arm/mach-at91/armv7/sama5d3_devices.c diff --git a/arch/arm/cpu/armv7/at91/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c similarity index 100% rename from arch/arm/cpu/armv7/at91/sama5d4_devices.c rename to arch/arm/mach-at91/armv7/sama5d4_devices.c diff --git a/arch/arm/cpu/armv7/at91/timer.c b/arch/arm/mach-at91/armv7/timer.c similarity index 100% rename from arch/arm/cpu/armv7/at91/timer.c rename to arch/arm/mach-at91/armv7/timer.c diff --git a/arch/arm/mach-at91/config.mk b/arch/arm/mach-at91/config.mk new file mode 100644 index 0000000000..7168abbd58 --- /dev/null +++ b/arch/arm/mach-at91/config.mk @@ -0,0 +1,9 @@ +ifeq ($(CONFIG_CPU_ARM926EJS),y) +PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) +endif + +ifeq ($(CONFIG_CPU_V7),y) +ifndef CONFIG_SPL_BUILD +ALL-y += u-boot.img +endif +endif diff --git a/arch/arm/cpu/at91-common/mpddrc.c b/arch/arm/mach-at91/mpddrc.c similarity index 100% rename from arch/arm/cpu/at91-common/mpddrc.c rename to arch/arm/mach-at91/mpddrc.c diff --git a/arch/arm/cpu/at91-common/phy.c b/arch/arm/mach-at91/phy.c similarity index 100% rename from arch/arm/cpu/at91-common/phy.c rename to arch/arm/mach-at91/phy.c diff --git a/arch/arm/cpu/at91-common/sdram.c b/arch/arm/mach-at91/sdram.c similarity index 100% rename from arch/arm/cpu/at91-common/sdram.c rename to arch/arm/mach-at91/sdram.c diff --git a/arch/arm/cpu/at91-common/spl.c b/arch/arm/mach-at91/spl.c similarity index 100% rename from arch/arm/cpu/at91-common/spl.c rename to arch/arm/mach-at91/spl.c diff --git a/arch/arm/cpu/at91-common/spl_at91.c b/arch/arm/mach-at91/spl_at91.c similarity index 100% rename from arch/arm/cpu/at91-common/spl_at91.c rename to arch/arm/mach-at91/spl_at91.c diff --git a/arch/arm/cpu/at91-common/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c similarity index 100% rename from arch/arm/cpu/at91-common/spl_atmel.c rename to arch/arm/mach-at91/spl_atmel.c diff --git a/arch/arm/cpu/at91-common/u-boot-spl.lds b/arch/arm/mach-at91/u-boot-spl.lds similarity index 100% rename from arch/arm/cpu/at91-common/u-boot-spl.lds rename to arch/arm/mach-at91/u-boot-spl.lds diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 5a0ab284ab..5dab61d56d 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -227,7 +227,7 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) #ifdef CONFIG_SYS_USE_MMC -#define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds +#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/u-boot-spl.lds #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index cccc1edbb8..bd288beaeb 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -274,7 +274,7 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) #ifdef CONFIG_SYS_USE_MMC -#define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds +#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/u-boot-spl.lds #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 From 09f455dca74973ef5e42311162c8dff7e83d44a2 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:04 +0900 Subject: [PATCH 143/222] ARM: tegra: collect SoC sources into mach-tegra This commit moves files as follows: arch/arm/cpu/arm720t/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/arm720t/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/arm720t/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/arm720t/tegra124* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/arm720t/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/armv7/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/armv7/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/armv7/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/armv7/tegra124/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/armv7/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/tegra20-common/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/tegra30-common/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/tegra114-common/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/tegra124-common/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/tegra-common/* -> arch/arm/mach-tegra/* Signed-off-by: Masahiro Yamada Tested-by: Simon Glass [ on nyan-big ] Cc: Stephen Warren Cc: Tom Warren --- MAINTAINERS | 4 +--- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 2 ++ arch/arm/cpu/Makefile | 6 +----- arch/arm/cpu/arm720t/Makefile | 6 ------ arch/arm/cpu/arm720t/tegra-common/Makefile | 11 ---------- arch/arm/cpu/arm720t/tegra114/Makefile | 21 ------------------- arch/arm/cpu/arm720t/tegra124/Makefile | 8 ------- arch/arm/cpu/arm720t/tegra20/Makefile | 10 --------- arch/arm/cpu/arm720t/tegra30/Makefile | 20 ------------------ arch/arm/cpu/armv7/Makefile | 2 -- arch/arm/cpu/armv7/tegra-common/Makefile | 10 --------- arch/arm/cpu/armv7/tegra20/Makefile | 11 ---------- .../armv7/tegra-common => mach-tegra}/Kconfig | 8 +++---- .../{cpu/tegra-common => mach-tegra}/Makefile | 12 +++++++++++ .../arm/{cpu/tegra-common => mach-tegra}/ap.c | 0 .../{cpu/tegra-common => mach-tegra}/board.c | 0 .../{cpu/tegra-common => mach-tegra}/cache.c | 0 .../{cpu/tegra-common => mach-tegra}/clock.c | 0 .../cmd_enterrcm.c | 0 .../arm720t/tegra-common => mach-tegra}/cpu.c | 0 .../arm720t/tegra-common => mach-tegra}/cpu.h | 0 .../lowlevel_init.S | 0 .../pinmux-common.c | 0 .../tegra-common => mach-tegra}/powergate.c | 0 .../arm720t/tegra-common => mach-tegra}/spl.c | 0 .../tegra-common => mach-tegra}/sys_info.c | 0 .../armv7 => mach-tegra}/tegra114/Kconfig | 0 .../tegra114}/Makefile | 5 ++--- .../tegra114}/clock.c | 0 .../arm720t => mach-tegra}/tegra114/cpu.c | 2 +- .../tegra114}/funcmux.c | 0 .../tegra114}/pinmux.c | 0 .../armv7 => mach-tegra}/tegra124/Kconfig | 0 .../tegra124}/Makefile | 2 ++ .../tegra124}/clock.c | 0 .../arm720t => mach-tegra}/tegra124/cpu.c | 2 +- .../tegra124}/funcmux.c | 0 .../tegra124}/pinmux.c | 0 .../tegra124}/xusb-padctl.c | 0 .../{cpu/armv7 => mach-tegra}/tegra20/Kconfig | 0 .../tegra20}/Makefile | 10 ++++++--- .../tegra20}/clock.c | 0 .../{cpu/arm720t => mach-tegra}/tegra20/cpu.c | 2 +- .../tegra20}/crypto.c | 0 .../tegra20}/crypto.h | 0 .../armv7 => mach-tegra}/tegra20/display.c | 0 .../tegra20}/emc.c | 0 .../tegra20}/funcmux.c | 0 .../tegra20}/pinmux.c | 0 .../tegra20}/pmu.c | 0 .../{cpu/armv7 => mach-tegra}/tegra20/pwm.c | 0 .../tegra20}/warmboot.c | 0 .../tegra20}/warmboot_avp.c | 0 .../tegra20}/warmboot_avp.h | 0 .../{cpu/armv7 => mach-tegra}/tegra30/Kconfig | 0 .../tegra30}/Makefile | 5 ++--- .../tegra30}/clock.c | 0 .../{cpu/arm720t => mach-tegra}/tegra30/cpu.c | 2 +- .../tegra30}/funcmux.c | 0 .../tegra30}/pinmux.c | 0 .../{cpu/tegra-common => mach-tegra}/vpr.c | 0 .../tegra-common => mach-tegra}/xusb-padctl.c | 0 63 files changed, 38 insertions(+), 125 deletions(-) delete mode 100644 arch/arm/cpu/arm720t/tegra-common/Makefile delete mode 100644 arch/arm/cpu/arm720t/tegra114/Makefile delete mode 100644 arch/arm/cpu/arm720t/tegra124/Makefile delete mode 100644 arch/arm/cpu/arm720t/tegra20/Makefile delete mode 100644 arch/arm/cpu/arm720t/tegra30/Makefile delete mode 100644 arch/arm/cpu/armv7/tegra-common/Makefile delete mode 100644 arch/arm/cpu/armv7/tegra20/Makefile rename arch/arm/{cpu/armv7/tegra-common => mach-tegra}/Kconfig (76%) rename arch/arm/{cpu/tegra-common => mach-tegra}/Makefile (61%) rename arch/arm/{cpu/tegra-common => mach-tegra}/ap.c (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/board.c (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/cache.c (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/clock.c (100%) rename arch/arm/{cpu/armv7/tegra-common => mach-tegra}/cmd_enterrcm.c (100%) rename arch/arm/{cpu/arm720t/tegra-common => mach-tegra}/cpu.c (100%) rename arch/arm/{cpu/arm720t/tegra-common => mach-tegra}/cpu.h (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/lowlevel_init.S (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/pinmux-common.c (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/powergate.c (100%) rename arch/arm/{cpu/arm720t/tegra-common => mach-tegra}/spl.c (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/sys_info.c (100%) rename arch/arm/{cpu/armv7 => mach-tegra}/tegra114/Kconfig (100%) rename arch/arm/{cpu/tegra114-common => mach-tegra/tegra114}/Makefile (89%) rename arch/arm/{cpu/tegra114-common => mach-tegra/tegra114}/clock.c (100%) rename arch/arm/{cpu/arm720t => mach-tegra}/tegra114/cpu.c (99%) rename arch/arm/{cpu/tegra114-common => mach-tegra/tegra114}/funcmux.c (100%) rename arch/arm/{cpu/tegra114-common => mach-tegra/tegra114}/pinmux.c (100%) rename arch/arm/{cpu/armv7 => mach-tegra}/tegra124/Kconfig (100%) rename arch/arm/{cpu/tegra124-common => mach-tegra/tegra124}/Makefile (84%) rename arch/arm/{cpu/tegra124-common => mach-tegra/tegra124}/clock.c (100%) rename arch/arm/{cpu/arm720t => mach-tegra}/tegra124/cpu.c (99%) rename arch/arm/{cpu/tegra124-common => mach-tegra/tegra124}/funcmux.c (100%) rename arch/arm/{cpu/tegra124-common => mach-tegra/tegra124}/pinmux.c (100%) rename arch/arm/{cpu/tegra124-common => mach-tegra/tegra124}/xusb-padctl.c (100%) rename arch/arm/{cpu/armv7 => mach-tegra}/tegra20/Kconfig (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/Makefile (77%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/clock.c (100%) rename arch/arm/{cpu/arm720t => mach-tegra}/tegra20/cpu.c (98%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/crypto.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/crypto.h (100%) rename arch/arm/{cpu/armv7 => mach-tegra}/tegra20/display.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/emc.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/funcmux.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/pinmux.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/pmu.c (100%) rename arch/arm/{cpu/armv7 => mach-tegra}/tegra20/pwm.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/warmboot.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/warmboot_avp.c (100%) rename arch/arm/{cpu/tegra20-common => mach-tegra/tegra20}/warmboot_avp.h (100%) rename arch/arm/{cpu/armv7 => mach-tegra}/tegra30/Kconfig (100%) rename arch/arm/{cpu/tegra30-common => mach-tegra/tegra30}/Makefile (89%) rename arch/arm/{cpu/tegra30-common => mach-tegra/tegra30}/clock.c (100%) rename arch/arm/{cpu/arm720t => mach-tegra}/tegra30/cpu.c (99%) rename arch/arm/{cpu/tegra30-common => mach-tegra/tegra30}/funcmux.c (100%) rename arch/arm/{cpu/tegra30-common => mach-tegra/tegra30}/pinmux.c (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/vpr.c (100%) rename arch/arm/{cpu/tegra-common => mach-tegra}/xusb-padctl.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index a558bd4fcb..63085fc16d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -146,9 +146,7 @@ ARM TEGRA M: Tom Warren S: Maintained T: git git://git.denx.de/u-boot-tegra.git -F: arch/arm/cpu/arm720t/tegra*/ -F: arch/arm/cpu/armv7/tegra*/ -F: arch/arm/cpu/tegra*/ +F: arch/arm/mach-tegra/ F: arch/arm/include/asm/arch-tegra*/ ARM TI diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 06c34682c4..adecafcad1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -742,7 +742,7 @@ source "arch/arm/cpu/armv7/rmobile/Kconfig" source "arch/arm/cpu/armv7/s5pc1xx/Kconfig" -source "arch/arm/cpu/armv7/tegra-common/Kconfig" +source "arch/arm/mach-tegra/Kconfig" source "arch/arm/cpu/armv7/uniphier/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index f4e9af6598..f1ae929154 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -5,6 +5,8 @@ # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 +# TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA +machine-$(CONFIG_TEGRA) += tegra machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile index ba4f3900f7..6bea3d3a2d 100644 --- a/arch/arm/cpu/Makefile +++ b/arch/arm/cpu/Makefile @@ -1,5 +1 @@ -obj-$(CONFIG_TEGRA20) += tegra20-common/ -obj-$(CONFIG_TEGRA30) += tegra30-common/ -obj-$(CONFIG_TEGRA114) += tegra114-common/ -obj-$(CONFIG_TEGRA124) += tegra124-common/ -obj-$(CONFIG_TEGRA) += tegra-common/ +obj- += dummy.o diff --git a/arch/arm/cpu/arm720t/Makefile b/arch/arm/cpu/arm720t/Makefile index 9f61ea2516..243a123378 100644 --- a/arch/arm/cpu/arm720t/Makefile +++ b/arch/arm/cpu/arm720t/Makefile @@ -7,9 +7,3 @@ extra-y = start.o obj-y = interrupts.o cpu.o - -obj-$(CONFIG_TEGRA) += tegra-common/ -obj-$(CONFIG_TEGRA20) += tegra20/ -obj-$(CONFIG_TEGRA30) += tegra30/ -obj-$(CONFIG_TEGRA114) += tegra114/ -obj-$(CONFIG_TEGRA124) += tegra124/ diff --git a/arch/arm/cpu/arm720t/tegra-common/Makefile b/arch/arm/cpu/arm720t/tegra-common/Makefile deleted file mode 100644 index a9c2b675ae..0000000000 --- a/arch/arm/cpu/arm720t/tegra-common/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2010,2011 Nvidia Corporation. -# -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-$(CONFIG_SPL_BUILD) += spl.o -obj-y += cpu.o diff --git a/arch/arm/cpu/arm720t/tegra114/Makefile b/arch/arm/cpu/arm720t/tegra114/Makefile deleted file mode 100644 index ea3e55ea62..0000000000 --- a/arch/arm/cpu/arm720t/tegra114/Makefile +++ /dev/null @@ -1,21 +0,0 @@ -# -# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -# more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# - -#obj-y += cpu.o t11x.o -obj-y += cpu.o diff --git a/arch/arm/cpu/arm720t/tegra124/Makefile b/arch/arm/cpu/arm720t/tegra124/Makefile deleted file mode 100644 index 61abf45d3d..0000000000 --- a/arch/arm/cpu/arm720t/tegra124/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2013-2014 -# NVIDIA Corporation -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += cpu.o diff --git a/arch/arm/cpu/arm720t/tegra20/Makefile b/arch/arm/cpu/arm720t/tegra20/Makefile deleted file mode 100644 index 12243fa9be..0000000000 --- a/arch/arm/cpu/arm720t/tegra20/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2010,2011 Nvidia Corporation. -# -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += cpu.o diff --git a/arch/arm/cpu/arm720t/tegra30/Makefile b/arch/arm/cpu/arm720t/tegra30/Makefile deleted file mode 100644 index 6ff4c55213..0000000000 --- a/arch/arm/cpu/arm720t/tegra30/Makefile +++ /dev/null @@ -1,20 +0,0 @@ -# -# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -# more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# - -obj-y += cpu.o diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 6dbca26ceb..91e69233c3 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -32,7 +32,6 @@ obj-$(CONFIG_IPROC) += iproc-common/ obj-$(CONFIG_KONA) += kona-common/ obj-$(CONFIG_OMAP_COMMON) += omap-common/ obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o -obj-$(CONFIG_TEGRA) += tegra-common/ ifneq (,$(filter s5pc1xx exynos,$(SOC))) obj-y += s5p-common/ @@ -57,7 +56,6 @@ obj-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx/ obj-$(CONFIG_SOCFPGA) += socfpga/ obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ -obj-$(CONFIG_TEGRA20) += tegra20/ obj-$(CONFIG_U8500) += u8500/ obj-$(CONFIG_ARCH_UNIPHIER) += uniphier/ obj-$(CONFIG_VF610) += vf610/ diff --git a/arch/arm/cpu/armv7/tegra-common/Makefile b/arch/arm/cpu/armv7/tegra-common/Makefile deleted file mode 100644 index 463c260f18..0000000000 --- a/arch/arm/cpu/armv7/tegra-common/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2010,2011 Nvidia Corporation. -# -# (C) Copyright 2000-2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o diff --git a/arch/arm/cpu/armv7/tegra20/Makefile b/arch/arm/cpu/armv7/tegra20/Makefile deleted file mode 100644 index 9b4295c72d..0000000000 --- a/arch/arm/cpu/armv7/tegra20/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2010,2011 Nvidia Corporation. -# -# (C) Copyright 2000-2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-$(CONFIG_PWM_TEGRA) += pwm.o -obj-$(CONFIG_VIDEO_TEGRA) += display.o diff --git a/arch/arm/cpu/armv7/tegra-common/Kconfig b/arch/arm/mach-tegra/Kconfig similarity index 76% rename from arch/arm/cpu/armv7/tegra-common/Kconfig rename to arch/arm/mach-tegra/Kconfig index ee3246929a..3a8e2b19d6 100644 --- a/arch/arm/cpu/armv7/tegra-common/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -44,9 +44,9 @@ config DM_I2C config DM_GPIO default y if !SPL_BUILD -source "arch/arm/cpu/armv7/tegra20/Kconfig" -source "arch/arm/cpu/armv7/tegra30/Kconfig" -source "arch/arm/cpu/armv7/tegra114/Kconfig" -source "arch/arm/cpu/armv7/tegra124/Kconfig" +source "arch/arm/mach-tegra/tegra20/Kconfig" +source "arch/arm/mach-tegra/tegra30/Kconfig" +source "arch/arm/mach-tegra/tegra114/Kconfig" +source "arch/arm/mach-tegra/tegra124/Kconfig" endif diff --git a/arch/arm/cpu/tegra-common/Makefile b/arch/arm/mach-tegra/Makefile similarity index 61% rename from arch/arm/cpu/tegra-common/Makefile rename to arch/arm/mach-tegra/Makefile index a78869ee23..04cef0a252 100644 --- a/arch/arm/cpu/tegra-common/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -7,6 +7,13 @@ # SPDX-License-Identifier: GPL-2.0+ # +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +obj-y += cpu.o +else +obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o +endif + obj-y += ap.o obj-y += board.o obj-y += cache.o @@ -17,3 +24,8 @@ obj-y += powergate.o obj-y += xusb-padctl.o obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o obj-$(CONFIG_TEGRA124) += vpr.o + +obj-$(CONFIG_TEGRA20) += tegra20/ +obj-$(CONFIG_TEGRA30) += tegra30/ +obj-$(CONFIG_TEGRA114) += tegra114/ +obj-$(CONFIG_TEGRA124) += tegra124/ diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/mach-tegra/ap.c similarity index 100% rename from arch/arm/cpu/tegra-common/ap.c rename to arch/arm/mach-tegra/ap.c diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/mach-tegra/board.c similarity index 100% rename from arch/arm/cpu/tegra-common/board.c rename to arch/arm/mach-tegra/board.c diff --git a/arch/arm/cpu/tegra-common/cache.c b/arch/arm/mach-tegra/cache.c similarity index 100% rename from arch/arm/cpu/tegra-common/cache.c rename to arch/arm/mach-tegra/cache.c diff --git a/arch/arm/cpu/tegra-common/clock.c b/arch/arm/mach-tegra/clock.c similarity index 100% rename from arch/arm/cpu/tegra-common/clock.c rename to arch/arm/mach-tegra/clock.c diff --git a/arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c similarity index 100% rename from arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c rename to arch/arm/mach-tegra/cmd_enterrcm.c diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c b/arch/arm/mach-tegra/cpu.c similarity index 100% rename from arch/arm/cpu/arm720t/tegra-common/cpu.c rename to arch/arm/mach-tegra/cpu.c diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.h b/arch/arm/mach-tegra/cpu.h similarity index 100% rename from arch/arm/cpu/arm720t/tegra-common/cpu.h rename to arch/arm/mach-tegra/cpu.h diff --git a/arch/arm/cpu/tegra-common/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/tegra-common/lowlevel_init.S rename to arch/arm/mach-tegra/lowlevel_init.S diff --git a/arch/arm/cpu/tegra-common/pinmux-common.c b/arch/arm/mach-tegra/pinmux-common.c similarity index 100% rename from arch/arm/cpu/tegra-common/pinmux-common.c rename to arch/arm/mach-tegra/pinmux-common.c diff --git a/arch/arm/cpu/tegra-common/powergate.c b/arch/arm/mach-tegra/powergate.c similarity index 100% rename from arch/arm/cpu/tegra-common/powergate.c rename to arch/arm/mach-tegra/powergate.c diff --git a/arch/arm/cpu/arm720t/tegra-common/spl.c b/arch/arm/mach-tegra/spl.c similarity index 100% rename from arch/arm/cpu/arm720t/tegra-common/spl.c rename to arch/arm/mach-tegra/spl.c diff --git a/arch/arm/cpu/tegra-common/sys_info.c b/arch/arm/mach-tegra/sys_info.c similarity index 100% rename from arch/arm/cpu/tegra-common/sys_info.c rename to arch/arm/mach-tegra/sys_info.c diff --git a/arch/arm/cpu/armv7/tegra114/Kconfig b/arch/arm/mach-tegra/tegra114/Kconfig similarity index 100% rename from arch/arm/cpu/armv7/tegra114/Kconfig rename to arch/arm/mach-tegra/tegra114/Kconfig diff --git a/arch/arm/cpu/tegra114-common/Makefile b/arch/arm/mach-tegra/tegra114/Makefile similarity index 89% rename from arch/arm/cpu/tegra114-common/Makefile rename to arch/arm/mach-tegra/tegra114/Makefile index d959b575ce..7489f5f146 100644 --- a/arch/arm/cpu/tegra114-common/Makefile +++ b/arch/arm/mach-tegra/tegra114/Makefile @@ -1,9 +1,6 @@ # # Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. # -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# # This program is free software; you can redistribute it and/or modify it # under the terms and conditions of the GNU General Public License, # version 2, as published by the Free Software Foundation. @@ -17,4 +14,6 @@ # along with this program. If not, see . # +obj-$(CONFIG_SPL_BUILD) += cpu.o + obj-y += clock.o funcmux.o pinmux.o diff --git a/arch/arm/cpu/tegra114-common/clock.c b/arch/arm/mach-tegra/tegra114/clock.c similarity index 100% rename from arch/arm/cpu/tegra114-common/clock.c rename to arch/arm/mach-tegra/tegra114/clock.c diff --git a/arch/arm/cpu/arm720t/tegra114/cpu.c b/arch/arm/mach-tegra/tegra114/cpu.c similarity index 99% rename from arch/arm/cpu/arm720t/tegra114/cpu.c rename to arch/arm/mach-tegra/tegra114/cpu.c index 5ed3bb9d9a..18dc1af1b4 100644 --- a/arch/arm/cpu/arm720t/tegra114/cpu.c +++ b/arch/arm/mach-tegra/tegra114/cpu.c @@ -22,7 +22,7 @@ #include #include #include -#include "../tegra-common/cpu.h" +#include "../cpu.h" /* Tegra114-specific CPU init code */ static void enable_cpu_power_rail(void) diff --git a/arch/arm/cpu/tegra114-common/funcmux.c b/arch/arm/mach-tegra/tegra114/funcmux.c similarity index 100% rename from arch/arm/cpu/tegra114-common/funcmux.c rename to arch/arm/mach-tegra/tegra114/funcmux.c diff --git a/arch/arm/cpu/tegra114-common/pinmux.c b/arch/arm/mach-tegra/tegra114/pinmux.c similarity index 100% rename from arch/arm/cpu/tegra114-common/pinmux.c rename to arch/arm/mach-tegra/tegra114/pinmux.c diff --git a/arch/arm/cpu/armv7/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig similarity index 100% rename from arch/arm/cpu/armv7/tegra124/Kconfig rename to arch/arm/mach-tegra/tegra124/Kconfig diff --git a/arch/arm/cpu/tegra124-common/Makefile b/arch/arm/mach-tegra/tegra124/Makefile similarity index 84% rename from arch/arm/cpu/tegra124-common/Makefile rename to arch/arm/mach-tegra/tegra124/Makefile index 7b59fb1216..ef2da29f30 100644 --- a/arch/arm/cpu/tegra124-common/Makefile +++ b/arch/arm/mach-tegra/tegra124/Makefile @@ -5,6 +5,8 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_SPL_BUILD) += cpu.o + obj-y += clock.o obj-y += funcmux.o obj-y += pinmux.o diff --git a/arch/arm/cpu/tegra124-common/clock.c b/arch/arm/mach-tegra/tegra124/clock.c similarity index 100% rename from arch/arm/cpu/tegra124-common/clock.c rename to arch/arm/mach-tegra/tegra124/clock.c diff --git a/arch/arm/cpu/arm720t/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c similarity index 99% rename from arch/arm/cpu/arm720t/tegra124/cpu.c rename to arch/arm/mach-tegra/tegra124/cpu.c index 6ff6aeb546..974f203f12 100644 --- a/arch/arm/cpu/arm720t/tegra124/cpu.c +++ b/arch/arm/mach-tegra/tegra124/cpu.c @@ -15,7 +15,7 @@ #include #include #include -#include "../tegra-common/cpu.h" +#include "../cpu.h" /* Tegra124-specific CPU init code */ diff --git a/arch/arm/cpu/tegra124-common/funcmux.c b/arch/arm/mach-tegra/tegra124/funcmux.c similarity index 100% rename from arch/arm/cpu/tegra124-common/funcmux.c rename to arch/arm/mach-tegra/tegra124/funcmux.c diff --git a/arch/arm/cpu/tegra124-common/pinmux.c b/arch/arm/mach-tegra/tegra124/pinmux.c similarity index 100% rename from arch/arm/cpu/tegra124-common/pinmux.c rename to arch/arm/mach-tegra/tegra124/pinmux.c diff --git a/arch/arm/cpu/tegra124-common/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c similarity index 100% rename from arch/arm/cpu/tegra124-common/xusb-padctl.c rename to arch/arm/mach-tegra/tegra124/xusb-padctl.c diff --git a/arch/arm/cpu/armv7/tegra20/Kconfig b/arch/arm/mach-tegra/tegra20/Kconfig similarity index 100% rename from arch/arm/cpu/armv7/tegra20/Kconfig rename to arch/arm/mach-tegra/tegra20/Kconfig diff --git a/arch/arm/cpu/tegra20-common/Makefile b/arch/arm/mach-tegra/tegra20/Makefile similarity index 77% rename from arch/arm/cpu/tegra20-common/Makefile rename to arch/arm/mach-tegra/tegra20/Makefile index 0e4b3fc1dd..d48f9bb325 100644 --- a/arch/arm/cpu/tegra20-common/Makefile +++ b/arch/arm/mach-tegra/tegra20/Makefile @@ -1,12 +1,16 @@ # # (C) Copyright 2010,2011 Nvidia Corporation. # -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# # SPDX-License-Identifier: GPL-2.0+ # +ifdef CONFIG_SPL_BUILD +obj-y += cpu.o +else +obj-$(CONFIG_PWM_TEGRA) += pwm.o +obj-$(CONFIG_VIDEO_TEGRA) += display.o +endif + # The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. CFLAGS_warmboot_avp.o += -march=armv4t diff --git a/arch/arm/cpu/tegra20-common/clock.c b/arch/arm/mach-tegra/tegra20/clock.c similarity index 100% rename from arch/arm/cpu/tegra20-common/clock.c rename to arch/arm/mach-tegra/tegra20/clock.c diff --git a/arch/arm/cpu/arm720t/tegra20/cpu.c b/arch/arm/mach-tegra/tegra20/cpu.c similarity index 98% rename from arch/arm/cpu/arm720t/tegra20/cpu.c rename to arch/arm/mach-tegra/tegra20/cpu.c index 253389955f..67f49d7756 100644 --- a/arch/arm/cpu/arm720t/tegra20/cpu.c +++ b/arch/arm/mach-tegra/tegra20/cpu.c @@ -18,7 +18,7 @@ #include #include #include -#include "../tegra-common/cpu.h" +#include "../cpu.h" static void enable_cpu_power_rail(void) { diff --git a/arch/arm/cpu/tegra20-common/crypto.c b/arch/arm/mach-tegra/tegra20/crypto.c similarity index 100% rename from arch/arm/cpu/tegra20-common/crypto.c rename to arch/arm/mach-tegra/tegra20/crypto.c diff --git a/arch/arm/cpu/tegra20-common/crypto.h b/arch/arm/mach-tegra/tegra20/crypto.h similarity index 100% rename from arch/arm/cpu/tegra20-common/crypto.h rename to arch/arm/mach-tegra/tegra20/crypto.h diff --git a/arch/arm/cpu/armv7/tegra20/display.c b/arch/arm/mach-tegra/tegra20/display.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/display.c rename to arch/arm/mach-tegra/tegra20/display.c diff --git a/arch/arm/cpu/tegra20-common/emc.c b/arch/arm/mach-tegra/tegra20/emc.c similarity index 100% rename from arch/arm/cpu/tegra20-common/emc.c rename to arch/arm/mach-tegra/tegra20/emc.c diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/mach-tegra/tegra20/funcmux.c similarity index 100% rename from arch/arm/cpu/tegra20-common/funcmux.c rename to arch/arm/mach-tegra/tegra20/funcmux.c diff --git a/arch/arm/cpu/tegra20-common/pinmux.c b/arch/arm/mach-tegra/tegra20/pinmux.c similarity index 100% rename from arch/arm/cpu/tegra20-common/pinmux.c rename to arch/arm/mach-tegra/tegra20/pinmux.c diff --git a/arch/arm/cpu/tegra20-common/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c similarity index 100% rename from arch/arm/cpu/tegra20-common/pmu.c rename to arch/arm/mach-tegra/tegra20/pmu.c diff --git a/arch/arm/cpu/armv7/tegra20/pwm.c b/arch/arm/mach-tegra/tegra20/pwm.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/pwm.c rename to arch/arm/mach-tegra/tegra20/pwm.c diff --git a/arch/arm/cpu/tegra20-common/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c similarity index 100% rename from arch/arm/cpu/tegra20-common/warmboot.c rename to arch/arm/mach-tegra/tegra20/warmboot.c diff --git a/arch/arm/cpu/tegra20-common/warmboot_avp.c b/arch/arm/mach-tegra/tegra20/warmboot_avp.c similarity index 100% rename from arch/arm/cpu/tegra20-common/warmboot_avp.c rename to arch/arm/mach-tegra/tegra20/warmboot_avp.c diff --git a/arch/arm/cpu/tegra20-common/warmboot_avp.h b/arch/arm/mach-tegra/tegra20/warmboot_avp.h similarity index 100% rename from arch/arm/cpu/tegra20-common/warmboot_avp.h rename to arch/arm/mach-tegra/tegra20/warmboot_avp.h diff --git a/arch/arm/cpu/armv7/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig similarity index 100% rename from arch/arm/cpu/armv7/tegra30/Kconfig rename to arch/arm/mach-tegra/tegra30/Kconfig diff --git a/arch/arm/cpu/tegra30-common/Makefile b/arch/arm/mach-tegra/tegra30/Makefile similarity index 89% rename from arch/arm/cpu/tegra30-common/Makefile rename to arch/arm/mach-tegra/tegra30/Makefile index d2d616e8a4..bc250deba8 100644 --- a/arch/arm/cpu/tegra30-common/Makefile +++ b/arch/arm/mach-tegra/tegra30/Makefile @@ -1,9 +1,6 @@ # # Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. # -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# # This program is free software; you can redistribute it and/or modify it # under the terms and conditions of the GNU General Public License, # version 2, as published by the Free Software Foundation. @@ -17,4 +14,6 @@ # along with this program. If not, see . # +obj-$(CONFIG_SPL_BUILD) += cpu.o + obj-y += clock.o funcmux.o pinmux.o diff --git a/arch/arm/cpu/tegra30-common/clock.c b/arch/arm/mach-tegra/tegra30/clock.c similarity index 100% rename from arch/arm/cpu/tegra30-common/clock.c rename to arch/arm/mach-tegra/tegra30/clock.c diff --git a/arch/arm/cpu/arm720t/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c similarity index 99% rename from arch/arm/cpu/arm720t/tegra30/cpu.c rename to arch/arm/mach-tegra/tegra30/cpu.c index 9003902e3f..c76e74c65f 100644 --- a/arch/arm/cpu/arm720t/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -22,7 +22,7 @@ #include #include #include -#include "../tegra-common/cpu.h" +#include "../cpu.h" /* Tegra30-specific CPU init code */ void tegra_i2c_ll_write_addr(uint addr, uint config) diff --git a/arch/arm/cpu/tegra30-common/funcmux.c b/arch/arm/mach-tegra/tegra30/funcmux.c similarity index 100% rename from arch/arm/cpu/tegra30-common/funcmux.c rename to arch/arm/mach-tegra/tegra30/funcmux.c diff --git a/arch/arm/cpu/tegra30-common/pinmux.c b/arch/arm/mach-tegra/tegra30/pinmux.c similarity index 100% rename from arch/arm/cpu/tegra30-common/pinmux.c rename to arch/arm/mach-tegra/tegra30/pinmux.c diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/mach-tegra/vpr.c similarity index 100% rename from arch/arm/cpu/tegra-common/vpr.c rename to arch/arm/mach-tegra/vpr.c diff --git a/arch/arm/cpu/tegra-common/xusb-padctl.c b/arch/arm/mach-tegra/xusb-padctl.c similarity index 100% rename from arch/arm/cpu/tegra-common/xusb-padctl.c rename to arch/arm/mach-tegra/xusb-padctl.c From 601fbec7cf815bc2b26ba2546ac5e8501fc7edae Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:05 +0900 Subject: [PATCH 144/222] ARM: davinci: move SoC sources to mach-davinci Move arch/arm/cpu/arm926ejs/davinci/* -> arch/arm/mach-davinci/* Signed-off-by: Masahiro Yamada Cc: Tom Rini --- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 1 + arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/Kconfig | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/Makefile | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/config.mk | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/cpu.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/da830_pinmux.c | 0 .../{cpu/arm926ejs/davinci => mach-davinci}/da850_lowlevel.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/da850_pinmux.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm355.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm365.c | 0 .../{cpu/arm926ejs/davinci => mach-davinci}/dm365_lowlevel.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm644x.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm646x.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dp83848.c | 2 +- arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/et1011c.c | 2 +- arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/ksz8873.c | 2 +- .../arm/{cpu/arm926ejs/davinci => mach-davinci}/lowlevel_init.S | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/lxt972.c | 2 +- arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/misc.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/pinmux.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/psc.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/reset.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/spl.c | 0 arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/timer.c | 0 26 files changed, 6 insertions(+), 6 deletions(-) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/Kconfig (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/Makefile (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/config.mk (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/cpu.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/da830_pinmux.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/da850_lowlevel.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/da850_pinmux.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm355.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm365.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm365_lowlevel.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm644x.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dm646x.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/dp83848.c (98%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/et1011c.c (94%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/ksz8873.c (95%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/lowlevel_init.S (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/lxt972.c (97%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/misc.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/pinmux.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/psc.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/reset.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/spl.c (100%) rename arch/arm/{cpu/arm926ejs/davinci => mach-davinci}/timer.c (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index adecafcad1..887c0d5b6e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -716,7 +716,7 @@ endchoice source "arch/arm/mach-at91/Kconfig" -source "arch/arm/cpu/arm926ejs/davinci/Kconfig" +source "arch/arm/mach-davinci/Kconfig" source "arch/arm/cpu/arm1176/bcm2835/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index f1ae929154..e321057a0e 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -5,6 +5,7 @@ # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 +machine-$(CONFIG_ARCH_DAVINCI) += davinci # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA machine-$(CONFIG_TEGRA) += tegra diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index f41357aaeb..27b4353a9d 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -15,7 +15,6 @@ endif endif obj-$(CONFIG_ARMADA100) += armada100/ -obj-$(CONFIG_ARCH_DAVINCI) += davinci/ obj-$(CONFIG_KIRKWOOD) += kirkwood/ obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/ obj-$(CONFIG_MB86R0x) += mb86r0x/ diff --git a/arch/arm/cpu/arm926ejs/davinci/Kconfig b/arch/arm/mach-davinci/Kconfig similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/Kconfig rename to arch/arm/mach-davinci/Kconfig diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile b/arch/arm/mach-davinci/Makefile similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/Makefile rename to arch/arm/mach-davinci/Makefile diff --git a/arch/arm/cpu/arm926ejs/davinci/config.mk b/arch/arm/mach-davinci/config.mk similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/config.mk rename to arch/arm/mach-davinci/config.mk diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c b/arch/arm/mach-davinci/cpu.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/cpu.c rename to arch/arm/mach-davinci/cpu.c diff --git a/arch/arm/cpu/arm926ejs/davinci/da830_pinmux.c b/arch/arm/mach-davinci/da830_pinmux.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/da830_pinmux.c rename to arch/arm/mach-davinci/da830_pinmux.c diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c rename to arch/arm/mach-davinci/da850_lowlevel.c diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c b/arch/arm/mach-davinci/da850_pinmux.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c rename to arch/arm/mach-davinci/da850_pinmux.c diff --git a/arch/arm/cpu/arm926ejs/davinci/dm355.c b/arch/arm/mach-davinci/dm355.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/dm355.c rename to arch/arm/mach-davinci/dm355.c diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365.c b/arch/arm/mach-davinci/dm365.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/dm365.c rename to arch/arm/mach-davinci/dm365.c diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c b/arch/arm/mach-davinci/dm365_lowlevel.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c rename to arch/arm/mach-davinci/dm365_lowlevel.c diff --git a/arch/arm/cpu/arm926ejs/davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/dm644x.c rename to arch/arm/mach-davinci/dm644x.c diff --git a/arch/arm/cpu/arm926ejs/davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/dm646x.c rename to arch/arm/mach-davinci/dm646x.c diff --git a/arch/arm/cpu/arm926ejs/davinci/dp83848.c b/arch/arm/mach-davinci/dp83848.c similarity index 98% rename from arch/arm/cpu/arm926ejs/davinci/dp83848.c rename to arch/arm/mach-davinci/dp83848.c index 603d507c70..6387e956b2 100644 --- a/arch/arm/cpu/arm926ejs/davinci/dp83848.c +++ b/arch/arm/mach-davinci/dp83848.c @@ -13,7 +13,7 @@ #include #include #include -#include "../../../../../drivers/net/davinci_emac.h" +#include "../../../drivers/net/davinci_emac.h" #ifdef CONFIG_DRIVER_TI_EMAC diff --git a/arch/arm/cpu/arm926ejs/davinci/et1011c.c b/arch/arm/mach-davinci/et1011c.c similarity index 94% rename from arch/arm/cpu/arm926ejs/davinci/et1011c.c rename to arch/arm/mach-davinci/et1011c.c index 9d53875b93..151020d45a 100644 --- a/arch/arm/cpu/arm926ejs/davinci/et1011c.c +++ b/arch/arm/mach-davinci/et1011c.c @@ -10,7 +10,7 @@ #include #include #include -#include "../../../../../drivers/net/davinci_emac.h" +#include "../../../drivers/net/davinci_emac.h" #ifdef CONFIG_DRIVER_TI_EMAC diff --git a/arch/arm/cpu/arm926ejs/davinci/ksz8873.c b/arch/arm/mach-davinci/ksz8873.c similarity index 95% rename from arch/arm/cpu/arm926ejs/davinci/ksz8873.c rename to arch/arm/mach-davinci/ksz8873.c index 4af5dd2135..75af13538d 100644 --- a/arch/arm/cpu/arm926ejs/davinci/ksz8873.c +++ b/arch/arm/mach-davinci/ksz8873.c @@ -20,7 +20,7 @@ #include #include #include -#include "../../../../../drivers/net/davinci_emac.h" +#include "../../../drivers/net/davinci_emac.h" int ksz8873_is_phy_connected(int phy_addr) { diff --git a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S b/arch/arm/mach-davinci/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S rename to arch/arm/mach-davinci/lowlevel_init.S diff --git a/arch/arm/cpu/arm926ejs/davinci/lxt972.c b/arch/arm/mach-davinci/lxt972.c similarity index 97% rename from arch/arm/cpu/arm926ejs/davinci/lxt972.c rename to arch/arm/mach-davinci/lxt972.c index c482fd9378..a7356f9672 100644 --- a/arch/arm/cpu/arm926ejs/davinci/lxt972.c +++ b/arch/arm/mach-davinci/lxt972.c @@ -14,7 +14,7 @@ #include #include #include -#include "../../../../../drivers/net/davinci_emac.h" +#include "../../../drivers/net/davinci_emac.h" #ifdef CONFIG_DRIVER_TI_EMAC diff --git a/arch/arm/cpu/arm926ejs/davinci/misc.c b/arch/arm/mach-davinci/misc.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/misc.c rename to arch/arm/mach-davinci/misc.c diff --git a/arch/arm/cpu/arm926ejs/davinci/pinmux.c b/arch/arm/mach-davinci/pinmux.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/pinmux.c rename to arch/arm/mach-davinci/pinmux.c diff --git a/arch/arm/cpu/arm926ejs/davinci/psc.c b/arch/arm/mach-davinci/psc.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/psc.c rename to arch/arm/mach-davinci/psc.c diff --git a/arch/arm/cpu/arm926ejs/davinci/reset.c b/arch/arm/mach-davinci/reset.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/reset.c rename to arch/arm/mach-davinci/reset.c diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c b/arch/arm/mach-davinci/spl.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/spl.c rename to arch/arm/mach-davinci/spl.c diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/mach-davinci/timer.c similarity index 100% rename from arch/arm/cpu/arm926ejs/davinci/timer.c rename to arch/arm/mach-davinci/timer.c From 56f86e39e80c5cbb17bec42cf6931cd203176830 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:06 +0900 Subject: [PATCH 145/222] ARM: kirkwood: move SOC sources to mach-kirkwood Move arch/arm/cpu/arm926ejs/kirkwood/* -> arch/arm/mach-kirkwood/* Note: Perhaps, can we merge arch/arm/mach-kirkwood and arch/arm/mvebu-common into arch/arm/mach-mvebu, like Linux? Signed-off-by: Masahiro Yamada Acked-by: Stefan Roese Cc: Prafulla Wadaskar Cc: Luka Perkov --- MAINTAINERS | 2 +- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 2 ++ arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/Kconfig | 0 arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/Makefile | 0 arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/cache.c | 0 arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/cpu.c | 0 arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/mpp.c | 0 9 files changed, 4 insertions(+), 3 deletions(-) rename arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/Kconfig (100%) rename arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/Makefile (100%) rename arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/cache.c (100%) rename arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/cpu.c (100%) rename arch/arm/{cpu/arm926ejs/kirkwood => mach-kirkwood}/mpp.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 63085fc16d..e4edf45e8d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -99,7 +99,7 @@ M: Prafulla Wadaskar M: Luka Perkov S: Maintained T: git git://git.denx.de/u-boot-marvell.git -F: arch/arm/cpu/arm926ejs/kirkwood/ +F: arch/arm/mach-kirkwood/ F: arch/arm/include/asm/arch-kirkwood/ ARM MARVELL PXA diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 887c0d5b6e..dba6518fb3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -726,7 +726,7 @@ source "arch/arm/cpu/armv7/highbank/Kconfig" source "arch/arm/cpu/armv7/keystone/Kconfig" -source "arch/arm/cpu/arm926ejs/kirkwood/Kconfig" +source "arch/arm/mach-kirkwood/Kconfig" source "arch/arm/cpu/arm926ejs/nomadik/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index e321057a0e..e09de5182e 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -6,6 +6,8 @@ # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 machine-$(CONFIG_ARCH_DAVINCI) += davinci +# TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD +machine-$(CONFIG_KIRKWOOD) += kirkwood # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA machine-$(CONFIG_TEGRA) += tegra diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index 27b4353a9d..0b43a90fbd 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -15,7 +15,6 @@ endif endif obj-$(CONFIG_ARMADA100) += armada100/ -obj-$(CONFIG_KIRKWOOD) += kirkwood/ obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/ obj-$(CONFIG_MB86R0x) += mb86r0x/ obj-$(CONFIG_MX25) += mx25/ diff --git a/arch/arm/cpu/arm926ejs/kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig similarity index 100% rename from arch/arm/cpu/arm926ejs/kirkwood/Kconfig rename to arch/arm/mach-kirkwood/Kconfig diff --git a/arch/arm/cpu/arm926ejs/kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile similarity index 100% rename from arch/arm/cpu/arm926ejs/kirkwood/Makefile rename to arch/arm/mach-kirkwood/Makefile diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cache.c b/arch/arm/mach-kirkwood/cache.c similarity index 100% rename from arch/arm/cpu/arm926ejs/kirkwood/cache.c rename to arch/arm/mach-kirkwood/cache.c diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c similarity index 100% rename from arch/arm/cpu/arm926ejs/kirkwood/cpu.c rename to arch/arm/mach-kirkwood/cpu.c diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c similarity index 100% rename from arch/arm/cpu/arm926ejs/kirkwood/mpp.c rename to arch/arm/mach-kirkwood/mpp.c From ef917ddb1d9240b075f3c03ddf6e246c89b86fa6 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:07 +0900 Subject: [PATCH 146/222] ARM: nomadik: move SoC sources to mach-nomadik Move arch/arm/cpu/arm926ejs/nomadik/* -> arch/arm/mach-nomadik/* Signed-off-by: Masahiro Yamada Cc: Nomadik Linux Team Cc: Alessandro Rubini --- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 1 + arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/Kconfig | 0 arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/Makefile | 0 arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/gpio.c | 0 arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/reset.S | 0 arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/timer.c | 0 8 files changed, 2 insertions(+), 2 deletions(-) rename arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/Kconfig (100%) rename arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/Makefile (100%) rename arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/gpio.c (100%) rename arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/reset.S (100%) rename arch/arm/{cpu/arm926ejs/nomadik => mach-nomadik}/timer.c (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dba6518fb3..1bac511531 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -728,7 +728,7 @@ source "arch/arm/cpu/armv7/keystone/Kconfig" source "arch/arm/mach-kirkwood/Kconfig" -source "arch/arm/cpu/arm926ejs/nomadik/Kconfig" +source "arch/arm/mach-nomadik/Kconfig" source "arch/arm/cpu/armv7/omap3/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index e09de5182e..32d039c2d0 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -9,6 +9,7 @@ machine-$(CONFIG_ARCH_DAVINCI) += davinci # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD machine-$(CONFIG_KIRKWOOD) += kirkwood # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA +machine-$(CONFIG_ARCH_NOMADIK) += nomadik machine-$(CONFIG_TEGRA) += tegra machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index 0b43a90fbd..ed0cf0fa05 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -20,7 +20,6 @@ obj-$(CONFIG_MB86R0x) += mb86r0x/ obj-$(CONFIG_MX25) += mx25/ obj-$(CONFIG_MX27) += mx27/ obj-$(if $(filter mxs,$(SOC)),y) += mxs/ -obj-$(CONFIG_ARCH_NOMADIK) += nomadik/ obj-$(CONFIG_ORION5X) += orion5x/ obj-$(CONFIG_PANTHEON) += pantheon/ obj-$(if $(filter spear,$(SOC)),y) += spear/ diff --git a/arch/arm/cpu/arm926ejs/nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig similarity index 100% rename from arch/arm/cpu/arm926ejs/nomadik/Kconfig rename to arch/arm/mach-nomadik/Kconfig diff --git a/arch/arm/cpu/arm926ejs/nomadik/Makefile b/arch/arm/mach-nomadik/Makefile similarity index 100% rename from arch/arm/cpu/arm926ejs/nomadik/Makefile rename to arch/arm/mach-nomadik/Makefile diff --git a/arch/arm/cpu/arm926ejs/nomadik/gpio.c b/arch/arm/mach-nomadik/gpio.c similarity index 100% rename from arch/arm/cpu/arm926ejs/nomadik/gpio.c rename to arch/arm/mach-nomadik/gpio.c diff --git a/arch/arm/cpu/arm926ejs/nomadik/reset.S b/arch/arm/mach-nomadik/reset.S similarity index 100% rename from arch/arm/cpu/arm926ejs/nomadik/reset.S rename to arch/arm/mach-nomadik/reset.S diff --git a/arch/arm/cpu/arm926ejs/nomadik/timer.c b/arch/arm/mach-nomadik/timer.c similarity index 100% rename from arch/arm/cpu/arm926ejs/nomadik/timer.c rename to arch/arm/mach-nomadik/timer.c From 72a8ff4b04771071023ff1024e268c2fbdf159e7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:08 +0900 Subject: [PATCH 147/222] ARM: highbank: move SoC sources to mach-highbank Move arch/arm/cpu/armv7/highbank/* -> arch/arm/mach-highbank/* Signed-off-by: Masahiro Yamada Cc: Rob Herring --- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 1 + arch/arm/cpu/armv7/Makefile | 1 - arch/arm/{cpu/armv7/highbank => mach-highbank}/Kconfig | 0 arch/arm/{cpu/armv7/highbank => mach-highbank}/Makefile | 0 arch/arm/{cpu/armv7/highbank => mach-highbank}/timer.c | 0 6 files changed, 2 insertions(+), 2 deletions(-) rename arch/arm/{cpu/armv7/highbank => mach-highbank}/Kconfig (100%) rename arch/arm/{cpu/armv7/highbank => mach-highbank}/Makefile (100%) rename arch/arm/{cpu/armv7/highbank => mach-highbank}/timer.c (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1bac511531..f981541e4a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -722,7 +722,7 @@ source "arch/arm/cpu/arm1176/bcm2835/Kconfig" source "arch/arm/cpu/armv7/exynos/Kconfig" -source "arch/arm/cpu/armv7/highbank/Kconfig" +source "arch/arm/mach-highbank/Kconfig" source "arch/arm/cpu/armv7/keystone/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 32d039c2d0..97858fad10 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -6,6 +6,7 @@ # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 machine-$(CONFIG_ARCH_DAVINCI) += davinci +machine-$(CONFIG_ARCH_HIGHBANK) += highbank # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD machine-$(CONFIG_KIRKWOOD) += kirkwood # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 91e69233c3..29ba6e2125 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -43,7 +43,6 @@ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ obj-$(CONFIG_ARCH_EXYNOS) += exynos/ -obj-$(CONFIG_ARCH_HIGHBANK) += highbank/ obj-$(CONFIG_ARCH_KEYSTONE) += keystone/ obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/ obj-$(if $(filter mx5,$(SOC)),y) += mx5/ diff --git a/arch/arm/cpu/armv7/highbank/Kconfig b/arch/arm/mach-highbank/Kconfig similarity index 100% rename from arch/arm/cpu/armv7/highbank/Kconfig rename to arch/arm/mach-highbank/Kconfig diff --git a/arch/arm/cpu/armv7/highbank/Makefile b/arch/arm/mach-highbank/Makefile similarity index 100% rename from arch/arm/cpu/armv7/highbank/Makefile rename to arch/arm/mach-highbank/Makefile diff --git a/arch/arm/cpu/armv7/highbank/timer.c b/arch/arm/mach-highbank/timer.c similarity index 100% rename from arch/arm/cpu/armv7/highbank/timer.c rename to arch/arm/mach-highbank/timer.c From 3e93b4e6001104152fec850d4724ea9ffad03e05 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:09 +0900 Subject: [PATCH 148/222] ARM: orion5x: move SoC sources to mach-orion5x Move arch/arm/cpu/arm926ejs/orion5x/* -> arch/arm/mach-orion5x/* Signed-off-by: Masahiro Yamada Cc: Albert ARIBAUD --- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 2 ++ arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/Kconfig | 0 arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/Makefile | 0 arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/cpu.c | 0 arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/dram.c | 0 .../arm/{cpu/arm926ejs/orion5x => mach-orion5x}/lowlevel_init.S | 0 arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/timer.c | 0 9 files changed, 3 insertions(+), 2 deletions(-) rename arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/Kconfig (100%) rename arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/Makefile (100%) rename arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/cpu.c (100%) rename arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/dram.c (100%) rename arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/lowlevel_init.S (100%) rename arch/arm/{cpu/arm926ejs/orion5x => mach-orion5x}/timer.c (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f981541e4a..038961c5fd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -736,7 +736,7 @@ source "arch/arm/cpu/armv7/omap4/Kconfig" source "arch/arm/cpu/armv7/omap5/Kconfig" -source "arch/arm/cpu/arm926ejs/orion5x/Kconfig" +source "arch/arm/mach-orion5x/Kconfig" source "arch/arm/cpu/armv7/rmobile/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 97858fad10..6bcf8ec715 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -11,6 +11,8 @@ machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_KIRKWOOD) += kirkwood # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA machine-$(CONFIG_ARCH_NOMADIK) += nomadik +# TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X +machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_TEGRA) += tegra machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index ed0cf0fa05..3cb741db1d 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -20,7 +20,6 @@ obj-$(CONFIG_MB86R0x) += mb86r0x/ obj-$(CONFIG_MX25) += mx25/ obj-$(CONFIG_MX27) += mx27/ obj-$(if $(filter mxs,$(SOC)),y) += mxs/ -obj-$(CONFIG_ORION5X) += orion5x/ obj-$(CONFIG_PANTHEON) += pantheon/ obj-$(if $(filter spear,$(SOC)),y) += spear/ obj-$(CONFIG_ARCH_VERSATILE) += versatile/ diff --git a/arch/arm/cpu/arm926ejs/orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig similarity index 100% rename from arch/arm/cpu/arm926ejs/orion5x/Kconfig rename to arch/arm/mach-orion5x/Kconfig diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile b/arch/arm/mach-orion5x/Makefile similarity index 100% rename from arch/arm/cpu/arm926ejs/orion5x/Makefile rename to arch/arm/mach-orion5x/Makefile diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c b/arch/arm/mach-orion5x/cpu.c similarity index 100% rename from arch/arm/cpu/arm926ejs/orion5x/cpu.c rename to arch/arm/mach-orion5x/cpu.c diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/mach-orion5x/dram.c similarity index 100% rename from arch/arm/cpu/arm926ejs/orion5x/dram.c rename to arch/arm/mach-orion5x/dram.c diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/mach-orion5x/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S rename to arch/arm/mach-orion5x/lowlevel_init.S diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/mach-orion5x/timer.c similarity index 100% rename from arch/arm/cpu/arm926ejs/orion5x/timer.c rename to arch/arm/mach-orion5x/timer.c From 63637a484614490685b68a70bdf93b435c063363 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:10 +0900 Subject: [PATCH 149/222] ARM: versatile: move SoC sources to mach-versatile Move arch/arm/cpu/arm926ejs/versatile/* -> arch/arm/mach-versatile/* Signed-off-by: Masahiro Yamada --- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 1 + arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/Kconfig | 0 arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/Makefile | 0 arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/reset.S | 0 arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/timer.c | 0 7 files changed, 2 insertions(+), 2 deletions(-) rename arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/Kconfig (100%) rename arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/Makefile (100%) rename arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/reset.S (100%) rename arch/arm/{cpu/arm926ejs/versatile => mach-versatile}/timer.c (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 038961c5fd..9302b2a0b6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -746,7 +746,7 @@ source "arch/arm/mach-tegra/Kconfig" source "arch/arm/cpu/armv7/uniphier/Kconfig" -source "arch/arm/cpu/arm926ejs/versatile/Kconfig" +source "arch/arm/mach-versatile/Kconfig" source "arch/arm/cpu/armv7/zynq/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6bcf8ec715..0699a4d472 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -14,6 +14,7 @@ machine-$(CONFIG_ARCH_NOMADIK) += nomadik # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_TEGRA) += tegra +machine-$(CONFIG_ARCH_VERSATILE) += versatile machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index 3cb741db1d..f5944cc965 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -22,4 +22,3 @@ obj-$(CONFIG_MX27) += mx27/ obj-$(if $(filter mxs,$(SOC)),y) += mxs/ obj-$(CONFIG_PANTHEON) += pantheon/ obj-$(if $(filter spear,$(SOC)),y) += spear/ -obj-$(CONFIG_ARCH_VERSATILE) += versatile/ diff --git a/arch/arm/cpu/arm926ejs/versatile/Kconfig b/arch/arm/mach-versatile/Kconfig similarity index 100% rename from arch/arm/cpu/arm926ejs/versatile/Kconfig rename to arch/arm/mach-versatile/Kconfig diff --git a/arch/arm/cpu/arm926ejs/versatile/Makefile b/arch/arm/mach-versatile/Makefile similarity index 100% rename from arch/arm/cpu/arm926ejs/versatile/Makefile rename to arch/arm/mach-versatile/Makefile diff --git a/arch/arm/cpu/arm926ejs/versatile/reset.S b/arch/arm/mach-versatile/reset.S similarity index 100% rename from arch/arm/cpu/arm926ejs/versatile/reset.S rename to arch/arm/mach-versatile/reset.S diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/mach-versatile/timer.c similarity index 100% rename from arch/arm/cpu/arm926ejs/versatile/timer.c rename to arch/arm/mach-versatile/timer.c From 39a723452f430a7ef89b0ffa934b2d4312890076 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:11 +0900 Subject: [PATCH 150/222] ARM: keystone: move SoC sources to mach-keystone Move arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/* Signed-off-by: Masahiro Yamada Cc: Tom Rini --- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 1 + arch/arm/cpu/armv7/Makefile | 1 - arch/arm/{cpu/armv7/keystone => mach-keystone}/Kconfig | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/Makefile | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/clock-k2e.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/clock-k2hk.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/clock-k2l.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/clock.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/cmd_clock.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/cmd_ddr3.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/cmd_mon.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/ddr3.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/init.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/keystone.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/msmc.c | 0 arch/arm/{cpu/armv7/keystone => mach-keystone}/psc.c | 0 17 files changed, 2 insertions(+), 2 deletions(-) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/Kconfig (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/Makefile (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/clock-k2e.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/clock-k2hk.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/clock-k2l.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/clock.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/cmd_clock.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/cmd_ddr3.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/cmd_mon.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/ddr3.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/init.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/keystone.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/msmc.c (100%) rename arch/arm/{cpu/armv7/keystone => mach-keystone}/psc.c (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9302b2a0b6..083823e8c4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -724,7 +724,7 @@ source "arch/arm/cpu/armv7/exynos/Kconfig" source "arch/arm/mach-highbank/Kconfig" -source "arch/arm/cpu/armv7/keystone/Kconfig" +source "arch/arm/mach-keystone/Kconfig" source "arch/arm/mach-kirkwood/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 0699a4d472..678ac132aa 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -7,6 +7,7 @@ machine-$(CONFIG_ARCH_AT91) += at91 machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_HIGHBANK) += highbank +machine-$(CONFIG_ARCH_KEYSTONE) += keystone # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD machine-$(CONFIG_KIRKWOOD) += kirkwood # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 29ba6e2125..1a76982d6e 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -43,7 +43,6 @@ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ obj-$(CONFIG_ARCH_EXYNOS) += exynos/ -obj-$(CONFIG_ARCH_KEYSTONE) += keystone/ obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/ obj-$(if $(filter mx5,$(SOC)),y) += mx5/ obj-$(CONFIG_MX6) += mx6/ diff --git a/arch/arm/cpu/armv7/keystone/Kconfig b/arch/arm/mach-keystone/Kconfig similarity index 100% rename from arch/arm/cpu/armv7/keystone/Kconfig rename to arch/arm/mach-keystone/Kconfig diff --git a/arch/arm/cpu/armv7/keystone/Makefile b/arch/arm/mach-keystone/Makefile similarity index 100% rename from arch/arm/cpu/armv7/keystone/Makefile rename to arch/arm/mach-keystone/Makefile diff --git a/arch/arm/cpu/armv7/keystone/clock-k2e.c b/arch/arm/mach-keystone/clock-k2e.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/clock-k2e.c rename to arch/arm/mach-keystone/clock-k2e.c diff --git a/arch/arm/cpu/armv7/keystone/clock-k2hk.c b/arch/arm/mach-keystone/clock-k2hk.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/clock-k2hk.c rename to arch/arm/mach-keystone/clock-k2hk.c diff --git a/arch/arm/cpu/armv7/keystone/clock-k2l.c b/arch/arm/mach-keystone/clock-k2l.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/clock-k2l.c rename to arch/arm/mach-keystone/clock-k2l.c diff --git a/arch/arm/cpu/armv7/keystone/clock.c b/arch/arm/mach-keystone/clock.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/clock.c rename to arch/arm/mach-keystone/clock.c diff --git a/arch/arm/cpu/armv7/keystone/cmd_clock.c b/arch/arm/mach-keystone/cmd_clock.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/cmd_clock.c rename to arch/arm/mach-keystone/cmd_clock.c diff --git a/arch/arm/cpu/armv7/keystone/cmd_ddr3.c b/arch/arm/mach-keystone/cmd_ddr3.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/cmd_ddr3.c rename to arch/arm/mach-keystone/cmd_ddr3.c diff --git a/arch/arm/cpu/armv7/keystone/cmd_mon.c b/arch/arm/mach-keystone/cmd_mon.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/cmd_mon.c rename to arch/arm/mach-keystone/cmd_mon.c diff --git a/arch/arm/cpu/armv7/keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/ddr3.c rename to arch/arm/mach-keystone/ddr3.c diff --git a/arch/arm/cpu/armv7/keystone/init.c b/arch/arm/mach-keystone/init.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/init.c rename to arch/arm/mach-keystone/init.c diff --git a/arch/arm/cpu/armv7/keystone/keystone.c b/arch/arm/mach-keystone/keystone.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/keystone.c rename to arch/arm/mach-keystone/keystone.c diff --git a/arch/arm/cpu/armv7/keystone/msmc.c b/arch/arm/mach-keystone/msmc.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/msmc.c rename to arch/arm/mach-keystone/msmc.c diff --git a/arch/arm/cpu/armv7/keystone/psc.c b/arch/arm/mach-keystone/psc.c similarity index 100% rename from arch/arm/cpu/armv7/keystone/psc.c rename to arch/arm/mach-keystone/psc.c From 0e7368c6c4265c138293802b3315629338bc66d0 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:12 +0900 Subject: [PATCH 151/222] kbuild: prepare for moving headers into mach-*/include/mach In U-Boot, SoC-specific headers are placed in arch/$(ARCH)/include/asm/arch-$(SOC) and a symbolic link to that directory is created at the early stage of the build process. Creating and removing a symbolic link during the build is not preferred. In fact, Linux Kernel did away with include/asm-$(ARCH) directories a long time time ago. As for ARM, now it is possible to collect SoC sources into arch/arm/mach-$(SOC). It is also reasonable to move SoC headers into arch/arm/mach-$(SOC)/include/mach. This commit prepares for that. If the directory arch/$(ARCH)/mach-$(SOC)/include/mach exists, a symbolic to that directory is created. Otherwise, a symbolic link to arch/$(ARCH)/include/asm/arch-$(SOC) or arch-$(CPU) is created. Signed-off-by: Masahiro Yamada --- scripts/Makefile.autoconf | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf index 8e9d71f89e..58e1642fb9 100644 --- a/scripts/Makefile.autoconf +++ b/scripts/Makefile.autoconf @@ -85,15 +85,26 @@ include/config.h: scripts/Makefile.autoconf create_symlink FORCE $(call filechk,config_h) # symbolic links +# If arch/$(ARCH)/mach-$(SOC)/include/mach exists, +# make a symbolic link to that directory. +# Otherwise, create a symbolic link to arch/$(ARCH)/include/asm/arch-$(SOC). PHONY += create_symlink create_symlink: ifneq ($(KBUILD_SRC),) $(Q)mkdir -p include/asm - $(Q)ln -fsn $(KBUILD_SRC)/arch/$(ARCH)/include/asm/arch-$(if $(SOC),$(SOC),$(CPU)) \ - include/asm/arch + $(Q)if [ -d $(KBUILD_SRC)/arch/$(ARCH)/mach-$(SOC)/include/mach ]; then \ + dest=arch/$(ARCH)/mach-$(SOC)/include/mach; \ + else \ + dest=arch/$(ARCH)/include/asm/arch-$(if $(SOC),$(SOC),$(CPU)); \ + fi; \ + ln -fsn $(KBUILD_SRC)/$$dest include/asm/arch else - $(Q)ln -fsn arch-$(if $(SOC),$(SOC),$(CPU)) \ - arch/$(ARCH)/include/asm/arch + $(Q)if [ -d arch/$(ARCH)/mach-$(SOC)/include/mach ]; then \ + dest=../../mach-$(SOC)/include/mach; \ + else \ + dest=arch-$(if $(SOC),$(SOC),$(CPU)); \ + fi; \ + ln -fsn $$dest arch/$(ARCH)/include/asm/arch endif PHONY += FORCE From af9308276028924ff7f84770ddbd26bd7046d6c5 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:13 +0900 Subject: [PATCH 152/222] ARM: at91: move SoC headers to mach-at91/include/mach MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move arch/arm/include/asm/arch-at91/* -> arch/arm/mach-at91/include/mach/* Signed-off-by: Masahiro Yamada Acked-by: Andreas Bießmann --- MAINTAINERS | 1 - .../asm/arch-at91 => mach-at91/include/mach}/at91_common.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_dbu.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91_eefc.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91_emac.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91_gpbr.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91_matrix.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_mc.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_pdc.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_pio.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_pit.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_pmc.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91_rstc.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_rtt.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_spi.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_st.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_tc.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/at91_wdt.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91rm9200.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9260.h | 0 .../arch-at91 => mach-at91/include/mach}/at91sam9260_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9261.h | 0 .../arch-at91 => mach-at91/include/mach}/at91sam9261_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9263.h | 0 .../arch-at91 => mach-at91/include/mach}/at91sam9263_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9_sdramc.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9_smc.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9g45.h | 0 .../arch-at91 => mach-at91/include/mach}/at91sam9g45_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9rl.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9rl_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9x5.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/at91sam9x5_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/atmel_mpddrc.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/atmel_serial.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/atmel_usba_udc.h | 0 arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/clk.h | 0 .../arm/{include/asm/arch-at91 => mach-at91/include/mach}/gpio.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/hardware.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/sama5_matrix.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/sama5_sfr.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/sama5d3.h | 0 .../asm/arch-at91 => mach-at91/include/mach}/sama5d3_smc.h | 0 .../{include/asm/arch-at91 => mach-at91/include/mach}/sama5d4.h | 0 45 files changed, 1 deletion(-) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_common.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_dbu.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_eefc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_emac.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_gpbr.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_mc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_pdc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_pio.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_pit.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_pmc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_rstc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_rtt.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_spi.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_st.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_tc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91_wdt.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91rm9200.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9260.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9260_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9261.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9261_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9263.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9263_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9_sdramc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9_smc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9g45.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9g45_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9rl.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9rl_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9x5.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/at91sam9x5_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/atmel_mpddrc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/atmel_serial.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/atmel_usba_udc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/clk.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/gpio.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/hardware.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/sama5_matrix.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/sama5_sfr.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/sama5d3.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/sama5d3_smc.h (100%) rename arch/arm/{include/asm/arch-at91 => mach-at91/include/mach}/sama5d4.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index e4edf45e8d..7a3e963100 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -77,7 +77,6 @@ M: Andreas Bießmann S: Maintained T: git git://git.denx.de/u-boot-atmel.git F: arch/arm/mach-at91/ -F: arch/arm/include/asm/arch-at91/ ARM FREESCALE IMX M: Stefano Babic diff --git a/arch/arm/include/asm/arch-at91/at91_common.h b/arch/arm/mach-at91/include/mach/at91_common.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_common.h rename to arch/arm/mach-at91/include/mach/at91_common.h diff --git a/arch/arm/include/asm/arch-at91/at91_dbu.h b/arch/arm/mach-at91/include/mach/at91_dbu.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_dbu.h rename to arch/arm/mach-at91/include/mach/at91_dbu.h diff --git a/arch/arm/include/asm/arch-at91/at91_eefc.h b/arch/arm/mach-at91/include/mach/at91_eefc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_eefc.h rename to arch/arm/mach-at91/include/mach/at91_eefc.h diff --git a/arch/arm/include/asm/arch-at91/at91_emac.h b/arch/arm/mach-at91/include/mach/at91_emac.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_emac.h rename to arch/arm/mach-at91/include/mach/at91_emac.h diff --git a/arch/arm/include/asm/arch-at91/at91_gpbr.h b/arch/arm/mach-at91/include/mach/at91_gpbr.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_gpbr.h rename to arch/arm/mach-at91/include/mach/at91_gpbr.h diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_matrix.h rename to arch/arm/mach-at91/include/mach/at91_matrix.h diff --git a/arch/arm/include/asm/arch-at91/at91_mc.h b/arch/arm/mach-at91/include/mach/at91_mc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_mc.h rename to arch/arm/mach-at91/include/mach/at91_mc.h diff --git a/arch/arm/include/asm/arch-at91/at91_pdc.h b/arch/arm/mach-at91/include/mach/at91_pdc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_pdc.h rename to arch/arm/mach-at91/include/mach/at91_pdc.h diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_pio.h rename to arch/arm/mach-at91/include/mach/at91_pio.h diff --git a/arch/arm/include/asm/arch-at91/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_pit.h rename to arch/arm/mach-at91/include/mach/at91_pit.h diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_pmc.h rename to arch/arm/mach-at91/include/mach/at91_pmc.h diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h b/arch/arm/mach-at91/include/mach/at91_rstc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_rstc.h rename to arch/arm/mach-at91/include/mach/at91_rstc.h diff --git a/arch/arm/include/asm/arch-at91/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_rtt.h rename to arch/arm/mach-at91/include/mach/at91_rtt.h diff --git a/arch/arm/include/asm/arch-at91/at91_spi.h b/arch/arm/mach-at91/include/mach/at91_spi.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_spi.h rename to arch/arm/mach-at91/include/mach/at91_spi.h diff --git a/arch/arm/include/asm/arch-at91/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_st.h rename to arch/arm/mach-at91/include/mach/at91_st.h diff --git a/arch/arm/include/asm/arch-at91/at91_tc.h b/arch/arm/mach-at91/include/mach/at91_tc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_tc.h rename to arch/arm/mach-at91/include/mach/at91_tc.h diff --git a/arch/arm/include/asm/arch-at91/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91_wdt.h rename to arch/arm/mach-at91/include/mach/at91_wdt.h diff --git a/arch/arm/include/asm/arch-at91/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91rm9200.h rename to arch/arm/mach-at91/include/mach/at91rm9200.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9260.h rename to arch/arm/mach-at91/include/mach/at91sam9260.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9260_matrix.h rename to arch/arm/mach-at91/include/mach/at91sam9260_matrix.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9261.h rename to arch/arm/mach-at91/include/mach/at91sam9261.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9261_matrix.h rename to arch/arm/mach-at91/include/mach/at91sam9261_matrix.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9263.h rename to arch/arm/mach-at91/include/mach/at91sam9263.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9263_matrix.h rename to arch/arm/mach-at91/include/mach/at91sam9263_matrix.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9_matrix.h rename to arch/arm/mach-at91/include/mach/at91sam9_matrix.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9_sdramc.h rename to arch/arm/mach-at91/include/mach/at91sam9_sdramc.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9_smc.h rename to arch/arm/mach-at91/include/mach/at91sam9_smc.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9g45.h rename to arch/arm/mach-at91/include/mach/at91sam9g45.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h rename to arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9rl.h rename to arch/arm/mach-at91/include/mach/at91sam9rl.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h rename to arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9x5.h rename to arch/arm/mach-at91/include/mach/at91sam9x5.h diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h rename to arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h diff --git a/arch/arm/include/asm/arch-at91/atmel_mpddrc.h b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/atmel_mpddrc.h rename to arch/arm/mach-at91/include/mach/atmel_mpddrc.h diff --git a/arch/arm/include/asm/arch-at91/atmel_serial.h b/arch/arm/mach-at91/include/mach/atmel_serial.h similarity index 100% rename from arch/arm/include/asm/arch-at91/atmel_serial.h rename to arch/arm/mach-at91/include/mach/atmel_serial.h diff --git a/arch/arm/include/asm/arch-at91/atmel_usba_udc.h b/arch/arm/mach-at91/include/mach/atmel_usba_udc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/atmel_usba_udc.h rename to arch/arm/mach-at91/include/mach/atmel_usba_udc.h diff --git a/arch/arm/include/asm/arch-at91/clk.h b/arch/arm/mach-at91/include/mach/clk.h similarity index 100% rename from arch/arm/include/asm/arch-at91/clk.h rename to arch/arm/mach-at91/include/mach/clk.h diff --git a/arch/arm/include/asm/arch-at91/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h similarity index 100% rename from arch/arm/include/asm/arch-at91/gpio.h rename to arch/arm/mach-at91/include/mach/gpio.h diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h similarity index 100% rename from arch/arm/include/asm/arch-at91/hardware.h rename to arch/arm/mach-at91/include/mach/hardware.h diff --git a/arch/arm/include/asm/arch-at91/sama5_matrix.h b/arch/arm/mach-at91/include/mach/sama5_matrix.h similarity index 100% rename from arch/arm/include/asm/arch-at91/sama5_matrix.h rename to arch/arm/mach-at91/include/mach/sama5_matrix.h diff --git a/arch/arm/include/asm/arch-at91/sama5_sfr.h b/arch/arm/mach-at91/include/mach/sama5_sfr.h similarity index 100% rename from arch/arm/include/asm/arch-at91/sama5_sfr.h rename to arch/arm/mach-at91/include/mach/sama5_sfr.h diff --git a/arch/arm/include/asm/arch-at91/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h similarity index 100% rename from arch/arm/include/asm/arch-at91/sama5d3.h rename to arch/arm/mach-at91/include/mach/sama5d3.h diff --git a/arch/arm/include/asm/arch-at91/sama5d3_smc.h b/arch/arm/mach-at91/include/mach/sama5d3_smc.h similarity index 100% rename from arch/arm/include/asm/arch-at91/sama5d3_smc.h rename to arch/arm/mach-at91/include/mach/sama5d3_smc.h diff --git a/arch/arm/include/asm/arch-at91/sama5d4.h b/arch/arm/mach-at91/include/mach/sama5d4.h similarity index 100% rename from arch/arm/include/asm/arch-at91/sama5d4.h rename to arch/arm/mach-at91/include/mach/sama5d4.h From 3d357619a509eb2b39dc5056731ca08bc2b23e62 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:14 +0900 Subject: [PATCH 153/222] ARM: davinci: move SoC headers to mach-davinci/include/mach Move arch/arm/include/asm/arch-davinci/* -> arch/arm/mach-davinci/include/mach/* Signed-off-by: Masahiro Yamada Cc: Tom Rini --- .../asm/arch-davinci => mach-davinci/include/mach}/aintc_defs.h | 0 .../arch-davinci => mach-davinci/include/mach}/da850_lowlevel.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/da8xx-usb.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/davinci_misc.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/ddr2_defs.h | 0 .../arch-davinci => mach-davinci/include/mach}/dm365_lowlevel.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/emac_defs.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/gpio.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/hardware.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/i2c_defs.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/pinmux_defs.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/pll_defs.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/psc_defs.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/sdmmc_defs.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/syscfg_defs.h | 0 .../asm/arch-davinci => mach-davinci/include/mach}/timer_defs.h | 0 16 files changed, 0 insertions(+), 0 deletions(-) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/aintc_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/da850_lowlevel.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/da8xx-usb.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/davinci_misc.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/ddr2_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/dm365_lowlevel.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/emac_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/gpio.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/hardware.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/i2c_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/pinmux_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/pll_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/psc_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/sdmmc_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/syscfg_defs.h (100%) rename arch/arm/{include/asm/arch-davinci => mach-davinci/include/mach}/timer_defs.h (100%) diff --git a/arch/arm/include/asm/arch-davinci/aintc_defs.h b/arch/arm/mach-davinci/include/mach/aintc_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/aintc_defs.h rename to arch/arm/mach-davinci/include/mach/aintc_defs.h diff --git a/arch/arm/include/asm/arch-davinci/da850_lowlevel.h b/arch/arm/mach-davinci/include/mach/da850_lowlevel.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/da850_lowlevel.h rename to arch/arm/mach-davinci/include/mach/da850_lowlevel.h diff --git a/arch/arm/include/asm/arch-davinci/da8xx-usb.h b/arch/arm/mach-davinci/include/mach/da8xx-usb.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/da8xx-usb.h rename to arch/arm/mach-davinci/include/mach/da8xx-usb.h diff --git a/arch/arm/include/asm/arch-davinci/davinci_misc.h b/arch/arm/mach-davinci/include/mach/davinci_misc.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/davinci_misc.h rename to arch/arm/mach-davinci/include/mach/davinci_misc.h diff --git a/arch/arm/include/asm/arch-davinci/ddr2_defs.h b/arch/arm/mach-davinci/include/mach/ddr2_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/ddr2_defs.h rename to arch/arm/mach-davinci/include/mach/ddr2_defs.h diff --git a/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h b/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/dm365_lowlevel.h rename to arch/arm/mach-davinci/include/mach/dm365_lowlevel.h diff --git a/arch/arm/include/asm/arch-davinci/emac_defs.h b/arch/arm/mach-davinci/include/mach/emac_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/emac_defs.h rename to arch/arm/mach-davinci/include/mach/emac_defs.h diff --git a/arch/arm/include/asm/arch-davinci/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/gpio.h rename to arch/arm/mach-davinci/include/mach/gpio.h diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/hardware.h rename to arch/arm/mach-davinci/include/mach/hardware.h diff --git a/arch/arm/include/asm/arch-davinci/i2c_defs.h b/arch/arm/mach-davinci/include/mach/i2c_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/i2c_defs.h rename to arch/arm/mach-davinci/include/mach/i2c_defs.h diff --git a/arch/arm/include/asm/arch-davinci/pinmux_defs.h b/arch/arm/mach-davinci/include/mach/pinmux_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/pinmux_defs.h rename to arch/arm/mach-davinci/include/mach/pinmux_defs.h diff --git a/arch/arm/include/asm/arch-davinci/pll_defs.h b/arch/arm/mach-davinci/include/mach/pll_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/pll_defs.h rename to arch/arm/mach-davinci/include/mach/pll_defs.h diff --git a/arch/arm/include/asm/arch-davinci/psc_defs.h b/arch/arm/mach-davinci/include/mach/psc_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/psc_defs.h rename to arch/arm/mach-davinci/include/mach/psc_defs.h diff --git a/arch/arm/include/asm/arch-davinci/sdmmc_defs.h b/arch/arm/mach-davinci/include/mach/sdmmc_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/sdmmc_defs.h rename to arch/arm/mach-davinci/include/mach/sdmmc_defs.h diff --git a/arch/arm/include/asm/arch-davinci/syscfg_defs.h b/arch/arm/mach-davinci/include/mach/syscfg_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/syscfg_defs.h rename to arch/arm/mach-davinci/include/mach/syscfg_defs.h diff --git a/arch/arm/include/asm/arch-davinci/timer_defs.h b/arch/arm/mach-davinci/include/mach/timer_defs.h similarity index 100% rename from arch/arm/include/asm/arch-davinci/timer_defs.h rename to arch/arm/mach-davinci/include/mach/timer_defs.h From ea3857230c2d7428e8c22a9d063b4a5b86b34a0c Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:15 +0900 Subject: [PATCH 154/222] ARM: kirkwood: move SoC headers to mach-kirkwood/include/mach Move arch/arm/include/asm/arch-kirkwood/* -> arch/arm/mach-kirkwood/include/mach/* Signed-off-by: Masahiro Yamada Acked-by: Stefan Roese Cc: Prafulla Wadaskar Cc: Luka Perkov --- MAINTAINERS | 1 - .../asm/arch-kirkwood => mach-kirkwood/include/mach}/config.h | 0 .../asm/arch-kirkwood => mach-kirkwood/include/mach}/cpu.h | 0 .../asm/arch-kirkwood => mach-kirkwood/include/mach}/gpio.h | 0 .../arch-kirkwood => mach-kirkwood/include/mach}/kw88f6192.h | 0 .../arch-kirkwood => mach-kirkwood/include/mach}/kw88f6281.h | 0 .../asm/arch-kirkwood => mach-kirkwood/include/mach}/mpp.h | 0 .../asm/arch-kirkwood => mach-kirkwood/include/mach}/soc.h | 0 include/configs/km/km_arm.h | 2 +- 9 files changed, 1 insertion(+), 2 deletions(-) rename arch/arm/{include/asm/arch-kirkwood => mach-kirkwood/include/mach}/config.h (100%) rename arch/arm/{include/asm/arch-kirkwood => mach-kirkwood/include/mach}/cpu.h (100%) rename arch/arm/{include/asm/arch-kirkwood => mach-kirkwood/include/mach}/gpio.h (100%) rename arch/arm/{include/asm/arch-kirkwood => mach-kirkwood/include/mach}/kw88f6192.h (100%) rename arch/arm/{include/asm/arch-kirkwood => mach-kirkwood/include/mach}/kw88f6281.h (100%) rename arch/arm/{include/asm/arch-kirkwood => mach-kirkwood/include/mach}/mpp.h (100%) rename arch/arm/{include/asm/arch-kirkwood => mach-kirkwood/include/mach}/soc.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 7a3e963100..eef70d0f68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -99,7 +99,6 @@ M: Luka Perkov S: Maintained T: git git://git.denx.de/u-boot-marvell.git F: arch/arm/mach-kirkwood/ -F: arch/arm/include/asm/arch-kirkwood/ ARM MARVELL PXA M: Marek Vasut diff --git a/arch/arm/include/asm/arch-kirkwood/config.h b/arch/arm/mach-kirkwood/include/mach/config.h similarity index 100% rename from arch/arm/include/asm/arch-kirkwood/config.h rename to arch/arm/mach-kirkwood/include/mach/config.h diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h b/arch/arm/mach-kirkwood/include/mach/cpu.h similarity index 100% rename from arch/arm/include/asm/arch-kirkwood/cpu.h rename to arch/arm/mach-kirkwood/include/mach/cpu.h diff --git a/arch/arm/include/asm/arch-kirkwood/gpio.h b/arch/arm/mach-kirkwood/include/mach/gpio.h similarity index 100% rename from arch/arm/include/asm/arch-kirkwood/gpio.h rename to arch/arm/mach-kirkwood/include/mach/gpio.h diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6192.h b/arch/arm/mach-kirkwood/include/mach/kw88f6192.h similarity index 100% rename from arch/arm/include/asm/arch-kirkwood/kw88f6192.h rename to arch/arm/mach-kirkwood/include/mach/kw88f6192.h diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h similarity index 100% rename from arch/arm/include/asm/arch-kirkwood/kw88f6281.h rename to arch/arm/mach-kirkwood/include/mach/kw88f6281.h diff --git a/arch/arm/include/asm/arch-kirkwood/mpp.h b/arch/arm/mach-kirkwood/include/mach/mpp.h similarity index 100% rename from arch/arm/include/asm/arch-kirkwood/mpp.h rename to arch/arm/mach-kirkwood/include/mach/mpp.h diff --git a/arch/arm/include/asm/arch-kirkwood/soc.h b/arch/arm/mach-kirkwood/include/mach/soc.h similarity index 100% rename from arch/arm/include/asm/arch-kirkwood/soc.h rename to arch/arm/mach-kirkwood/include/mach/soc.h diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index f780f8b5bb..2ed0855fdd 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -195,7 +195,7 @@ } #ifndef __ASSEMBLY__ -#include +#include extern void __set_direction(unsigned pin, int high); void set_sda(int state); void set_scl(int state); From 5d0e6b28f3b35234211ac23c3687ef06c8c14fba Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:16 +0900 Subject: [PATCH 155/222] ARM: nomadik: move SoC headers to mach-nomadik/include/mach Move arch/arm/include/asm/arch-nomadik/* -> arch/arm/mach-nomadik/include/mach/* Signed-off-by: Masahiro Yamada Cc: Nomadik Linux Team Cc: Alessandro Rubini --- .../asm/arch-nomadik => mach-nomadik/include/mach}/gpio.h | 0 .../{include/asm/arch-nomadik => mach-nomadik/include/mach}/mtu.h | 0 2 files changed, 0 insertions(+), 0 deletions(-) rename arch/arm/{include/asm/arch-nomadik => mach-nomadik/include/mach}/gpio.h (100%) rename arch/arm/{include/asm/arch-nomadik => mach-nomadik/include/mach}/mtu.h (100%) diff --git a/arch/arm/include/asm/arch-nomadik/gpio.h b/arch/arm/mach-nomadik/include/mach/gpio.h similarity index 100% rename from arch/arm/include/asm/arch-nomadik/gpio.h rename to arch/arm/mach-nomadik/include/mach/gpio.h diff --git a/arch/arm/include/asm/arch-nomadik/mtu.h b/arch/arm/mach-nomadik/include/mach/mtu.h similarity index 100% rename from arch/arm/include/asm/arch-nomadik/mtu.h rename to arch/arm/mach-nomadik/include/mach/mtu.h From fd697ecf5d1797180c29328b013d48ee3a788e03 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:17 +0900 Subject: [PATCH 156/222] ARM: orion5x: move SoC headers to mach-orion5x/include/mach Move arch/arm/include/asm/arch-orion5x/* -> arch/arm/mach-orion5x/include/mach/* Signed-off-by: Masahiro Yamada Cc: Albert ARIBAUD --- .../{include/asm/arch-orion5x => mach-orion5x/include/mach}/cpu.h | 0 .../asm/arch-orion5x => mach-orion5x/include/mach}/mv88f5182.h | 0 .../asm/arch-orion5x => mach-orion5x/include/mach}/orion5x.h | 0 3 files changed, 0 insertions(+), 0 deletions(-) rename arch/arm/{include/asm/arch-orion5x => mach-orion5x/include/mach}/cpu.h (100%) rename arch/arm/{include/asm/arch-orion5x => mach-orion5x/include/mach}/mv88f5182.h (100%) rename arch/arm/{include/asm/arch-orion5x => mach-orion5x/include/mach}/orion5x.h (100%) diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h b/arch/arm/mach-orion5x/include/mach/cpu.h similarity index 100% rename from arch/arm/include/asm/arch-orion5x/cpu.h rename to arch/arm/mach-orion5x/include/mach/cpu.h diff --git a/arch/arm/include/asm/arch-orion5x/mv88f5182.h b/arch/arm/mach-orion5x/include/mach/mv88f5182.h similarity index 100% rename from arch/arm/include/asm/arch-orion5x/mv88f5182.h rename to arch/arm/mach-orion5x/include/mach/mv88f5182.h diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h similarity index 100% rename from arch/arm/include/asm/arch-orion5x/orion5x.h rename to arch/arm/mach-orion5x/include/mach/orion5x.h From dc7de222aa82cc962f15b5d04e1e4c6b0ab62398 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:18 +0900 Subject: [PATCH 157/222] ARM: keystone: move SoC headers to mach-keystone/include/mach Move arch/arm/include/asm/arch-keystone/* -> arch/arm/mach-keystone/include/mach/* Signed-off-by: Masahiro Yamada Cc: Tom Rini --- .../asm/arch-keystone => mach-keystone/include/mach}/clock-k2e.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/clock-k2hk.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/clock-k2l.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/clock.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/clock_defs.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/ddr3.h | 0 .../arch-keystone => mach-keystone/include/mach}/hardware-k2e.h | 0 .../arch-keystone => mach-keystone/include/mach}/hardware-k2hk.h | 0 .../arch-keystone => mach-keystone/include/mach}/hardware-k2l.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/hardware.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/i2c_defs.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/mon.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/msmc.h | 0 .../asm/arch-keystone => mach-keystone/include/mach}/psc_defs.h | 0 .../arch-keystone => mach-keystone/include/mach}/xhci-keystone.h | 0 15 files changed, 0 insertions(+), 0 deletions(-) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/clock-k2e.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/clock-k2hk.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/clock-k2l.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/clock.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/clock_defs.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/ddr3.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/hardware-k2e.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/hardware-k2hk.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/hardware-k2l.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/hardware.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/i2c_defs.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/mon.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/msmc.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/psc_defs.h (100%) rename arch/arm/{include/asm/arch-keystone => mach-keystone/include/mach}/xhci-keystone.h (100%) diff --git a/arch/arm/include/asm/arch-keystone/clock-k2e.h b/arch/arm/mach-keystone/include/mach/clock-k2e.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/clock-k2e.h rename to arch/arm/mach-keystone/include/mach/clock-k2e.h diff --git a/arch/arm/include/asm/arch-keystone/clock-k2hk.h b/arch/arm/mach-keystone/include/mach/clock-k2hk.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/clock-k2hk.h rename to arch/arm/mach-keystone/include/mach/clock-k2hk.h diff --git a/arch/arm/include/asm/arch-keystone/clock-k2l.h b/arch/arm/mach-keystone/include/mach/clock-k2l.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/clock-k2l.h rename to arch/arm/mach-keystone/include/mach/clock-k2l.h diff --git a/arch/arm/include/asm/arch-keystone/clock.h b/arch/arm/mach-keystone/include/mach/clock.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/clock.h rename to arch/arm/mach-keystone/include/mach/clock.h diff --git a/arch/arm/include/asm/arch-keystone/clock_defs.h b/arch/arm/mach-keystone/include/mach/clock_defs.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/clock_defs.h rename to arch/arm/mach-keystone/include/mach/clock_defs.h diff --git a/arch/arm/include/asm/arch-keystone/ddr3.h b/arch/arm/mach-keystone/include/mach/ddr3.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/ddr3.h rename to arch/arm/mach-keystone/include/mach/ddr3.h diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2e.h b/arch/arm/mach-keystone/include/mach/hardware-k2e.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/hardware-k2e.h rename to arch/arm/mach-keystone/include/mach/hardware-k2e.h diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h b/arch/arm/mach-keystone/include/mach/hardware-k2hk.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/hardware-k2hk.h rename to arch/arm/mach-keystone/include/mach/hardware-k2hk.h diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2l.h b/arch/arm/mach-keystone/include/mach/hardware-k2l.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/hardware-k2l.h rename to arch/arm/mach-keystone/include/mach/hardware-k2l.h diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/hardware.h rename to arch/arm/mach-keystone/include/mach/hardware.h diff --git a/arch/arm/include/asm/arch-keystone/i2c_defs.h b/arch/arm/mach-keystone/include/mach/i2c_defs.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/i2c_defs.h rename to arch/arm/mach-keystone/include/mach/i2c_defs.h diff --git a/arch/arm/include/asm/arch-keystone/mon.h b/arch/arm/mach-keystone/include/mach/mon.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/mon.h rename to arch/arm/mach-keystone/include/mach/mon.h diff --git a/arch/arm/include/asm/arch-keystone/msmc.h b/arch/arm/mach-keystone/include/mach/msmc.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/msmc.h rename to arch/arm/mach-keystone/include/mach/msmc.h diff --git a/arch/arm/include/asm/arch-keystone/psc_defs.h b/arch/arm/mach-keystone/include/mach/psc_defs.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/psc_defs.h rename to arch/arm/mach-keystone/include/mach/psc_defs.h diff --git a/arch/arm/include/asm/arch-keystone/xhci-keystone.h b/arch/arm/mach-keystone/include/mach/xhci-keystone.h similarity index 100% rename from arch/arm/include/asm/arch-keystone/xhci-keystone.h rename to arch/arm/mach-keystone/include/mach/xhci-keystone.h From 30ebf88f44917abf070ab899111cd2684000e204 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 20 Feb 2015 17:04:19 +0900 Subject: [PATCH 158/222] ARM: prepare for including This commit adds $(srctree)/arch/arm/$(machdirs)/include/mach to the headers search path. It allows us to replace "#include " with "#include ". As "#include " is still supported, we can modify each file one by one. Signed-off-by: Masahiro Yamada --- arch/arm/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 678ac132aa..878ae26ce4 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -19,6 +19,8 @@ machine-$(CONFIG_ARCH_VERSATILE) += versatile machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) +PLATFORM_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs)) + libs-y += $(machdirs) head-y := arch/arm/cpu/$(CPU)/start.o From a033171b2ece1f3575ab7277e7b862e7f611b3f6 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 16 Feb 2015 12:16:13 -0700 Subject: [PATCH 159/222] bcm2835/rpi: add SPDX license tags for some files Signed-off-by: Stephen Warren --- arch/arm/cpu/arm1176/bcm2835/Makefile | 12 ++---------- arch/arm/include/asm/arch-bcm2835/sdhci.h | 12 +----------- arch/arm/include/asm/arch-bcm2835/timer.h | 12 +----------- arch/arm/include/asm/arch-bcm2835/wdog.h | 12 +----------- board/raspberrypi/rpi/Makefile | 12 ++---------- board/raspberrypi/rpi/rpi.c | 12 +----------- include/configs/rpi.h | 12 +----------- 7 files changed, 9 insertions(+), 75 deletions(-) diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/cpu/arm1176/bcm2835/Makefile index 0ad36906df..7e5dbe1fde 100644 --- a/arch/arm/cpu/arm1176/bcm2835/Makefile +++ b/arch/arm/cpu/arm1176/bcm2835/Makefile @@ -1,15 +1,7 @@ # -# See file CREDITS for list of people who contributed to this -# project. +# (C) Copyright 2012 Stephen Warren # -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. +# SPDX-License-Identifier: GPL-2.0 # obj-y := lowlevel_init.o diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h b/arch/arm/include/asm/arch-bcm2835/sdhci.h index a4f867b2e9..da4d5cd5a8 100644 --- a/arch/arm/include/asm/arch-bcm2835/sdhci.h +++ b/arch/arm/include/asm/arch-bcm2835/sdhci.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef _BCM2835_SDHCI_H_ diff --git a/arch/arm/include/asm/arch-bcm2835/timer.h b/arch/arm/include/asm/arch-bcm2835/timer.h index c2001b6f93..2d7cfe5c56 100644 --- a/arch/arm/include/asm/arch-bcm2835/timer.h +++ b/arch/arm/include/asm/arch-bcm2835/timer.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef _BCM2835_TIMER_H diff --git a/arch/arm/include/asm/arch-bcm2835/wdog.h b/arch/arm/include/asm/arch-bcm2835/wdog.h index 303a65f32e..f369ab589c 100644 --- a/arch/arm/include/asm/arch-bcm2835/wdog.h +++ b/arch/arm/include/asm/arch-bcm2835/wdog.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef _BCM2835_TIMER_H diff --git a/board/raspberrypi/rpi/Makefile b/board/raspberrypi/rpi/Makefile index c53c92b1dd..4ce2c983b3 100644 --- a/board/raspberrypi/rpi/Makefile +++ b/board/raspberrypi/rpi/Makefile @@ -1,15 +1,7 @@ # -# See file CREDITS for list of people who contributed to this -# project. +# (C) Copyright 2012 Stephen Warren # -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. +# SPDX-License-Identifier: GPL-2.0 # obj-y := rpi.o diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 948078b958..fdbf87d6fa 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -1,17 +1,7 @@ /* * (C) Copyright 2012-2013 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #include diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 7ad8d08021..9b32149b0e 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -1,17 +1,7 @@ /* * (C) Copyright 2012 Stephen Warren * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef __CONFIG_H From db75356f14646a4bca7b712f2128435e97f55c17 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 16 Feb 2015 12:16:14 -0700 Subject: [PATCH 160/222] bcm2836 SoC support (used in Raspberry Pi 2 model B) The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. Signed-off-by: Stephen Warren --- arch/arm/cpu/armv7/Makefile | 1 + arch/arm/cpu/armv7/bcm2835/Makefile | 13 +++++++++++++ arch/arm/include/asm/arch-bcm2835/gpio.h | 5 +++++ arch/arm/include/asm/arch-bcm2835/mbox.h | 6 +++++- arch/arm/include/asm/arch-bcm2835/sdhci.h | 6 +++++- arch/arm/include/asm/arch-bcm2835/timer.h | 6 +++++- arch/arm/include/asm/arch-bcm2835/wdog.h | 6 +++++- 7 files changed, 39 insertions(+), 4 deletions(-) create mode 100644 arch/arm/cpu/armv7/bcm2835/Makefile diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 1a76982d6e..b228ed6a2e 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -39,6 +39,7 @@ endif obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/ obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/ +obj-$(CONFIG_BCM2835) += bcm2835/ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ diff --git a/arch/arm/cpu/armv7/bcm2835/Makefile b/arch/arm/cpu/armv7/bcm2835/Makefile new file mode 100644 index 0000000000..ed1ee4753d --- /dev/null +++ b/arch/arm/cpu/armv7/bcm2835/Makefile @@ -0,0 +1,13 @@ +# +# (C) Copyright 2012 Stephen Warren +# +# SPDX-License-Identifier: GPL-2.0+ +# + +src_dir := ../../arm1176/bcm2835/ + +obj-y := +obj-y += $(src_dir)/init.o +obj-y += $(src_dir)/reset.o +obj-y += $(src_dir)/timer.o +obj-y += $(src_dir)/mbox.o diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h b/arch/arm/include/asm/arch-bcm2835/gpio.h index db42896201..c8ef8f528a 100644 --- a/arch/arm/include/asm/arch-bcm2835/gpio.h +++ b/arch/arm/include/asm/arch-bcm2835/gpio.h @@ -1,6 +1,7 @@ /* * Copyright (C) 2012 Vikram Narayananan * + * (C) Copyright 2012,2015 Stephen Warren * * SPDX-License-Identifier: GPL-2.0+ */ @@ -8,7 +9,11 @@ #ifndef _BCM2835_GPIO_H_ #define _BCM2835_GPIO_H_ +#ifdef CONFIG_BCM2836 +#define BCM2835_GPIO_BASE 0x3f200000 +#else #define BCM2835_GPIO_BASE 0x20200000 +#endif #define BCM2835_GPIO_COUNT 54 #define BCM2835_GPIO_FSEL_MASK 0x7 diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h index 88d2ec11a7..c4bbacaf3c 100644 --- a/arch/arm/include/asm/arch-bcm2835/mbox.h +++ b/arch/arm/include/asm/arch-bcm2835/mbox.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2012 Stephen Warren + * (C) Copyright 2012,2015 Stephen Warren * * SPDX-License-Identifier: GPL-2.0+ */ @@ -38,7 +38,11 @@ /* Raw mailbox HW */ +#ifdef CONFIG_BCM2836 +#define BCM2835_MBOX_PHYSADDR 0x3f00b880 +#else #define BCM2835_MBOX_PHYSADDR 0x2000b880 +#endif struct bcm2835_mbox_regs { u32 read; diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h b/arch/arm/include/asm/arch-bcm2835/sdhci.h index da4d5cd5a8..2a21ccbf66 100644 --- a/arch/arm/include/asm/arch-bcm2835/sdhci.h +++ b/arch/arm/include/asm/arch-bcm2835/sdhci.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2012 Stephen Warren + * (C) Copyright 2012,2015 Stephen Warren * * SPDX-License-Identifier: GPL-2.0 */ @@ -7,7 +7,11 @@ #ifndef _BCM2835_SDHCI_H_ #define _BCM2835_SDHCI_H_ +#ifdef CONFIG_BCM2836 +#define BCM2835_SDHCI_BASE 0x3f300000 +#else #define BCM2835_SDHCI_BASE 0x20300000 +#endif int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); diff --git a/arch/arm/include/asm/arch-bcm2835/timer.h b/arch/arm/include/asm/arch-bcm2835/timer.h index 2d7cfe5c56..fc7aec7b7c 100644 --- a/arch/arm/include/asm/arch-bcm2835/timer.h +++ b/arch/arm/include/asm/arch-bcm2835/timer.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2012 Stephen Warren + * (C) Copyright 2012,2015 Stephen Warren * * SPDX-License-Identifier: GPL-2.0 */ @@ -7,7 +7,11 @@ #ifndef _BCM2835_TIMER_H #define _BCM2835_TIMER_H +#ifdef CONFIG_BCM2836 +#define BCM2835_TIMER_PHYSADDR 0x3f003000 +#else #define BCM2835_TIMER_PHYSADDR 0x20003000 +#endif struct bcm2835_timer_regs { u32 cs; diff --git a/arch/arm/include/asm/arch-bcm2835/wdog.h b/arch/arm/include/asm/arch-bcm2835/wdog.h index f369ab589c..beb6a08206 100644 --- a/arch/arm/include/asm/arch-bcm2835/wdog.h +++ b/arch/arm/include/asm/arch-bcm2835/wdog.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2012 Stephen Warren + * (C) Copyright 2012,2015 Stephen Warren * * SPDX-License-Identifier: GPL-2.0 */ @@ -7,7 +7,11 @@ #ifndef _BCM2835_TIMER_H #define _BCM2835_TIMER_H +#ifdef CONFIG_BCM2836 +#define BCM2835_WDOG_PHYSADDR 0x3f100000 +#else #define BCM2835_WDOG_PHYSADDR 0x20100000 +#endif struct bcm2835_wdog_regs { u32 unknown0[7]; From 46414296953410706e917cef9238926084e83a4b Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 16 Feb 2015 12:16:15 -0700 Subject: [PATCH 161/222] rpi: add support for Raspberry Pi 2 model B USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. Signed-off-by: Stephen Warren --- arch/arm/Kconfig | 5 + arch/arm/cpu/arm1176/bcm2835/Kconfig | 2 +- arch/arm/include/asm/arch-bcm2835/mbox.h | 4 + board/raspberrypi/rpi/rpi.c | 28 +++- board/raspberrypi/rpi_2/Kconfig | 15 ++ board/raspberrypi/rpi_2/MAINTAINERS | 6 + board/raspberrypi/rpi_2/Makefile | 7 + configs/rpi_2_defconfig | 4 + include/configs/rpi-common.h | 186 +++++++++++++++++++++++ include/configs/rpi.h | 168 +------------------- include/configs/rpi_2.h | 15 ++ 11 files changed, 271 insertions(+), 169 deletions(-) create mode 100644 board/raspberrypi/rpi_2/Kconfig create mode 100644 board/raspberrypi/rpi_2/MAINTAINERS create mode 100644 board/raspberrypi/rpi_2/Makefile create mode 100644 configs/rpi_2_defconfig create mode 100644 include/configs/rpi-common.h create mode 100644 include/configs/rpi_2.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 083823e8c4..820ba1ccab 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -310,6 +310,10 @@ config TARGET_RPI bool "Support rpi" select CPU_ARM1176 +config TARGET_RPI_2 + bool "Support rpi_2" + select CPU_V7 + config TARGET_TNETV107X_EVM bool "Support tnetv107x_evm" select CPU_ARM1176 @@ -830,6 +834,7 @@ source "board/phytec/pcm051/Kconfig" source "board/ppcag/bg0900/Kconfig" source "board/pxa255_idp/Kconfig" source "board/raspberrypi/rpi/Kconfig" +source "board/raspberrypi/rpi_2/Kconfig" source "board/samsung/smdk2410/Kconfig" source "board/sandisk/sansa_fuze_plus/Kconfig" source "board/scb9328/Kconfig" diff --git a/arch/arm/cpu/arm1176/bcm2835/Kconfig b/arch/arm/cpu/arm1176/bcm2835/Kconfig index 94f57d732f..162f973f6c 100644 --- a/arch/arm/cpu/arm1176/bcm2835/Kconfig +++ b/arch/arm/cpu/arm1176/bcm2835/Kconfig @@ -1,4 +1,4 @@ -if TARGET_RPI +if TARGET_RPI || TARGET_RPI_2 config DM default y if !SPL_BUILD diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h index c4bbacaf3c..04bf480a54 100644 --- a/arch/arm/include/asm/arch-bcm2835/mbox.h +++ b/arch/arm/include/asm/arch-bcm2835/mbox.h @@ -125,6 +125,9 @@ struct bcm2835_mbox_tag_hdr { #define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002 +#ifdef CONFIG_BCM2836 +#define BCM2836_BOARD_REV_2_B 0x4 +#else /* * 0x2..0xf from: * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/ @@ -145,6 +148,7 @@ struct bcm2835_mbox_tag_hdr { #define BCM2835_BOARD_REV_B_PLUS 0x10 #define BCM2835_BOARD_REV_CM 0x11 #define BCM2835_BOARD_REV_A_PLUS 0x12 +#endif struct bcm2835_mbox_tag_get_board_rev { struct bcm2835_mbox_tag_hdr tag_hdr; diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index fdbf87d6fa..50a699bb9e 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2012-2013 Stephen Warren + * (C) Copyright 2012-2013,2015 Stephen Warren * * SPDX-License-Identifier: GPL-2.0 */ @@ -29,7 +29,11 @@ U_BOOT_DEVICE(bcm2835_gpios) = { }; static const struct pl01x_serial_platdata serial_platdata = { +#ifdef CONFIG_BCM2836 + .base = 0x3f201000, +#else .base = 0x20201000, +#endif .type = TYPE_PL011, .clock = 3000000, }; @@ -77,9 +81,20 @@ static const struct { } models[] = { [0] = { "Unknown model", +#ifdef CONFIG_BCM2836 + "bcm2836-rpi-other.dtb", +#else "bcm2835-rpi-other.dtb", +#endif false, }, +#ifdef CONFIG_BCM2836 + [BCM2836_BOARD_REV_2_B] = { + "2 Model B", + "bcm2836-rpi-2-b.dtb", + true, + }, +#else [BCM2835_BOARD_REV_B_I2C0_2] = { "Model B (no P5)", "bcm2835-rpi-b-i2c0.dtb", @@ -150,6 +165,7 @@ static const struct { "bcm2835-rpi-a-plus.dtb", false, }, +#endif }; u32 rpi_board_rev = 0; @@ -257,7 +273,15 @@ static void get_board_rev(void) return; } + /* + * For details of old-vs-new scheme, see: + * https://github.com/pimoroni/RPi.version/blob/master/RPi/version.py + * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=99293&p=690282 + * (a few posts down) + */ rpi_board_rev = msg->get_board_rev.body.resp.rev; + if (rpi_board_rev & 0x800000) + rpi_board_rev = (rpi_board_rev >> 4) & 0xff; if (rpi_board_rev >= ARRAY_SIZE(models)) { printf("RPI: Board rev %u outside known range\n", rpi_board_rev); @@ -269,7 +293,7 @@ static void get_board_rev(void) } name = models[rpi_board_rev].name; - printf("RPI model: %s\n", name); + printf("RPI %s\n", name); } int board_init(void) diff --git a/board/raspberrypi/rpi_2/Kconfig b/board/raspberrypi/rpi_2/Kconfig new file mode 100644 index 0000000000..032184d5ad --- /dev/null +++ b/board/raspberrypi/rpi_2/Kconfig @@ -0,0 +1,15 @@ +if TARGET_RPI_2 + +config SYS_BOARD + default "rpi_2" + +config SYS_VENDOR + default "raspberrypi" + +config SYS_SOC + default "bcm2835" + +config SYS_CONFIG_NAME + default "rpi_2" + +endif diff --git a/board/raspberrypi/rpi_2/MAINTAINERS b/board/raspberrypi/rpi_2/MAINTAINERS new file mode 100644 index 0000000000..85a480c9d1 --- /dev/null +++ b/board/raspberrypi/rpi_2/MAINTAINERS @@ -0,0 +1,6 @@ +RPI_2 BOARD +M: Stephen Warren +S: Maintained +F: board/raspberrypi/rpi_2/ +F: include/configs/rpi_2.h +F: configs/rpi_2_defconfig diff --git a/board/raspberrypi/rpi_2/Makefile b/board/raspberrypi/rpi_2/Makefile new file mode 100644 index 0000000000..d82cd21f4c --- /dev/null +++ b/board/raspberrypi/rpi_2/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2012,2015 Stephen Warren +# +# SPDX-License-Identifier: GPL-2.0 +# + +obj-y := ../rpi/rpi.o diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig new file mode 100644 index 0000000000..b539d4a689 --- /dev/null +++ b/configs/rpi_2_defconfig @@ -0,0 +1,4 @@ +CONFIG_ARM=y +CONFIG_TARGET_RPI_2=y +CONFIG_SYS_MALLOC_F=y +CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h new file mode 100644 index 0000000000..3121ac9874 --- /dev/null +++ b/include/configs/rpi-common.h @@ -0,0 +1,186 @@ +/* + * (C) Copyright 2012,2015 Stephen Warren + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _RPI_COMMON_H_ +#define _RPI_COMMON_H_ + +#include + +/* Architecture, CPU, etc.*/ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_BCM2835 +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_SYS_DCACHE_OFF +/* + * 2835 is a SKU in a series for which the 2708 is the first or primary SoC, + * so 2708 has historically been used rather than a dedicated 2835 ID. + * + * We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation + * chose to use someone else's previously registered machine ID (3139, MX51_GGC) + * rather than obtaining a valid ID:-/ + */ +#ifndef CONFIG_BCM2836 +#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 +#endif + +/* Memory layout */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_TEXT_BASE 0x00008000 +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +/* + * The board really has 256M. However, the VC (VideoCore co-processor) shares + * the RAM, and uses a configurable portion at the top. We tell U-Boot that a + * smaller amount of RAM is present in order to avoid stomping on the area + * the VC uses. + */ +#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_SDRAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_MALLOC_LEN SZ_4M +#define CONFIG_SYS_MEMTEST_START 0x00100000 +#define CONFIG_SYS_MEMTEST_END 0x00200000 +#define CONFIG_LOADADDR 0x00200000 + +/* Flash */ +#define CONFIG_SYS_NO_FLASH + +/* Devices */ +/* GPIO */ +#define CONFIG_BCM2835_GPIO +/* LCD */ +#define CONFIG_LCD +#define CONFIG_LCD_DT_SIMPLEFB +#define LCD_BPP LCD_COLOR16 +/* + * Prevent allocation of RAM for FB; the real FB address is queried + * dynamically from the VideoCore co-processor, and comes from RAM + * not owned by the ARM CPU. + */ +#define CONFIG_FB_ADDR 0 +#define CONFIG_VIDEO_BCM2835 +#define CONFIG_SYS_WHITE_ON_BLACK + +/* SD/MMC configuration */ +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_MMC_SDHCI_IO_ACCESSORS +#define CONFIG_BCM2835_SDHCI + +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_DWC2 +#ifdef CONFIG_BCM2836 +#define CONFIG_USB_DWC2_REG_ADDR 0x3f980000 +#else +#define CONFIG_USB_DWC2_REG_ADDR 0x20980000 +#endif +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MISC_INIT_R +#endif + +/* Console UART */ +#define CONFIG_PL01X_SERIAL +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 + +/* Console configuration */ +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Environment */ +#define CONFIG_ENV_SIZE SZ_16K +#define CONFIG_ENV_IS_IN_FAT +#define FAT_ENV_INTERFACE "mmc" +#define FAT_ENV_DEVICE_AND_PART "0:1" +#define FAT_ENV_FILE "uboot.env" +#define CONFIG_FAT_WRITE +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_SYS_LOAD_ADDR 0x1000000 +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +/* Shell */ +#define CONFIG_SYS_MAXARGS 8 +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_COMMAND_HISTORY + +/* Commands */ +#include +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_MMC +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + +/* Device tree support */ +#define CONFIG_OF_BOARD_SETUP +/* ATAGs support for bootm/bootz */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG + +#include + +/* Some things don't make sense on this HW or yet */ +#undef CONFIG_CMD_FPGA + +/* Environment */ +#define ENV_DEVICE_SETTINGS \ + "stdin=serial,lcd\0" \ + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" + +/* + * Memory layout for where various images get loaded by boot scripts: + * + * scriptaddr can be pretty much anywhere that doesn't conflict with something + * else. Put it low in memory to avoid conflicts. + * + * pxefile_addr_r can be pretty much anywhere that doesn't conflict with + * something else. Put it low in memory to avoid conflicts. + * + * kernel_addr_r must be within the first 128M of RAM in order for the + * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will + * decompress itself to 0x8000 after the start of RAM, kernel_addr_r + * should not overlap that area, or the kernel will have to copy itself + * somewhere else before decompression. Similarly, the address of any other + * data passed to the kernel shouldn't overlap the start of RAM. Pushing + * this up to 16M allows for a sizable kernel to be decompressed below the + * compressed load address. + * + * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for + * the compressed kernel to be up to 16M too. + * + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * for the FDT/DTB to be up to 1M, which is hopefully plenty. + */ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00000000\0" \ + "pxefile_addr_r=0x00100000\0" \ + "kernel_addr_r=0x01000000\0" \ + "fdt_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" \ + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) +#include + +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_DEVICE_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV + +#define CONFIG_BOOTDELAY 2 + +#endif diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 9b32149b0e..ab2f4db39f 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2012 Stephen Warren + * (C) Copyright 2012,2015 Stephen Warren * * SPDX-License-Identifier: GPL-2.0 */ @@ -7,170 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include - -/* Architecture, CPU, etc.*/ -#define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_BCM2835 -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_SYS_DCACHE_OFF -/* - * 2835 is a SKU in a series for which the 2708 is the first or primary SoC, - * so 2708 has historically been used rather than a dedicated 2835 ID. - */ -#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 - -/* Memory layout */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_TEXT_BASE 0x00008000 -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE -/* - * The board really has 256M. However, the VC (VideoCore co-processor) shares - * the RAM, and uses a configurable portion at the top. We tell U-Boot that a - * smaller amount of RAM is present in order to avoid stomping on the area - * the VC uses. - */ -#define CONFIG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_SDRAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MALLOC_LEN SZ_4M -#define CONFIG_SYS_MEMTEST_START 0x00100000 -#define CONFIG_SYS_MEMTEST_END 0x00200000 -#define CONFIG_LOADADDR 0x00200000 - -/* Flash */ -#define CONFIG_SYS_NO_FLASH - -/* Devices */ -/* GPIO */ -#define CONFIG_BCM2835_GPIO -/* LCD */ -#define CONFIG_LCD -#define CONFIG_LCD_DT_SIMPLEFB -#define LCD_BPP LCD_COLOR16 -/* - * Prevent allocation of RAM for FB; the real FB address is queried - * dynamically from the VideoCore co-processor, and comes from RAM - * not owned by the ARM CPU. - */ -#define CONFIG_FB_ADDR 0 -#define CONFIG_VIDEO_BCM2835 -#define CONFIG_SYS_WHITE_ON_BLACK - -/* SD/MMC configuration */ -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_SDHCI -#define CONFIG_MMC_SDHCI_IO_ACCESSORS -#define CONFIG_BCM2835_SDHCI - -#define CONFIG_CMD_USB -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2 -#define CONFIG_USB_DWC2_REG_ADDR 0x20980000 -#define CONFIG_USB_STORAGE -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX -#define CONFIG_MISC_INIT_R -#endif - -/* Console UART */ -#define CONFIG_PL01X_SERIAL -#define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 115200 - -/* Console configuration */ -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -/* Environment */ -#define CONFIG_ENV_SIZE SZ_16K -#define CONFIG_ENV_IS_IN_FAT -#define FAT_ENV_INTERFACE "mmc" -#define FAT_ENV_DEVICE_AND_PART "0:1" -#define FAT_ENV_FILE "uboot.env" -#define CONFIG_FAT_WRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG -#define CONFIG_SYS_LOAD_ADDR 0x1000000 -#define CONFIG_CONSOLE_MUX -#define CONFIG_SYS_CONSOLE_IS_IN_ENV - -/* Shell */ -#define CONFIG_SYS_MAXARGS 8 -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_COMMAND_HISTORY - -/* Commands */ -#include -#define CONFIG_CMD_GPIO -#define CONFIG_CMD_MMC -#define CONFIG_PARTITION_UUIDS -#define CONFIG_CMD_PART - -/* Device tree support */ -#define CONFIG_OF_BOARD_SETUP -/* ATAGs support for bootm/bootz */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_CMDLINE_TAG -#define CONFIG_INITRD_TAG - -#include - -/* Some things don't make sense on this HW or yet */ -#undef CONFIG_CMD_FPGA - -/* Environment */ -#define ENV_DEVICE_SETTINGS \ - "stdin=serial,lcd\0" \ - "stdout=serial,lcd\0" \ - "stderr=serial,lcd\0" - -/* - * Memory layout for where various images get loaded by boot scripts: - * - * scriptaddr can be pretty much anywhere that doesn't conflict with something - * else. Put it low in memory to avoid conflicts. - * - * pxefile_addr_r can be pretty much anywhere that doesn't conflict with - * something else. Put it low in memory to avoid conflicts. - * - * kernel_addr_r must be within the first 128M of RAM in order for the - * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will - * decompress itself to 0x8000 after the start of RAM, kernel_addr_r - * should not overlap that area, or the kernel will have to copy itself - * somewhere else before decompression. Similarly, the address of any other - * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the - * compressed load address. - * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. - * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows - * for the FDT/DTB to be up to 1M, which is hopefully plenty. - */ -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00000000\0" \ - "pxefile_addr_r=0x00100000\0" \ - "kernel_addr_r=0x01000000\0" \ - "fdt_addr_r=0x02000000\0" \ - "ramdisk_addr_r=0x02100000\0" \ - -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) -#include - -#define CONFIG_EXTRA_ENV_SETTINGS \ - ENV_DEVICE_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - BOOTENV - -#define CONFIG_BOOTDELAY 2 +#include "rpi-common.h" #endif diff --git a/include/configs/rpi_2.h b/include/configs/rpi_2.h new file mode 100644 index 0000000000..2e7e74fd56 --- /dev/null +++ b/include/configs/rpi_2.h @@ -0,0 +1,15 @@ +/* + * (C) Copyright 2012,2015 Stephen Warren + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BCM2836 + +#include "rpi-common.h" + +#endif From 1de32b8a69eebdd208914c2a90dfb6cdd8ea8352 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 19 Feb 2015 20:34:32 +0100 Subject: [PATCH 162/222] sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- drivers/mmc/sunxi_mmc.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index ebfec7cf07..22335452c5 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -449,11 +449,7 @@ struct mmc *sunxi_mmc_init(int sdc_no) cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; cfg->host_caps = MMC_MODE_4BIT; - cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; -#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ - defined(CONFIG_MACH_SUN8I) || defined(CONFIG_MACH_SUN9I) - cfg->host_caps |= MMC_MODE_HC; -#endif + cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC; cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; cfg->f_min = 400000; From 636317c9eea8df0657fe702e1eddeedff605b0c7 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 16 Feb 2015 19:47:43 +0100 Subject: [PATCH 163/222] sunxi: Add support for the UTOO P66 tablet The UTOO P66 is a 6" A13 tablet / lcd ereader. It features a 6" 480x800 ips lcd screen, 512MB RAM & 4GB emmc. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- configs/UTOO_P66_defconfig | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 configs/UTOO_P66_defconfig diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig new file mode 100644 index 0000000000..919a4674d1 --- /dev/null +++ b/configs/UTOO_P66_defconfig @@ -0,0 +1,21 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" +CONFIG_FDTFILE="sun5i-a13-utoo-p66.dtb" +CONFIG_USB_MUSB_SUNXI=y +CONFIG_USB0_VBUS_PIN="PB04" +CONFIG_USB0_VBUS_DET="PG01" +CONFIG_VIDEO_LCD_MODE="x:480,y:800,depth:18,pclk_khz:25000,le:2,ri:93,up:2,lo:93,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_POWER="PG4" +CONFIG_VIDEO_LCD_RESET="PG11" +CONFIG_VIDEO_LCD_BL_EN="AXP0-1" +CONFIG_VIDEO_LCD_BL_PWM="PB2" +CONFIG_VIDEO_LCD_TL059WV5C0=y ++S:CONFIG_MMC_SUNXI_SLOT_EXTRA=2 ++S:CONFIG_MMC0_CD_PIN="PG0" ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_SUNXI=y ++S:CONFIG_MACH_SUN5I=y ++S:CONFIG_DRAM_CLK=432 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=0 From 52defe8f65700ad625c3ca63f723564210b2dc82 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 16 Feb 2015 22:13:43 +0100 Subject: [PATCH 164/222] sunxi: musb: Check Vbus-det before enabling otg port power Sending out 5V when there is a charger connected to the otg port is not a good idea, so check for this and error out. Note this commit currently breaks otg support on the q8h tablets, as we need to do some magic with the pmic there to get vbus info, this is deliberate (better safe then sorry), fixing this is on my TODO list. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- board/sunxi/Kconfig | 8 ++++++++ configs/Ampe_A76_defconfig | 1 + configs/Chuwi_V7_CW0825_defconfig | 1 + configs/Hyundai_A7HD_defconfig | 1 + configs/Inet_86VS_defconfig | 1 + configs/TZX-Q8-713B7_defconfig | 1 + drivers/usb/musb-new/sunxi.c | 29 +++++++++++++++++++++++++++++ 7 files changed, 42 insertions(+) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index f5471a14c5..9cf54e51ac 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -223,6 +223,14 @@ config USB0_VBUS_PIN Set the Vbus enable pin for usb0 (otg). This takes a string in the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. +config USB0_VBUS_DET + string "Vbus detect pin for usb0 (otg)" + depends on USB_MUSB_SUNXI + default "" + ---help--- + Set the Vbus detect pin for usb0 (otg). This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + config USB1_VBUS_PIN string "Vbus enable pin for usb1 (ehci0)" default "PH6" if MACH_SUN4I || MACH_SUN7I diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 2054fc3c96..f8ceb6cea6 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" CONFIG_FDTFILE="sun5i-a13-ampe-a76.dtb" CONFIG_USB_MUSB_SUNXI=y CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_USB0_VBUS_DET="PG01" CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 680b6317df..1ef23e4f16 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" CONFIG_FDTFILE="sun4i-a10-chuwi-v7-cw0825.dtb" CONFIG_USB_MUSB_SUNXI=y CONFIG_USB0_VBUS_PIN="PB9" +CONFIG_USB0_VBUS_DET="PH5" CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:51000,le:19,ri:300,up:6,lo:31,hs:1,vs:1,sync:3,vmode:0" CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 204640ee24..6b784e2408 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" CONFIG_FDTFILE="sun4i-a10-hyundai-a7hd.dtb" CONFIG_USB_MUSB_SUNXI=y CONFIG_USB0_VBUS_PIN="PB09" +CONFIG_USB0_VBUS_DET="PH5" CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="PH6" CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:45,ri:274,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0" diff --git a/configs/Inet_86VS_defconfig b/configs/Inet_86VS_defconfig index ce9985affe..50c073a2e5 100644 --- a/configs/Inet_86VS_defconfig +++ b/configs/Inet_86VS_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" CONFIG_FDTFILE="sun5i-a13-inet-86vs.dtb" CONFIG_USB_MUSB_SUNXI=y CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_USB0_VBUS_DET="PG1" CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" diff --git a/configs/TZX-Q8-713B7_defconfig b/configs/TZX-Q8-713B7_defconfig index 7b7b9ddf8e..c22286abe9 100644 --- a/configs/TZX-Q8-713B7_defconfig +++ b/configs/TZX-Q8-713B7_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" CONFIG_FDTFILE="sun5i-a13-tzx-q8-713b7.dtb" CONFIG_USB_MUSB_SUNXI=y CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_USB0_VBUS_DET="PG1" CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0" CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 4646a3d9fe..fe45db1e06 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -22,7 +22,9 @@ */ #include #include +#include #include +#include #include "linux-compat.h" #include "musb_core.h" @@ -224,6 +226,33 @@ static int sunxi_musb_init(struct musb *musb) pr_debug("%s():\n", __func__); + if (is_host_enabled(musb)) { + int vbus_det = sunxi_name_to_gpio(CONFIG_USB0_VBUS_DET); + if (vbus_det == -1) { + eprintf("Error invalid Vusb-det pin\n"); + return -EINVAL; + } + + err = gpio_request(vbus_det, "vbus0_det"); + if (err) + return err; + + err = gpio_direction_input(vbus_det); + if (err) { + gpio_free(vbus_det); + return err; + } + + err = gpio_get_value(vbus_det); + if (err) { + eprintf("Error: A charger is plugged into the OTG\n"); + gpio_free(vbus_det); + return -EIO; + } + + gpio_free(vbus_det); + } + err = sunxi_usbc_request_resources(0); if (err) return err; From f388a26d1132dae7ffe123cd7bd9adf78d4f7b57 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 19 Feb 2015 14:46:44 +0100 Subject: [PATCH 165/222] sunxi: Fix sun5i mbus speed when booting old kernels Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, halving the mbus frequency, so set it to 300 MHz ourselves and base the mbus divider on that. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h index d297ed0f73..c28ee0528f 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h @@ -144,7 +144,16 @@ struct sunxi_ccm_reg { #define PLL1_CFG_DEFAULT 0xa1005000 +#if defined CONFIG_OLD_SUNXI_KERNEL_COMPAT && defined CONFIG_MACH_SUN5I +/* + * Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, + * halving the mbus frequency, so set it to 300 MHz ourselves and base the + * mbus divider on that. + */ +#define PLL6_CFG_DEFAULT 0xa1009900 +#else #define PLL6_CFG_DEFAULT 0xa1009911 +#endif /* nand clock */ #define NAND_CLK_SRC_OSC24 0 From f3133962f469a8b6b9ba237ba670f0ca7c88a02e Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 20 Feb 2015 16:55:12 +0100 Subject: [PATCH 166/222] sunxi: Set the /chosen/stdout-path fdt property for sunxi boards While discussing with some people how to get the Linux kernel to do the right thing wrt sending output to both the serial console and the hdmi out / lcd screen when booting on ARM devices, Grant Likely pointed out that there already is a solution for this. All we need to do is set the /chosen/stdout-path fdt property, and if no console= arguments were specified on the kernel commandline the kernel will honor this and add this device as a console (next to the primary video output on hdmi). And u-boot already has support for setting this, all we need to do is define OF_STDOUT_PATH and then everything will just work ootb, without people needing to meddle with adding console= arguments in extlinux.conf . Signed-off-by: Hans de Goede Acked-by: Ian Campbell Reviewed-by: Tom Rini --- include/configs/sunxi-common.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index f5efebbf28..0b4f0a07b7 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -210,6 +210,20 @@ extern int soft_i2c_gpio_scl; #define CONFIG_CONS_INDEX 1 /* UART0 */ #endif +#if CONFIG_CONS_INDEX == 1 +#ifdef CONFIG_MACH_SUN9I +#define OF_STDOUT_PATH "/soc/serial@07000000:115200" +#else +#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" +#endif +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) +#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" +#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) +#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" +#else +#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. +#endif + /* GPIO */ #define CONFIG_SUNXI_GPIO #define CONFIG_SPL_GPIO_SUPPORT From 77ef136950b4649ff4844c3b72dab107a9c565a0 Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Sat, 21 Feb 2015 07:34:09 +0200 Subject: [PATCH 167/222] sunxi: Machine id hack to prevent loading buggy sunxi-3.4 kernels Right now U-Boot supports the CONFIG_OLD_SUNXI_KERNEL_COMPAT option, which makes it go out of its way in limiting the selection of PLL clock frequencies and PMIC voltages in order not to upset outdated buggy sunxi-3.4 kernel releases. And if the CONFIG_OLD_SUNXI_KERNEL_COMPAT option is not set, then booting such old kernels exhibits various failures at runtime. This is very user unfriendly, and there were already several incidents when people wasted their time being hit by these runtime failures and trying to debug them. The right solution is not to add hacks and workarounds to the mainline U-Boot, but to fix these bugs in the sunxi-3.4 kernel. And in fact, the updated sunxi-3.4 kernels already exist. Still we need to follow the 'Principle of Least Surprise' and U-Boot needs to ensure that the old buggy kernels are not getting happily booted when the CONFIG_OLD_SUNXI_KERNEL_COMPAT option is not set. And this patch addresses this particular issue. This patch makes U-Boot store the 'compatibility revision' number in the top 4 bits of the machine id and pass it to the kernel. The old buggy kernels will fail to load with a very much googlable error message on the serial console (the "r1 = 0x100010bb" part of it): "Error: unrecognized/unsupported machine ID (r1 = 0x100010bb)" This error message can be documented in the linux-sunxi wiki with proper explanations about how to resolve this situation and where to get the necessary bugfixes for the sunxi-3.4 kernel. The fixed sunxi-3.4 kernels implement a revision compatibility check and clear the top 4 bits of the machine id if everything is alright. By accepting the machine id with the bits 31:28 set to 1, the sunxi-3.4 kernel effectively certifies that it has the PLL5 clock speed and AXP209 DCDC3 voltage fixes applied. It is still possible to set the CONFIG_OLD_SUNXI_KERNEL_COMPAT option in U-Boot if the user desires to use an outdated unpatched sunxi-3.4 kernel. Signed-off-by: Siarhei Siamashka Acked-by: Ian Campbell Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sun4i.h | 4 ++-- include/configs/sun5i.h | 4 ++-- include/configs/sun7i.h | 4 ++-- include/configs/sunxi-common.h | 16 ++++++++++++++++ 4 files changed, 22 insertions(+), 6 deletions(-) diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index 87d269b041..1537e536f9 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -13,8 +13,6 @@ */ #define CONFIG_CLK_FULL_SPEED 1008000000 -#define CONFIG_MACH_TYPE 4104 - #ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 @@ -25,4 +23,6 @@ */ #include +#define CONFIG_MACH_TYPE (4104 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28)) + #endif /* __CONFIG_H */ diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h index 52e3a6ff01..e7555313db 100644 --- a/include/configs/sun5i.h +++ b/include/configs/sun5i.h @@ -13,8 +13,6 @@ */ #define CONFIG_CLK_FULL_SPEED 1008000000 -#define CONFIG_MACH_TYPE 4138 - #ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 @@ -25,4 +23,6 @@ */ #include +#define CONFIG_MACH_TYPE (4138 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28)) + #endif /* __CONFIG_H */ diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 7cd7890341..f817f73076 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -14,8 +14,6 @@ */ #define CONFIG_CLK_FULL_SPEED 912000000 -#define CONFIG_MACH_TYPE 4283 - #ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 @@ -31,4 +29,6 @@ */ #include +#define CONFIG_MACH_TYPE (4283 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28)) + #endif /* __CONFIG_H */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 0b4f0a07b7..bd7d049277 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -13,6 +13,22 @@ #ifndef _SUNXI_COMMON_CONFIG_H #define _SUNXI_COMMON_CONFIG_H +#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT +/* + * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the + * expense of restricting some features, so the regular machine id values can + * be used. + */ +# define CONFIG_MACH_TYPE_COMPAT_REV 0 +#else +/* + * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. + * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass + * beyond the machine id check. + */ +# define CONFIG_MACH_TYPE_COMPAT_REV 1 +#endif + /* * High Level Configuration Options */ From 4b7cee533630202095748ecb396bd9eacf47ff3f Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Fri, 23 Jan 2015 12:12:01 +0200 Subject: [PATCH 168/222] mmc: Implement SD/MMC versioning properly The SD/MMC version scheme was buggy when dealing with standard major.minor.change cases. Fix it by using something similar to the linux's kernel versioning method. Signed-off-by: Pantelis Antoniou Tested-by: Jaehoon Chung Reported-by: Stephen Warren Tested-by: Stephen Warren --- common/cmd_mmc.c | 8 +++++-- include/mmc.h | 56 ++++++++++++++++++++++++++++++++---------------- 2 files changed, 43 insertions(+), 21 deletions(-) diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 4e28c9d7a4..1335e3d344 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -85,8 +85,12 @@ static void print_mmcinfo(struct mmc *mmc) printf("Tran Speed: %d\n", mmc->tran_speed); printf("Rd Block Len: %d\n", mmc->read_bl_len); - printf("%s version %d.%d\n", IS_SD(mmc) ? "SD" : "MMC", - (mmc->version >> 8) & 0xf, mmc->version & 0xff); + printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC", + EXTRACT_SDMMC_MAJOR_VERSION(mmc->version), + EXTRACT_SDMMC_MINOR_VERSION(mmc->version)); + if (EXTRACT_SDMMC_CHANGE_VERSION(mmc->version) != 0) + printf(".%d", EXTRACT_SDMMC_CHANGE_VERSION(mmc->version)); + printf("\n"); printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No"); puts("Capacity: "); diff --git a/include/mmc.h b/include/mmc.h index 56d97bbdcf..7d6feca5b4 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -14,24 +14,41 @@ #include #include -#define SD_VERSION_SD 0x20000 -#define SD_VERSION_3 (SD_VERSION_SD | 0x300) -#define SD_VERSION_2 (SD_VERSION_SD | 0x200) -#define SD_VERSION_1_0 (SD_VERSION_SD | 0x100) -#define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a) -#define MMC_VERSION_MMC 0x10000 -#define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) -#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102) -#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104) -#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202) -#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300) -#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400) -#define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401) -#define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402) -#define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403) -#define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429) -#define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405) -#define MMC_VERSION_5_0 (MMC_VERSION_MMC | 0x500) +/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ +#define SD_VERSION_SD (1U << 31) +#define MMC_VERSION_MMC (1U << 30) + +#define MAKE_SDMMC_VERSION(a, b, c) \ + ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c)) +#define MAKE_SD_VERSION(a, b, c) \ + (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c)) +#define MAKE_MMC_VERSION(a, b, c) \ + (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c)) + +#define EXTRACT_SDMMC_MAJOR_VERSION(x) \ + (((u32)(x) >> 16) & 0xff) +#define EXTRACT_SDMMC_MINOR_VERSION(x) \ + (((u32)(x) >> 8) & 0xff) +#define EXTRACT_SDMMC_CHANGE_VERSION(x) \ + ((u32)(x) & 0xff) + +#define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0) +#define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0) +#define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0) +#define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0) + +#define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0) +#define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0) +#define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0) +#define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0) +#define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0) +#define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0) +#define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0) +#define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0) +#define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0) +#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1) +#define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0) +#define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0) #define MMC_MODE_HS (1 << 0) #define MMC_MODE_HS_52MHz (1 << 1) @@ -43,7 +60,8 @@ #define SD_DATA_4BIT 0x00040000 -#define IS_SD(x) (x->version & SD_VERSION_SD) +#define IS_SD(x) ((x)->version & SD_VERSION_SD) +#define IS_MMC(x) ((x)->version & SD_VERSION_MMC) #define MMC_DATA_READ 1 #define MMC_DATA_WRITE 2 From afc9e2b509a6db3b716c81c97f9147491ebf76ba Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Wed, 14 Jan 2015 17:37:53 +0900 Subject: [PATCH 169/222] mmc: dw_mmc: fixed the wrong bit control If mode is not DDR-mode, then it needs to clear it. Signed-off-by: Jaehoon Chung --- drivers/mmc/dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index b18c75dee2..76fa0b0534 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -321,7 +321,7 @@ static void dwmci_set_ios(struct mmc *mmc) if (mmc->ddr_mode) regs |= DWMCI_DDR_MODE; else - regs &= DWMCI_DDR_MODE; + regs &= ~DWMCI_DDR_MODE; dwmci_writel(host, DWMCI_UHS_REG, regs); From 3a33bb1874a75abde8872915f808945b6d20f6f2 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Wed, 4 Feb 2015 15:48:39 +0900 Subject: [PATCH 170/222] mmc: exynos_dw_mmc: set to clksel_val into board-init function "clksel_val" is assigned to property of mmc or defined value. But it doesn't write at initial sequence. There is a reason that get the wrong source-clock value. This patch fixed it. Signed-off-by: Jaehoon Chung --- drivers/mmc/exynos_dw_mmc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index dfa209bded..3936660892 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -64,6 +64,10 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) MPSCTRL_NON_SECURE_READ_BIT | MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID); } + + /* Set to clksel_val at initial time */ + if (host->clksel_val) + exynos_dwmci_clksel(host); } static int exynos_dwmci_core_init(struct dwmci_host *host, int index) From 5dab81cea5500558b7bfc43a7364ae7ed706d2fc Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Wed, 4 Feb 2015 15:48:40 +0900 Subject: [PATCH 171/222] mmc: exynos_dw_mmc: use the exynos specific data structure Clksel value is exynos specific value. It removed "clksel_val" into dwmci_host and created the "dwmci_exynos_priv_data" structure for exynos specific data. Signed-off-by: Jaehoon Chung --- drivers/mmc/exynos_dw_mmc.c | 60 +++++++++++++++++++++++++++++-------- include/dwmmc.h | 2 +- 2 files changed, 48 insertions(+), 14 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 3936660892..c66c0b0bf8 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -19,8 +19,13 @@ #define DWMMC_MAX_CH_NUM 4 #define DWMMC_MAX_FREQ 52000000 #define DWMMC_MIN_FREQ 400000 -#define DWMMC_MMC0_CLKSEL_VAL 0x03030001 -#define DWMMC_MMC2_CLKSEL_VAL 0x03020001 +#define DWMMC_MMC0_SDR_TIMING_VAL 0x03030001 +#define DWMMC_MMC2_SDR_TIMING_VAL 0x03020001 + +/* Exynos implmentation specific drver private data */ +struct dwmci_exynos_priv_data { + u32 sdr_timing; +}; /* * Function used as callback function to initialise the @@ -28,7 +33,9 @@ */ static void exynos_dwmci_clksel(struct dwmci_host *host) { - dwmci_writel(host, DWMCI_CLKSEL, host->clksel_val); + struct dwmci_exynos_priv_data *priv = host->priv; + + dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); } unsigned int exynos_dwmci_get_clk(struct dwmci_host *host) @@ -55,6 +62,8 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host) static void exynos_dwmci_board_init(struct dwmci_host *host) { + struct dwmci_exynos_priv_data *priv = host->priv; + if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { dwmci_writel(host, EMMCP_MPSBEGIN0, 0); dwmci_writel(host, EMMCP_SEND0, 0); @@ -65,8 +74,8 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID); } - /* Set to clksel_val at initial time */ - if (host->clksel_val) + /* Set to timing value at initial time */ + if (priv->sdr_timing) exynos_dwmci_clksel(host); } @@ -74,6 +83,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host, int index) { unsigned int div; unsigned long freq, sclk; + struct dwmci_exynos_priv_data *priv = host->priv; if (host->bus_hz) freq = host->bus_hz; @@ -92,11 +102,11 @@ static int exynos_dwmci_core_init(struct dwmci_host *host, int index) #endif host->board_init = exynos_dwmci_board_init; - if (!host->clksel_val) { + if (!priv->sdr_timing) { if (index == 0) - host->clksel_val = DWMMC_MMC0_CLKSEL_VAL; + priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL; else if (index == 2) - host->clksel_val = DWMMC_MMC2_CLKSEL_VAL; + priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL; } host->caps = MMC_MODE_DDR_52MHz; @@ -122,6 +132,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host, int index) int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) { struct dwmci_host *host = NULL; + struct dwmci_exynos_priv_data *priv; host = malloc(sizeof(struct dwmci_host)); if (!host) { @@ -129,11 +140,19 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) return -ENOMEM; } + priv = malloc(sizeof(struct dwmci_exynos_priv_data)); + if (!priv) { + error("dwmci_exynos_priv_data malloc fail!\n"); + return -ENOMEM; + } + host->ioaddr = (void *)regbase; host->buswidth = bus_width; if (clksel) - host->clksel_val = clksel; + priv->sdr_timing = clksel; + + host->priv = priv; return exynos_dwmci_core_init(host, index); } @@ -161,7 +180,14 @@ static int exynos_dwmci_get_config(const void *blob, int node, struct dwmci_host *host) { int err = 0; - u32 base, clksel_val, timing[3]; + u32 base, timing[3]; + struct dwmci_exynos_priv_data *priv; + + priv = malloc(sizeof(struct dwmci_exynos_priv_data)); + if (!priv) { + error("dwmci_exynos_priv_data malloc fail!\n"); + return -ENOMEM; + } /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); @@ -194,16 +220,24 @@ static int exynos_dwmci_get_config(const void *blob, int node, return -EINVAL; } - clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) | + priv->sdr_timing = (DWMCI_SET_SAMPLE_CLK(timing[0]) | DWMCI_SET_DRV_CLK(timing[1]) | DWMCI_SET_DIV_RATIO(timing[2])); - if (clksel_val) - host->clksel_val = clksel_val; + + /* sdr_timing didn't assigned anything, use the default value */ + if (!priv->sdr_timing) { + if (host->dev_index == 0) + priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL; + else if (host->dev_index == 2) + priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL; + } host->fifoth_val = fdtdec_get_int(blob, node, "fifoth_val", 0); host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); host->div = fdtdec_get_int(blob, node, "div", 0); + host->priv = priv; + return 0; } diff --git a/include/dwmmc.h b/include/dwmmc.h index 109f7c8ac7..86a54918f9 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -141,9 +141,9 @@ struct dwmci_host { int dev_index; int dev_id; int buswidth; - u32 clksel_val; u32 fifoth_val; struct mmc *mmc; + void *priv; void (*clksel)(struct dwmci_host *host); void (*board_init)(struct dwmci_host *host); From 1f3e877defc5a073f8e93c04e03f9a75f34dd595 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 19 Feb 2015 21:03:21 +0100 Subject: [PATCH 172/222] sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- drivers/mmc/sunxi_mmc.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index ebfec7cf07..22335452c5 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -449,11 +449,7 @@ struct mmc *sunxi_mmc_init(int sdc_no) cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; cfg->host_caps = MMC_MODE_4BIT; - cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; -#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ - defined(CONFIG_MACH_SUN8I) || defined(CONFIG_MACH_SUN9I) - cfg->host_caps |= MMC_MODE_HC; -#endif + cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC; cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; cfg->f_min = 400000; From 64029f7aeec4e843ab99297c24e0ef4f40267a6e Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Fri, 20 Feb 2015 12:29:26 +0100 Subject: [PATCH 173/222] mmc: exynos dwmmc: check boot mode before init dwmmc Before this commit, the mmc devices were always registered in the same order. So dwmmc channel 0 was registered as mmc 0, channel 1 as mmc 1, etc. In case of possibility to boot from more then one device, the CONFIG_SYS_MMC_ENV_DEV should always point to right mmc device. This can be achieved by init boot device as first, so it will be always registered as mmc 0. Thanks to this, the 'saveenv' command will work fine for all mmc boot devices. Exynos based boards usually uses mmc host channels configuration: - 0, or 0+1 for 8 bit - as a default boot device (usually eMMC) - 2 for 4bit - as an optional boot device (usually SD card slot) And usually the boot order is defined by OM pin configuration, which can be changed in a few ways, eg. - Odroid U3 - eMMC card insertion -> first boot from eMMC - Odroid X2/XU3 - boot priority jumper By this commit, Exynos dwmmc driver will check the OM pin configuration, and then try to init the boot device and register it as mmc 0. Signed-off-by: Przemyslaw Marczak Cc: Minkyu Kang Cc: Jaehoon Chung Cc: Pantelis Antoniou Cc: Simon Glass Cc: Akshay Saraswat --- drivers/mmc/exynos_dw_mmc.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index c66c0b0bf8..e083745235 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -196,7 +197,6 @@ static int exynos_dwmci_get_config(const void *blob, int node, if (host->dev_index == host->dev_id) host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; - /* Get the bus width from the device node */ host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 0); if (host->buswidth <= 0) { @@ -267,12 +267,21 @@ int exynos_dwmmc_init(const void *blob) { int compat_id; int node_list[DWMMC_MAX_CH_NUM]; + int boot_dev_node; int err = 0, count; compat_id = COMPAT_SAMSUNG_EXYNOS_DWMMC; count = fdtdec_find_aliases_for_id(blob, "mmc", compat_id, node_list, DWMMC_MAX_CH_NUM); + + /* For DWMMC always set boot device as mmc 0 */ + if (count >= 3 && get_boot_mode() == BOOT_MODE_SD) { + boot_dev_node = node_list[2]; + node_list[2] = node_list[0]; + node_list[0] = boot_dev_node; + } + err = exynos_dwmci_process_node(blob, node_list, count); return err; From 34dd928492fa020455d9b9f59fe4b643c0708306 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Fri, 20 Feb 2015 12:29:27 +0100 Subject: [PATCH 174/222] mmc: print SD/eMMC type for inited mmc devices Depending on the boot priority, the eMMC/SD cards, can be initialized with the same numbers for each boot. To be sure which mmc device is SD and which is eMMC, this info is printed by 'mmc list' command, when the init is done. Signed-off-by: Przemyslaw Marczak Cc: Pantelis Antoniou --- drivers/mmc/mmc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index b8039cd092..a13769ea25 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1693,11 +1693,19 @@ void print_mmc_devices(char separator) { struct mmc *m; struct list_head *entry; + char *mmc_type; list_for_each(entry, &mmc_devices) { m = list_entry(entry, struct mmc, link); + if (m->has_init) + mmc_type = IS_SD(m) ? "SD" : "eMMC"; + else + mmc_type = NULL; + printf("%s: %d", m->cfg->name, m->block_dev.dev); + if (mmc_type) + printf(" (%s)", mmc_type); if (entry->next != &mmc_devices) { printf("%c", separator); From f88a429f1179c9d9ab2883fba0ed0aa13c9bd72e Mon Sep 17 00:00:00 2001 From: Matt Reimer Date: Thu, 19 Feb 2015 11:22:53 -0700 Subject: [PATCH 175/222] mmc: sdhci: fix bus width switching on Samsung SoCs Fix bus width switching from 8-bit mode down to 4-bit or 1-bit modes on Samsung SoCs using SDHCI_QUIRK_USE_WIDE8. These SoCs report controller version 2.0 yet they support 8-bit bus widths. If 8-bit mode was previously enabled and then an operation like "mmc dev" caused a switch back down to 4-bit or 1-bit mode, WIDE8 was left set, causing failures. This problem was manifested by "mmc dev" timing out. Signed-off-by: Matt Reimer --- drivers/mmc/sdhci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index de88e19609..82d7984a51 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -374,7 +374,8 @@ static void sdhci_set_ios(struct mmc *mmc) (host->quirks & SDHCI_QUIRK_USE_WIDE8)) ctrl |= SDHCI_CTRL_8BITBUS; } else { - if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) + if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) || + (host->quirks & SDHCI_QUIRK_USE_WIDE8)) ctrl &= ~SDHCI_CTRL_8BITBUS; if (mmc->bus_width == 4) ctrl |= SDHCI_CTRL_4BITBUS; From 9c66ce662c076fc1f5e57c4e72126e41d56d0b80 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Tue, 6 Jan 2015 13:11:21 -0800 Subject: [PATCH 176/222] fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses This patch ensures that the TZPC (BP147) and TZASC-400 programming happens for LS2085A SoC only when the desired config flags are enabled and ensures that the TZPC programming is done to allow Non-secure (NS) + secure (S) transactions only for DCGF registers. The TZASC component is not present on LS2085A-Rev1, so the TZASC-400 config flag is turned OFF for now. Signed-off-by: Bhupesh Sharma Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S | 54 ++++++++++++++++++++ arch/arm/include/asm/arch-fsl-lsch3/config.h | 28 ++++++++++ doc/README.fsl-trustzone-components | 25 +++++++++ include/configs/ls2085a_common.h | 1 + 4 files changed, 108 insertions(+) create mode 100644 doc/README.fsl-trustzone-components diff --git a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S index 2a88aab283..c2837876b1 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S @@ -42,6 +42,60 @@ ENTRY(lowlevel_init) ldr x0, =secondary_boot_func blr x0 2: + +#ifdef CONFIG_FSL_TZPC_BP147 + /* Set Non Secure access for all devices protected via TZPC */ + ldr x1, =TZPCDECPROT_0_SET_BASE /* Decode Protection-0 Set Reg */ + orr w0, w0, #1 << 3 /* DCFG_RESET is accessible from NS world */ + str w0, [x1] + + isb + dsb sy +#endif + +#ifdef CONFIG_FSL_TZASC_400 + /* Set TZASC so that: + * a. We use only Region0 whose global secure write/read is EN + * b. We use only Region0 whose NSAID write/read is EN + * + * NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just + * placeholders. + */ + ldr x1, =TZASC_GATE_KEEPER(0) + ldr x0, [x1] /* Filter 0 Gate Keeper Register */ + orr x0, x0, #1 << 0 /* Set open_request for Filter 0 */ + str x0, [x1] + + ldr x1, =TZASC_GATE_KEEPER(1) + ldr x0, [x1] /* Filter 0 Gate Keeper Register */ + orr x0, x0, #1 << 0 /* Set open_request for Filter 0 */ + str x0, [x1] + + ldr x1, =TZASC_REGION_ATTRIBUTES_0(0) + ldr x0, [x1] /* Region-0 Attributes Register */ + orr x0, x0, #1 << 31 /* Set Sec global write en, Bit[31] */ + orr x0, x0, #1 << 30 /* Set Sec global read en, Bit[30] */ + str x0, [x1] + + ldr x1, =TZASC_REGION_ATTRIBUTES_0(1) + ldr x0, [x1] /* Region-1 Attributes Register */ + orr x0, x0, #1 << 31 /* Set Sec global write en, Bit[31] */ + orr x0, x0, #1 << 30 /* Set Sec global read en, Bit[30] */ + str x0, [x1] + + ldr x1, =TZASC_REGION_ID_ACCESS_0(0) + ldr w0, [x1] /* Region-0 Access Register */ + mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */ + str w0, [x1] + + ldr x1, =TZASC_REGION_ID_ACCESS_0(1) + ldr w0, [x1] /* Region-1 Attributes Register */ + mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */ + str w0, [x1] + + isb + dsb sy +#endif mov lr, x29 /* Restore LR */ ret ENDPROC(lowlevel_init) diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index da551e8839..d4f688b330 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -35,6 +35,34 @@ #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) #define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000) +/* TZ Protection Controller Definitions */ +#define TZPC_BASE 0x02200000 +#define TZPCR0SIZE_BASE (TZPC_BASE) +#define TZPCDECPROT_0_STAT_BASE (TZPC_BASE + 0x800) +#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804) +#define TZPCDECPROT_0_CLR_BASE (TZPC_BASE + 0x808) +#define TZPCDECPROT_1_STAT_BASE (TZPC_BASE + 0x80C) +#define TZPCDECPROT_1_SET_BASE (TZPC_BASE + 0x810) +#define TZPCDECPROT_1_CLR_BASE (TZPC_BASE + 0x814) +#define TZPCDECPROT_2_STAT_BASE (TZPC_BASE + 0x818) +#define TZPCDECPROT_2_SET_BASE (TZPC_BASE + 0x81C) +#define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820) + +/* TZ Address Space Controller Definitions */ +#define TZASC1_BASE 0x01100000 /* as per CCSR map. */ +#define TZASC2_BASE 0x01110000 /* as per CCSR map. */ +#define TZASC3_BASE 0x01120000 /* as per CCSR map. */ +#define TZASC4_BASE 0x01130000 /* as per CCSR map. */ +#define TZASC_BUILD_CONFIG_REG(x) ((TZASC1_BASE + (x * 0x10000))) +#define TZASC_ACTION_REG(x) ((TZASC1_BASE + (x * 0x10000)) + 0x004) +#define TZASC_GATE_KEEPER(x) ((TZASC1_BASE + (x * 0x10000)) + 0x008) +#define TZASC_REGION_BASE_LOW_0(x) ((TZASC1_BASE + (x * 0x10000)) + 0x100) +#define TZASC_REGION_BASE_HIGH_0(x) ((TZASC1_BASE + (x * 0x10000)) + 0x104) +#define TZASC_REGION_TOP_LOW_0(x) ((TZASC1_BASE + (x * 0x10000)) + 0x108) +#define TZASC_REGION_TOP_HIGH_0(x) ((TZASC1_BASE + (x * 0x10000)) + 0x10C) +#define TZASC_REGION_ATTRIBUTES_0(x) ((TZASC1_BASE + (x * 0x10000)) + 0x110) +#define TZASC_REGION_ID_ACCESS_0(x) ((TZASC1_BASE + (x * 0x10000)) + 0x114) + /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0x06000000 #define GICR_BASE 0x06100000 diff --git a/doc/README.fsl-trustzone-components b/doc/README.fsl-trustzone-components new file mode 100644 index 0000000000..a3afd1f5f4 --- /dev/null +++ b/doc/README.fsl-trustzone-components @@ -0,0 +1,25 @@ +Freescale ARM64 SoCs like LS2085A have ARM TrustZone components like +TZPC-BP147 (TrustZone Protection Controller) and TZASC-400 (TrustZone +Address Space Controller). + +While most of the configuration related programming of these peripherals +is left to a root-of-trust security software layer (running in EL3 +privilege mode), but still some configurations of these peripherals +might be required while the bootloader is executing in EL3 privilege +mode. The following sections define how to turn on these features for +LS2085A like SoCs. + +TZPC-BP147 (TrustZone Protection Controller) +============================================ +- Depends on CONFIG_FSL_TZPC_BP147 configuration flag. +- Separates Secure World and Normal World on-chip RAM (OCRAM) spaces. +- Provides a programming model to set access control policy via the TZPC + TZDECPROT Registers. + +TZASC-400 (TrustZone Address Space Controller) +============================================== +- Depends on CONFIG_FSL_TZASC_400 configuration flag. +- Separates Secure World and Normal World external memory spaces for bus masters + such as processors and DMA-equipped peripherals. +- Supports 8 fully programmable address regions, initially inactive at reset, + and one base region, always active, that covers the remaining address space. diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 6fe032c9ff..38984432b5 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -13,6 +13,7 @@ #define CONFIG_FSL_LSCH3 #define CONFIG_LS2085A #define CONFIG_GICV3 +#define CONFIG_FSL_TZPC_BP147 /* Link Definitions */ #define CONFIG_SYS_TEXT_BASE 0x30001000 From 6c747f4ad4eef87152f8d6de2169efe0a6a7a57f Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:11:22 -0800 Subject: [PATCH 177/222] armv8/fsl-lsch3: Change normal memory shareability According to hardware implementation, a single outer shareable global coherence group is defined. Inner shareable has not bee enabled. Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 6 +++--- arch/arm/include/asm/armv8/mmu.h | 3 ++- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 47b947f44f..ada1690ed9 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -150,7 +150,7 @@ static inline void final_mmu_setup(void) * set level 2 table 0 to cache-inhibit, covering 0 to 1GB */ section_l1t0 = 0; - section_l1t1 = BLOCK_SIZE_L0; + section_l1t1 = BLOCK_SIZE_L0 | PMD_SECT_OUTER_SHARE; section_l2 = 0; for (i = 0; i < 512; i++) { set_pgtable_section(level1_table_0, i, section_l1t0, @@ -168,10 +168,10 @@ static inline void final_mmu_setup(void) (u64)level2_table_0 | PMD_TYPE_TABLE; level1_table_0[2] = 0x80000000 | PMD_SECT_AF | PMD_TYPE_SECT | - PMD_ATTRINDX(MT_NORMAL); + PMD_SECT_OUTER_SHARE | PMD_ATTRINDX(MT_NORMAL); level1_table_0[3] = 0xc0000000 | PMD_SECT_AF | PMD_TYPE_SECT | - PMD_ATTRINDX(MT_NORMAL); + PMD_SECT_OUTER_SHARE | PMD_ATTRINDX(MT_NORMAL); /* Rewrite table to enable cache */ set_pgtable_section(level2_table_0, diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 4b7b67b643..4b9cb52965 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -65,7 +65,8 @@ /* * Section */ -#define PMD_SECT_S (3 << 8) +#define PMD_SECT_OUTER_SHARE (2 << 8) +#define PMD_SECT_INNER_SHARE (3 << 8) #define PMD_SECT_AF (1 << 10) #define PMD_SECT_NG (1 << 11) #define PMD_SECT_PXN (UL(1) << 53) From 60385d94e56513b50b87724fb9a3878ee5086da9 Mon Sep 17 00:00:00 2001 From: Arnab Basu Date: Tue, 6 Jan 2015 13:18:41 -0800 Subject: [PATCH 178/222] ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores U-Boot should only add "enable-method" and "cpu-release-address" properties to the "cpu" node of the online cores. Signed-off-by: Arnab Basu Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-lsch3/fdt.c | 23 ++++++++++++++--------- arch/arm/cpu/armv8/fsl-lsch3/mp.c | 8 ++++++++ arch/arm/cpu/armv8/fsl-lsch3/mp.h | 1 + 3 files changed, 23 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c index e392eb9149..2287e268a2 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c @@ -16,7 +16,7 @@ void ft_fixup_cpu(void *blob) __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr(); fdt32_t *reg; int addr_cells; - u64 val; + u64 val, core_id; size_t *boot_code_size = &(__secondary_boot_code_size); off = fdt_path_offset(blob, "/cpus"); @@ -29,15 +29,20 @@ void ft_fixup_cpu(void *blob) off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); while (off != -FDT_ERR_NOTFOUND) { reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); + core_id = of_read_number(reg, addr_cells); if (reg) { - val = spin_tbl_addr; - val += id_to_core(of_read_number(reg, addr_cells)) - * SPIN_TABLE_ELEM_SIZE; - val = cpu_to_fdt64(val); - fdt_setprop_string(blob, off, "enable-method", - "spin-table"); - fdt_setprop(blob, off, "cpu-release-addr", - &val, sizeof(val)); + if (core_id == 0 || (is_core_online(core_id))) { + val = spin_tbl_addr; + val += id_to_core(core_id) * + SPIN_TABLE_ELEM_SIZE; + val = cpu_to_fdt64(val); + fdt_setprop_string(blob, off, "enable-method", + "spin-table"); + fdt_setprop(blob, off, "cpu-release-addr", + &val, sizeof(val)); + } else { + debug("skipping offline core\n"); + } } else { puts("Warning: found cpu node without reg property\n"); } diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.c b/arch/arm/cpu/armv8/fsl-lsch3/mp.c index 94998bf37b..ce9c0c1bdb 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/mp.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.c @@ -83,6 +83,14 @@ int is_core_valid(unsigned int core) return !!((1 << core) & cpu_mask()); } +int is_core_online(u64 cpu_id) +{ + u64 *table; + int pos = id_to_core(cpu_id); + table = (u64 *)get_spin_tbl_addr() + pos * WORDS_PER_SPIN_TABLE_ENTRY; + return table[SPIN_TABLE_ELEM_STATUS_IDX] == 1; +} + int cpu_reset(int nr) { puts("Feature is not implemented.\n"); diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.h b/arch/arm/cpu/armv8/fsl-lsch3/mp.h index 06ac0bcf36..66144d6101 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/mp.h +++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.h @@ -32,5 +32,6 @@ int fsl_lsch3_wake_seconday_cores(void); void *get_spin_tbl_addr(void); phys_addr_t determine_mp_bootpg(void); void secondary_boot_func(void); +int is_core_online(u64 cpu_id); #endif #endif /* _FSL_CH3_MP_H */ From dcd468b8f43c5077c42c75b15cf3204e6b6be46c Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:42 -0800 Subject: [PATCH 179/222] armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using assembly function to guarantee stack is not used before flushing is completed. Timeout is needed for simualtor on which CCN-504 is not implemented. Return value can be checked for timeout situation. Change bootm.c to disable dcache instead of simply flushing, required by flushing L3. Signed-off-by: York Sun --- arch/arm/cpu/armv8/cache.S | 6 ++ arch/arm/cpu/armv8/cache_v8.c | 18 +++--- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 53 ----------------- arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S | 78 +++++++++++++++++++++++++ arch/arm/include/asm/system.h | 1 + arch/arm/lib/bootm.c | 2 +- 6 files changed, 97 insertions(+), 61 deletions(-) diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index 9c6e8243bb..fa447bce16 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -155,3 +155,9 @@ ENTRY(__asm_invalidate_icache_all) isb sy ret ENDPROC(__asm_invalidate_icache_all) + +ENTRY(__asm_flush_l3_cache) + mov x0, #0 /* return status as success */ + ret +ENDPROC(__asm_flush_l3_cache) + .weak __asm_flush_l3_cache diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 9dbcdf22af..c5ec5297cd 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -73,17 +73,21 @@ void invalidate_dcache_all(void) __asm_invalidate_dcache_all(); } -void __weak flush_l3_cache(void) -{ -} - /* - * Performs a clean & invalidation of the entire data cache at all levels + * Performs a clean & invalidation of the entire data cache at all levels. + * This function needs to be inline to avoid using stack. + * __asm_flush_l3_cache return status of timeout */ -void flush_dcache_all(void) +inline void flush_dcache_all(void) { + int ret; + __asm_flush_dcache_all(); - flush_l3_cache(); + ret = __asm_flush_l3_cache(); + if (ret) + debug("flushing dcache returns 0x%x\n", ret); + else + debug("flushing dcache successfully.\n"); } /* diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index ada1690ed9..2aaac017d2 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -242,59 +242,6 @@ int arch_cpu_init(void) return 0; } -/* - * flush_l3_cache - * Dickens L3 cache can be flushed by transitioning from FAM to SFONLY power - * state, by writing to HP-F P-state request register. - * Fixme: This function should moved to a common file if other SoCs also use - * the same Dickens. - */ -#define HNF0_PSTATE_REQ 0x04200010 -#define HNF1_PSTATE_REQ 0x04210010 -#define HNF2_PSTATE_REQ 0x04220010 -#define HNF3_PSTATE_REQ 0x04230010 -#define HNF4_PSTATE_REQ 0x04240010 -#define HNF5_PSTATE_REQ 0x04250010 -#define HNF6_PSTATE_REQ 0x04260010 -#define HNF7_PSTATE_REQ 0x04270010 -#define HNFPSTAT_MASK (0xFFFFFFFFFFFFFFFC) -#define HNFPSTAT_FAM 0x3 -#define HNFPSTAT_SFONLY 0x01 - -static void hnf_pstate_req(u64 *ptr, u64 state) -{ - int timeout = 1000; - out_le64(ptr, (in_le64(ptr) & HNFPSTAT_MASK) | (state & 0x3)); - ptr++; - /* checking if the transition is completed */ - while (timeout > 0) { - if (((in_le64(ptr) & 0x0c) >> 2) == (state & 0x3)) - break; - udelay(100); - timeout--; - } -} - -void flush_l3_cache(void) -{ - hnf_pstate_req((u64 *)HNF0_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF1_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF2_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF3_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF4_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF5_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF6_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF7_PSTATE_REQ, HNFPSTAT_SFONLY); - hnf_pstate_req((u64 *)HNF0_PSTATE_REQ, HNFPSTAT_FAM); - hnf_pstate_req((u64 *)HNF1_PSTATE_REQ, HNFPSTAT_FAM); - hnf_pstate_req((u64 *)HNF2_PSTATE_REQ, HNFPSTAT_FAM); - hnf_pstate_req((u64 *)HNF3_PSTATE_REQ, HNFPSTAT_FAM); - hnf_pstate_req((u64 *)HNF4_PSTATE_REQ, HNFPSTAT_FAM); - hnf_pstate_req((u64 *)HNF5_PSTATE_REQ, HNFPSTAT_FAM); - hnf_pstate_req((u64 *)HNF6_PSTATE_REQ, HNFPSTAT_FAM); - hnf_pstate_req((u64 *)HNF7_PSTATE_REQ, HNFPSTAT_FAM); -} - /* * This function is called from lib/board.c. * It recreates MMU table in main memory. MMU and d-cache are enabled earlier. diff --git a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S index c2837876b1..886576ef99 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S @@ -100,6 +100,84 @@ ENTRY(lowlevel_init) ret ENDPROC(lowlevel_init) +hnf_pstate_poll: + /* x0 has the desired status, return 0 for success, 1 for timeout + * clobber x1, x2, x3, x4, x6, x7 + */ + mov x1, x0 + mov x7, #0 /* flag for timeout */ + mrs x3, cntpct_el0 /* read timer */ + add x3, x3, #1200 /* timeout after 100 microseconds */ + mov x0, #0x18 + movk x0, #0x420, lsl #16 /* HNF0_PSTATE_STATUS */ + mov w6, #8 /* HN-F node count */ +1: + ldr x2, [x0] + cmp x2, x1 /* check status */ + b.eq 2f + mrs x4, cntpct_el0 + cmp x4, x3 + b.ls 1b + mov x7, #1 /* timeout */ + b 3f +2: + add x0, x0, #0x10000 /* move to next node */ + subs w6, w6, #1 + cbnz w6, 1b +3: + mov x0, x7 + ret + +hnf_set_pstate: + /* x0 has the desired state, clobber x1, x2, x6 */ + mov x1, x0 + /* power state to SFONLY */ + mov w6, #8 /* HN-F node count */ + mov x0, #0x10 + movk x0, #0x420, lsl #16 /* HNF0_PSTATE_REQ */ +1: /* set pstate to sfonly */ + ldr x2, [x0] + and x2, x2, #0xfffffffffffffffc /* & HNFPSTAT_MASK */ + orr x2, x2, x1 + str x2, [x0] + add x0, x0, #0x10000 /* move to next node */ + subs w6, w6, #1 + cbnz w6, 1b + + ret + +ENTRY(__asm_flush_l3_cache) + /* + * Return status in x0 + * success 0 + * tmeout 1 for setting SFONLY, 2 for FAM, 3 for both + */ + mov x29, lr + mov x8, #0 + + dsb sy + mov x0, #0x1 /* HNFPSTAT_SFONLY */ + bl hnf_set_pstate + + mov x0, #0x4 /* SFONLY status */ + bl hnf_pstate_poll + cbz x0, 1f + mov x8, #1 /* timeout */ +1: + dsb sy + mov x0, #0x3 /* HNFPSTAT_FAM */ + bl hnf_set_pstate + + mov x0, #0xc /* FAM status */ + bl hnf_pstate_poll + cbz x0, 1f + add x8, x8, #0x2 +1: + mov x0, x8 + mov lr, x29 + ret +ENDPROC(__asm_flush_l3_cache) + /* Keep literals not used by the secondary boot code outside it */ .ltorg diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 7820486df0..2a5bed2e46 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -70,6 +70,7 @@ void __asm_invalidate_dcache_all(void); void __asm_flush_dcache_range(u64 start, u64 end); void __asm_invalidate_tlb_all(void); void __asm_invalidate_icache_all(void); +int __asm_flush_l3_cache(void); void armv8_switch_to_el2(void); void armv8_switch_to_el1(void); diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 0c1298a31e..2d6b676154 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -191,7 +191,7 @@ __weak void setup_board_tags(struct tag **in_params) {} static void do_nonsec_virt_switch(void) { smp_kick_all_cpus(); - flush_dcache_all(); /* flush cache before swtiching to EL2 */ + dcache_disable(); /* flush cache before swtiching to EL2 */ armv8_switch_to_el2(); #ifdef CONFIG_ARMV8_SWITCH_TO_EL1 armv8_switch_to_el1(); From 32da3398b5199ae469ced423cfd7157934140e81 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:43 -0800 Subject: [PATCH 180/222] armv8/ls2085a: Enable cluster timebase for all clusters LS2085A and its variants can have up to four clusters. It is safe to enable timebase for all even some may be disabled. Signed-off-by: York Sun --- board/freescale/ls2085a/ls2085a.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index 163a4c486a..ee75d1b7ed 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -59,8 +59,15 @@ int timer_init(void) u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR; u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR; - out_le32(cltbenr, 0x1); /* enable cluster0 timebase */ - out_le32(cntcr, 0x1); /* enable clock for timer */ + /* Enable timebase for all clusters. + * It is safe to do so even some clusters are not enabled. + */ + out_le32(cltbenr, 0xf); + + /* Enable clock for timer + * This is a global setting. + */ + out_le32(cntcr, 0x1); return 0; } From 912cc40f767807fe87320b939cf4ce14aa01c1c4 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Tue, 6 Jan 2015 13:18:44 -0800 Subject: [PATCH 181/222] armv8/fsl-lsch3: Add fdt-fixup for clock frequency of the DUART nodes This patch adds the fdt-fixup logic for the clock frequency of the NS16550A related device tree nodes. Signed-off-by: Bhupesh Sharma Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-lsch3/fdt.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c index 2287e268a2..7eb9b6aa4b 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c @@ -60,4 +60,9 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_MP ft_fixup_cpu(blob); #endif + +#ifdef CONFIG_SYS_NS16550 + do_fixup_by_compat_u32(blob, "ns16550", + "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); +#endif } From 1f3402e7291afa3ba0a5f4da72640edaf2f65405 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:45 -0800 Subject: [PATCH 182/222] driver/ddr/fsl: Adjust CAS to preamble override for emulator On ZeBu emulator, CAS to preamble overrides need to be set to satisfy the timing. This only impact platforms with CONFIG_EMU. These should be set before MEM_EN is set. Signed-off-by: York Sun --- drivers/ddr/fsl/ctrl_regs.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 03d7ff17dd..b3477f04b7 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -2372,7 +2372,11 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts, #ifdef CONFIG_SYS_FSL_DDR_EMU /* disble DDR training for emulator */ ddr->debug[2] = 0x00000400; - ddr->debug[4] = 0xff800000; + ddr->debug[4] = 0xff800800; + ddr->debug[5] = 0x08000800; + ddr->debug[6] = 0x08000800; + ddr->debug[7] = 0x08000800; + ddr->debug[8] = 0x08000800; #endif #ifdef CONFIG_SYS_FSL_ERRATUM_A004508 if ((ip_rev >= 0x40000) && (ip_rev < 0x40400)) From 9955b4ab0187e0e9faac57acc01ebe7714d0ec23 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:47 -0800 Subject: [PATCH 183/222] driver/ddr/fsl: Add workaround for A008336 Erratum A008336 requires setting EDDRTQCR1[2] in DDRC DCSR space for 64-bit DDR controllers. Signed-off-by: York Sun --- arch/arm/include/asm/arch-fsl-lsch3/config.h | 5 +++++ drivers/ddr/fsl/fsl_ddr_gen4.c | 22 ++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index d4f688b330..256adb0a42 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -30,6 +30,11 @@ #define CONFIG_SYS_FSL_PMU_CLTBENR (CONFIG_SYS_FSL_PMU_ADDR + \ 0x18A0) +#define CONFIG_SYS_FSL_DCSR_DDR_ADDR 0x70012c000ULL +#define CONFIG_SYS_FSL_DCSR_DDR2_ADDR 0x70012d000ULL +#define CONFIG_SYS_FSL_DCSR_DDR3_ADDR 0x700132000ULL +#define CONFIG_SYS_FSL_DCSR_DDR4_ADDR 0x700133000ULL + #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01000000) #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01010000) #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 4eef047343..5c2579ed61 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -32,24 +32,39 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, u32 temp_sdram_cfg; u32 total_gb_size_per_controller; int timeout; +#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 + u32 *eddrtqcr1; +#endif switch (ctrl_num) { case 0: ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR; +#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 + eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR_ADDR + 0x800; +#endif break; #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1) case 1: ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; +#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 + eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR2_ADDR + 0x800; +#endif break; #endif #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2) case 2: ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; +#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 + eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR3_ADDR + 0x800; +#endif break; #endif #if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3) case 3: ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR; +#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 + eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR4_ADDR + 0x800; +#endif break; #endif default: @@ -60,6 +75,13 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, if (step == 2) goto step2; +#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 +#ifdef CONFIG_LS2085A + /* A008336 only applies to general DDR controllers */ + if ((ctrl_num == 0) || (ctrl_num == 1)) +#endif + ddr_out32(eddrtqcr1, 0x63b30002); +#endif if (regs->ddr_eor) ddr_out32(&ddr->eor, regs->ddr_eor); From 49fd1f3f265efc00d61effa995bd6a733bf273d8 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:48 -0800 Subject: [PATCH 184/222] driver/ddr/fsl: Add workround for erratumn A008514 Erratum A008514 workround requires writing register eddrtqcr1 with value 0x63b20002. Signed-off-by: York Sun --- drivers/ddr/fsl/fsl_ddr_gen4.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 5c2579ed61..9cca4a06dd 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -32,21 +32,24 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, u32 temp_sdram_cfg; u32 total_gb_size_per_controller; int timeout; -#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 +#if defined(CONFIG_SYS_FSL_ERRATUM_A008336) || \ + defined(CONFIG_SYS_FSL_ERRATUM_A008514) u32 *eddrtqcr1; #endif switch (ctrl_num) { case 0: ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR; -#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 +#if defined(CONFIG_SYS_FSL_ERRATUM_A008336) || \ + defined(CONFIG_SYS_FSL_ERRATUM_A008514) eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR_ADDR + 0x800; #endif break; #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1) case 1: ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; -#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 +#if defined(CONFIG_SYS_FSL_ERRATUM_A008336) || \ + defined(CONFIG_SYS_FSL_ERRATUM_A008514) eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR2_ADDR + 0x800; #endif break; @@ -54,7 +57,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2) case 2: ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; -#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 +#if defined(CONFIG_SYS_FSL_ERRATUM_A008336) || \ + defined(CONFIG_SYS_FSL_ERRATUM_A008514) eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR3_ADDR + 0x800; #endif break; @@ -62,7 +66,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, #if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3) case 3: ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR; -#ifdef CONFIG_SYS_FSL_ERRATUM_A008336 +#if defined(CONFIG_SYS_FSL_ERRATUM_A008336) || \ + defined(CONFIG_SYS_FSL_ERRATUM_A008514) eddrtqcr1 = (void *)CONFIG_SYS_FSL_DCSR_DDR4_ADDR + 0x800; #endif break; @@ -81,6 +86,13 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, if ((ctrl_num == 0) || (ctrl_num == 1)) #endif ddr_out32(eddrtqcr1, 0x63b30002); +#endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A008514 +#ifdef CONFIG_LS2085A + /* A008514 only applies to DP-DDR controler */ + if (ctrl_num == 2) +#endif + ddr_out32(eddrtqcr1, 0x63b20002); #endif if (regs->ddr_eor) ddr_out32(&ddr->eor, regs->ddr_eor); From b87e6f88e9218da3de371bb6cc8a34924153178e Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:49 -0800 Subject: [PATCH 185/222] armv8/fsl-lsch3: Add support for second DDR clock FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for general DDR controlers, and another clock for DP-DDR. DDR driver needs to change to support multiple clocks. Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 1 + arch/arm/cpu/armv8/fsl-lsch3/speed.c | 16 ++++++++++++++-- .../arm/include/asm/arch-fsl-lsch3/immap_lsch3.h | 3 +++ arch/arm/include/asm/global_data.h | 3 +++ 4 files changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 2aaac017d2..42cee65546 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -367,6 +367,7 @@ int print_cpuinfo(void) printf("\n Bus: %-4s MHz ", strmhz(buf, sysinfo.freq_systembus)); printf("DDR: %-4s MHz", strmhz(buf, sysinfo.freq_ddrbus)); + printf(" DP-DDR: %-4s MHz", strmhz(buf, sysinfo.freq_ddrbus2)); puts("\n"); return 0; diff --git a/arch/arm/cpu/armv8/fsl-lsch3/speed.c b/arch/arm/cpu/armv8/fsl-lsch3/speed.c index dc4a34bce5..72cd999c5f 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/speed.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/speed.c @@ -77,8 +77,10 @@ void get_sys_info(struct sys_info *sys_info) sys_info->freq_systembus = sysclk; #ifdef CONFIG_DDR_CLK_FREQ sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; + sys_info->freq_ddrbus2 = CONFIG_DDR_CLK_FREQ; #else sys_info->freq_ddrbus = sysclk; + sys_info->freq_ddrbus2 = sysclk; #endif sys_info->freq_systembus *= (in_le32(&gur->rcwsr[0]) >> @@ -87,6 +89,9 @@ void get_sys_info(struct sys_info *sys_info) sys_info->freq_ddrbus *= (in_le32(&gur->rcwsr[0]) >> FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_SHIFT) & FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_MASK; + sys_info->freq_ddrbus2 *= (in_le32(&gur->rcwsr[0]) >> + FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_SHIFT) & + FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_MASK; for (i = 0; i < CONFIG_SYS_FSL_NUM_CC_PLLS; i++) { /* @@ -129,7 +134,7 @@ int get_clocks(void) gd->cpu_clk = sys_info.freq_processor[0]; gd->bus_clk = sys_info.freq_systembus; gd->mem_clk = sys_info.freq_ddrbus; - + gd->arch.mem2_clk = sys_info.freq_ddrbus2; #if defined(CONFIG_FSL_ESDHC) gd->arch.sdhc_clk = gd->bus_clk / 2; #endif /* defined(CONFIG_FSL_ESDHC) */ @@ -156,11 +161,18 @@ ulong get_bus_freq(ulong dummy) * get_ddr_freq * return ddr bus freq in Hz *********************************************/ -ulong get_ddr_freq(ulong dummy) +ulong get_ddr_freq(ulong ctrl_num) { if (!gd->mem_clk) get_clocks(); + /* + * DDR controller 0 & 1 are on memory complex 0 + * DDR controler 2 is on memory complext 1 + */ + if (ctrl_num >= 2) + return gd->arch.mem2_clk; + return gd->mem_clk; } diff --git a/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h index ee1d6512d9..dd11ef79c8 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h @@ -15,6 +15,7 @@ struct sys_info { unsigned long freq_processor[CONFIG_MAX_CPUS]; unsigned long freq_systembus; unsigned long freq_ddrbus; + unsigned long freq_ddrbus2; unsigned long freq_localbus; unsigned long freq_qe; #ifdef CONFIG_SYS_DPAA_FMAN @@ -60,6 +61,8 @@ struct ccsr_gur { #define FSL_CHASSIS3_RCWSR0_SYS_PLL_RAT_MASK 0x1f #define FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_SHIFT 10 #define FSL_CHASSIS3_RCWSR0_MEM_PLL_RAT_MASK 0x3f +#define FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_SHIFT 18 +#define FSL_CHASSIS3_RCWSR0_MEM2_PLL_RAT_MASK 0x3f u8 res_180[0x200-0x180]; u32 scratchrw[32]; /* Scratch Read/Write */ u8 res_280[0x300-0x280]; diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 438f128326..bb24f33d0d 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -48,6 +48,9 @@ struct arch_global_data { #ifdef CONFIG_OMAP struct omap_boot_parameters omap_boot_params; #endif +#ifdef CONFIG_FSL_LSCH3 + unsigned long mem2_clk; +#endif }; #include From 03e664d8f4065010ccb6c75648192200a832fd8b Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:50 -0800 Subject: [PATCH 186/222] driver/ddr/fsl: Add support for multiple DDR clocks Controller number is passed for function calls to support individual DDR clock, depending on SoC implementation. It is backward compatible with exising platforms. Multiple clocks have been verifyed on LS2085A emulator. Signed-off-by: York Sun --- drivers/ddr/fsl/arm_ddr_gen3.c | 2 +- drivers/ddr/fsl/ctrl_regs.c | 208 +++++++++++++----------- drivers/ddr/fsl/ddr1_dimm_params.c | 18 +- drivers/ddr/fsl/ddr2_dimm_params.c | 12 +- drivers/ddr/fsl/ddr3_dimm_params.c | 8 +- drivers/ddr/fsl/ddr4_dimm_params.c | 8 +- drivers/ddr/fsl/fsl_ddr_gen4.c | 2 +- drivers/ddr/fsl/lc_common_dimm_params.c | 27 +-- drivers/ddr/fsl/main.c | 25 +-- drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 4 +- drivers/ddr/fsl/options.c | 6 +- drivers/ddr/fsl/util.c | 12 +- include/fsl_ddr.h | 15 +- include/fsl_ddr_dimm_params.h | 2 +- 14 files changed, 190 insertions(+), 159 deletions(-) diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c index c139da6da9..7160da4ec8 100644 --- a/drivers/ddr/fsl/arm_ddr_gen3.c +++ b/drivers/ddr/fsl/arm_ddr_gen3.c @@ -222,7 +222,7 @@ step2: bus_width = 3 - ((ddr_in32(&ddr->sdram_cfg) & SDRAM_CFG_DBW_MASK) >> SDRAM_CFG_DBW_SHIFT); timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / - (get_ddr_freq(0) >> 20)) << 1; + (get_ddr_freq(ctrl_num) >> 20)) << 1; total_gb_size_per_controller >>= 4; /* shift down to gb size */ debug("total %d GB\n", total_gb_size_per_controller); debug("Need to wait up to %d * 10ms\n", timeout); diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index b3477f04b7..713c3ed761 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -17,8 +17,6 @@ #include #include -unsigned int picos_to_mclk(unsigned int picos); - /* * Determine Rtt value. * @@ -78,10 +76,11 @@ static inline int fsl_ddr_get_rtt(void) * 16 for <= 2933MT/s * 18 for higher */ -static inline unsigned int compute_cas_write_latency(void) +static inline unsigned int compute_cas_write_latency( + const unsigned int ctrl_num) { unsigned int cwl; - const unsigned int mclk_ps = get_memory_clk_period_ps(); + const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); if (mclk_ps >= 1250) cwl = 9; else if (mclk_ps >= 1070) @@ -111,10 +110,11 @@ static inline unsigned int compute_cas_write_latency(void) * 11 if 0.935ns > tCK >= 0.833ns * 12 if 0.833ns > tCK >= 0.75ns */ -static inline unsigned int compute_cas_write_latency(void) +static inline unsigned int compute_cas_write_latency( + const unsigned int ctrl_num) { unsigned int cwl; - const unsigned int mclk_ps = get_memory_clk_period_ps(); + const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); if (mclk_ps >= 2500) cwl = 5; @@ -287,7 +287,8 @@ static inline int avoid_odt_overlap(const dimm_params_t *dimm_params) * Avoid writing for DDR I. The new PQ38 DDR controller * dreams up non-zero default values to be backwards compatible. */ -static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, +static void set_timing_cfg_0(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const dimm_params_t *dimm_params) { @@ -306,7 +307,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, /* Mode register set cycle time (tMRD). */ unsigned char tmrd_mclk; #if defined(CONFIG_SYS_FSL_DDR4) || defined(CONFIG_SYS_FSL_DDR3) - const unsigned int mclk_ps = get_memory_clk_period_ps(); + const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); #endif #ifdef CONFIG_SYS_FSL_DDR4 @@ -314,15 +315,15 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, int txp = max((int)mclk_ps * 4, 6000); /* unit=ps */ trwt_mclk = 2; twrt_mclk = 1; - act_pd_exit_mclk = picos_to_mclk(txp); + act_pd_exit_mclk = picos_to_mclk(ctrl_num, txp); pre_pd_exit_mclk = act_pd_exit_mclk; /* * MRS_CYC = max(tMRD, tMOD) * tMRD = 8nCK, tMOD = max(24nCK, 15ns) */ - tmrd_mclk = max(24U, picos_to_mclk(15000)); + tmrd_mclk = max(24U, picos_to_mclk(ctrl_num, 15000)); #elif defined(CONFIG_SYS_FSL_DDR3) - unsigned int data_rate = get_ddr_freq(0); + unsigned int data_rate = get_ddr_freq(ctrl_num); int txp; unsigned int ip_rev; int odt_overlap; @@ -344,7 +345,8 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, * tMRD = 4nCK (8nCK for RDIMM) * tMOD = max(12nCK, 15ns) */ - tmrd_mclk = max((unsigned int)12, picos_to_mclk(15000)); + tmrd_mclk = max((unsigned int)12, + picos_to_mclk(ctrl_num, 15000)); } else { /* * MRS_CYC = tMRD @@ -388,7 +390,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, taxpd_mclk = 1; } else { /* act_pd_exit_mclk = tXARD, see above */ - act_pd_exit_mclk = picos_to_mclk(txp); + act_pd_exit_mclk = picos_to_mclk(ctrl_num, txp); /* Mode register MR0[A12] is '1' - fast exit */ pre_pd_exit_mclk = act_pd_exit_mclk; taxpd_mclk = 1; @@ -424,11 +426,12 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, #endif /* !defined(CONFIG_SYS_FSL_DDR1) */ /* DDR SDRAM Timing Configuration 3 (TIMING_CFG_3) */ -static void set_timing_cfg_3(fsl_ddr_cfg_regs_t *ddr, - const memctl_options_t *popts, - const common_timing_params_t *common_dimm, - unsigned int cas_latency, - unsigned int additive_latency) +static void set_timing_cfg_3(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, + const memctl_options_t *popts, + const common_timing_params_t *common_dimm, + unsigned int cas_latency, + unsigned int additive_latency) { /* Extended precharge to activate interval (tRP) */ unsigned int ext_pretoact = 0; @@ -447,18 +450,18 @@ static void set_timing_cfg_3(fsl_ddr_cfg_regs_t *ddr, /* Control Adjust */ unsigned int cntl_adj = 0; - ext_pretoact = picos_to_mclk(common_dimm->trp_ps) >> 4; - ext_acttopre = picos_to_mclk(common_dimm->tras_ps) >> 4; - ext_acttorw = picos_to_mclk(common_dimm->trcd_ps) >> 4; + ext_pretoact = picos_to_mclk(ctrl_num, common_dimm->trp_ps) >> 4; + ext_acttopre = picos_to_mclk(ctrl_num, common_dimm->tras_ps) >> 4; + ext_acttorw = picos_to_mclk(ctrl_num, common_dimm->trcd_ps) >> 4; ext_caslat = (2 * cas_latency - 1) >> 4; ext_add_lat = additive_latency >> 4; #ifdef CONFIG_SYS_FSL_DDR4 - ext_refrec = (picos_to_mclk(common_dimm->trfc1_ps) - 8) >> 4; + ext_refrec = (picos_to_mclk(ctrl_num, common_dimm->trfc1_ps) - 8) >> 4; #else - ext_refrec = (picos_to_mclk(common_dimm->trfc_ps) - 8) >> 4; + ext_refrec = (picos_to_mclk(ctrl_num, common_dimm->trfc_ps) - 8) >> 4; /* ext_wrrec only deals with 16 clock and above, or 14 with OTF */ #endif - ext_wrrec = (picos_to_mclk(common_dimm->twr_ps) + + ext_wrrec = (picos_to_mclk(ctrl_num, common_dimm->twr_ps) + (popts->otf_burst_chop_en ? 2 : 0)) >> 4; ddr->timing_cfg_3 = (0 @@ -475,10 +478,11 @@ static void set_timing_cfg_3(fsl_ddr_cfg_regs_t *ddr, } /* DDR SDRAM Timing Configuration 1 (TIMING_CFG_1) */ -static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr, - const memctl_options_t *popts, - const common_timing_params_t *common_dimm, - unsigned int cas_latency) +static void set_timing_cfg_1(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, + const memctl_options_t *popts, + const common_timing_params_t *common_dimm, + unsigned int cas_latency) { /* Precharge-to-activate interval (tRP) */ unsigned char pretoact_mclk; @@ -510,9 +514,9 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr, 1, 2, 3, 4, 5, 6, 7, 8, 10, 10, 12, 12, 14, 14, 0, 0}; #endif - pretoact_mclk = picos_to_mclk(common_dimm->trp_ps); - acttopre_mclk = picos_to_mclk(common_dimm->tras_ps); - acttorw_mclk = picos_to_mclk(common_dimm->trcd_ps); + pretoact_mclk = picos_to_mclk(ctrl_num, common_dimm->trp_ps); + acttopre_mclk = picos_to_mclk(ctrl_num, common_dimm->tras_ps); + acttorw_mclk = picos_to_mclk(ctrl_num, common_dimm->trcd_ps); /* * Translate CAS Latency to a DDR controller field value: @@ -547,19 +551,19 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr, #endif #ifdef CONFIG_SYS_FSL_DDR4 - refrec_ctrl = picos_to_mclk(common_dimm->trfc1_ps) - 8; - wrrec_mclk = picos_to_mclk(common_dimm->twr_ps); - acttoact_mclk = max(picos_to_mclk(common_dimm->trrds_ps), 4U); - wrtord_mclk = max(2U, picos_to_mclk(2500)); + refrec_ctrl = picos_to_mclk(ctrl_num, common_dimm->trfc1_ps) - 8; + wrrec_mclk = picos_to_mclk(ctrl_num, common_dimm->twr_ps); + acttoact_mclk = max(picos_to_mclk(ctrl_num, common_dimm->trrds_ps), 4U); + wrtord_mclk = max(2U, picos_to_mclk(ctrl_num, 2500)); if ((wrrec_mclk < 1) || (wrrec_mclk > 24)) printf("Error: WRREC doesn't support %d clocks\n", wrrec_mclk); else wrrec_mclk = wrrec_table[wrrec_mclk - 1]; #else - refrec_ctrl = picos_to_mclk(common_dimm->trfc_ps) - 8; - wrrec_mclk = picos_to_mclk(common_dimm->twr_ps); - acttoact_mclk = picos_to_mclk(common_dimm->trrd_ps); - wrtord_mclk = picos_to_mclk(common_dimm->twtr_ps); + refrec_ctrl = picos_to_mclk(ctrl_num, common_dimm->trfc_ps) - 8; + wrrec_mclk = picos_to_mclk(ctrl_num, common_dimm->twr_ps); + acttoact_mclk = picos_to_mclk(ctrl_num, common_dimm->trrd_ps); + wrtord_mclk = picos_to_mclk(ctrl_num, common_dimm->twtr_ps); if ((wrrec_mclk < 1) || (wrrec_mclk > 16)) printf("Error: WRREC doesn't support %d clocks\n", wrrec_mclk); else @@ -602,11 +606,12 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr, } /* DDR SDRAM Timing Configuration 2 (TIMING_CFG_2) */ -static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr, - const memctl_options_t *popts, - const common_timing_params_t *common_dimm, - unsigned int cas_latency, - unsigned int additive_latency) +static void set_timing_cfg_2(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, + const memctl_options_t *popts, + const common_timing_params_t *common_dimm, + unsigned int cas_latency, + unsigned int additive_latency) { /* Additive latency */ unsigned char add_lat_mclk; @@ -623,7 +628,7 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr, /* Window for four activates (tFAW) */ unsigned short four_act; #ifdef CONFIG_SYS_FSL_DDR3 - const unsigned int mclk_ps = get_memory_clk_period_ps(); + const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); #endif /* FIXME add check that this must be less than acttorw_mclk */ @@ -641,13 +646,13 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr, #elif defined(CONFIG_SYS_FSL_DDR2) wr_lat = cas_latency - 1; #else - wr_lat = compute_cas_write_latency(); + wr_lat = compute_cas_write_latency(ctrl_num); #endif #ifdef CONFIG_SYS_FSL_DDR4 - rd_to_pre = picos_to_mclk(7500); + rd_to_pre = picos_to_mclk(ctrl_num, 7500); #else - rd_to_pre = picos_to_mclk(common_dimm->trtp_ps); + rd_to_pre = picos_to_mclk(ctrl_num, common_dimm->trtp_ps); #endif /* * JEDEC has some min requirements for tRTP @@ -665,19 +670,20 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr, wr_data_delay = popts->write_data_delay; #ifdef CONFIG_SYS_FSL_DDR4 cpo = 0; - cke_pls = max(3U, picos_to_mclk(5000)); + cke_pls = max(3U, picos_to_mclk(ctrl_num, 5000)); #elif defined(CONFIG_SYS_FSL_DDR3) /* * cke pulse = max(3nCK, 7.5ns) for DDR3-800 * max(3nCK, 5.625ns) for DDR3-1066, 1333 * max(3nCK, 5ns) for DDR3-1600, 1866, 2133 */ - cke_pls = max(3U, picos_to_mclk(mclk_ps > 1870 ? 7500 : - (mclk_ps > 1245 ? 5625 : 5000))); + cke_pls = max(3U, picos_to_mclk(ctrl_num, mclk_ps > 1870 ? 7500 : + (mclk_ps > 1245 ? 5625 : 5000))); #else cke_pls = FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR; #endif - four_act = picos_to_mclk(popts->tfaw_window_four_activates_ps); + four_act = picos_to_mclk(ctrl_num, + popts->tfaw_window_four_activates_ps); ddr->timing_cfg_2 = (0 | ((add_lat_mclk & 0xf) << 28) @@ -818,7 +824,8 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, } /* DDR SDRAM control configuration 2 (DDR_SDRAM_CFG_2) */ -static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const unsigned int unq_mrs_en) { @@ -865,7 +872,7 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr, #endif #if (CONFIG_SYS_FSL_DDR_VER >= FSL_DDR_VER_4_7) - slow = get_ddr_freq(0) < 1249000000; + slow = get_ddr_freq(ctrl_num) < 1249000000; #endif if (popts->registered_dimm_en) { @@ -915,7 +922,8 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr, #ifdef CONFIG_SYS_FSL_DDR4 /* DDR SDRAM Mode configuration 2 (DDR_SDRAM_MODE_2) */ -static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) @@ -926,10 +934,10 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, unsigned int wr_crc = 0; /* Disable */ unsigned int rtt_wr = 0; /* Rtt_WR - dynamic ODT off */ unsigned int srt = 0; /* self-refresh temerature, normal range */ - unsigned int cwl = compute_cas_write_latency() - 9; + unsigned int cwl = compute_cas_write_latency(ctrl_num) - 9; unsigned int mpr = 0; /* serial */ unsigned int wc_lat; - const unsigned int mclk_ps = get_memory_clk_period_ps(); + const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); if (popts->rtt_override) rtt_wr = popts->rtt_wr_override_value; @@ -1002,7 +1010,8 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, } #elif defined(CONFIG_SYS_FSL_DDR3) /* DDR SDRAM Mode configuration 2 (DDR_SDRAM_MODE_2) */ -static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) @@ -1013,7 +1022,7 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, unsigned int rtt_wr = 0; /* Rtt_WR - dynamic ODT off */ unsigned int srt = 0; /* self-refresh temerature, normal range */ unsigned int asr = 0; /* auto self-refresh disable */ - unsigned int cwl = compute_cas_write_latency() - 5; + unsigned int cwl = compute_cas_write_latency(ctrl_num) - 5; unsigned int pasr = 0; /* partial array self refresh disable */ if (popts->rtt_override) @@ -1077,7 +1086,8 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, #else /* for DDR2 and DDR1 */ /* DDR SDRAM Mode configuration 2 (DDR_SDRAM_MODE_2) */ -static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) @@ -1144,7 +1154,8 @@ static void set_ddr_sdram_mode_9(fsl_ddr_cfg_regs_t *ddr, } /* DDR SDRAM Mode configuration 10 (DDR_SDRAM_MODE_10) */ -static void set_ddr_sdram_mode_10(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_mode_10(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) @@ -1152,7 +1163,7 @@ static void set_ddr_sdram_mode_10(fsl_ddr_cfg_regs_t *ddr, int i; unsigned short esdmode6 = 0; /* Extended SDRAM mode 6 */ unsigned short esdmode7 = 0; /* Extended SDRAM mode 7 */ - unsigned int tccdl_min = picos_to_mclk(common_dimm->tccdl_ps); + unsigned int tccdl_min = picos_to_mclk(ctrl_num, common_dimm->tccdl_ps); esdmode6 = ((tccdl_min - 4) & 0x7) << 10; @@ -1196,14 +1207,15 @@ static void set_ddr_sdram_mode_10(fsl_ddr_cfg_regs_t *ddr, #endif /* DDR SDRAM Interval Configuration (DDR_SDRAM_INTERVAL) */ -static void set_ddr_sdram_interval(fsl_ddr_cfg_regs_t *ddr, - const memctl_options_t *popts, - const common_timing_params_t *common_dimm) +static void set_ddr_sdram_interval(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, + const memctl_options_t *popts, + const common_timing_params_t *common_dimm) { unsigned int refint; /* Refresh interval */ unsigned int bstopre; /* Precharge interval */ - refint = picos_to_mclk(common_dimm->refresh_rate_ps); + refint = picos_to_mclk(ctrl_num, common_dimm->refresh_rate_ps); bstopre = popts->bstopre; @@ -1217,7 +1229,8 @@ static void set_ddr_sdram_interval(fsl_ddr_cfg_regs_t *ddr, #ifdef CONFIG_SYS_FSL_DDR4 /* DDR SDRAM Mode configuration set (DDR_SDRAM_MODE) */ -static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_mode(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, @@ -1292,7 +1305,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, * 1=fast exit DLL on (tXP) */ - wr_mclk = picos_to_mclk(common_dimm->twr_ps); + wr_mclk = picos_to_mclk(ctrl_num, common_dimm->twr_ps); if (wr_mclk <= 24) { wr = wr_table[wr_mclk - 10]; } else { @@ -1387,7 +1400,8 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, #elif defined(CONFIG_SYS_FSL_DDR3) /* DDR SDRAM Mode configuration set (DDR_SDRAM_MODE) */ -static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_mode(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, @@ -1466,7 +1480,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, */ dll_on = 1; - wr_mclk = picos_to_mclk(common_dimm->twr_ps); + wr_mclk = picos_to_mclk(ctrl_num, common_dimm->twr_ps); if (wr_mclk <= 16) { wr = wr_table[wr_mclk - 5]; } else { @@ -1582,7 +1596,8 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, #else /* !CONFIG_SYS_FSL_DDR3 */ /* DDR SDRAM Mode configuration set (DDR_SDRAM_MODE) */ -static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, +static void set_ddr_sdram_mode(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, @@ -1654,7 +1669,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, #if defined(CONFIG_SYS_FSL_DDR1) wr = 0; /* Historical */ #elif defined(CONFIG_SYS_FSL_DDR2) - wr = picos_to_mclk(common_dimm->twr_ps); + wr = picos_to_mclk(ctrl_num, common_dimm->twr_ps); #endif dll_res = 0; mode = 0; @@ -1842,15 +1857,16 @@ static void set_timing_cfg_6(fsl_ddr_cfg_regs_t *ddr) debug("FSLDDR: timing_cfg_6 = 0x%08x\n", ddr->timing_cfg_6); } -static void set_timing_cfg_7(fsl_ddr_cfg_regs_t *ddr, - const common_timing_params_t *common_dimm) +static void set_timing_cfg_7(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, + const common_timing_params_t *common_dimm) { unsigned int txpr, tcksre, tcksrx; unsigned int cke_rst, cksre, cksrx, par_lat, cs_to_cmd; - txpr = max(5U, picos_to_mclk(common_dimm->trfc1_ps + 10000)); - tcksre = max(5U, picos_to_mclk(10000)); - tcksrx = max(5U, picos_to_mclk(10000)); + txpr = max(5U, picos_to_mclk(ctrl_num, common_dimm->trfc1_ps + 10000)); + tcksre = max(5U, picos_to_mclk(ctrl_num, 10000)); + tcksrx = max(5U, picos_to_mclk(ctrl_num, 10000)); par_lat = 0; cs_to_cmd = 0; @@ -1883,14 +1899,15 @@ static void set_timing_cfg_7(fsl_ddr_cfg_regs_t *ddr, debug("FSLDDR: timing_cfg_7 = 0x%08x\n", ddr->timing_cfg_7); } -static void set_timing_cfg_8(fsl_ddr_cfg_regs_t *ddr, +static void set_timing_cfg_8(const unsigned int ctrl_num, + fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency) { unsigned int rwt_bg, wrt_bg, rrt_bg, wwt_bg; unsigned int acttoact_bg, wrtord_bg, pre_all_rec; - unsigned int tccdl = picos_to_mclk(common_dimm->tccdl_ps); + unsigned int tccdl = picos_to_mclk(ctrl_num, common_dimm->tccdl_ps); unsigned int wr_lat = ((ddr->timing_cfg_2 & 0x00780000) >> 19) + ((ddr->timing_cfg_2 & 0x00040000) >> 14); @@ -1914,8 +1931,8 @@ static void set_timing_cfg_8(fsl_ddr_cfg_regs_t *ddr, wwt_bg = tccdl - 4; } - acttoact_bg = picos_to_mclk(common_dimm->trrdl_ps); - wrtord_bg = max(4U, picos_to_mclk(7500)); + acttoact_bg = picos_to_mclk(ctrl_num, common_dimm->trrdl_ps); + wrtord_bg = max(4U, picos_to_mclk(ctrl_num, 7500)); if (popts->otf_burst_chop_en) wrtord_bg += 2; @@ -2147,7 +2164,8 @@ check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr) } unsigned int -compute_fsl_memctl_config_regs(const memctl_options_t *popts, +compute_fsl_memctl_config_regs(const unsigned int ctrl_num, + const memctl_options_t *popts, fsl_ddr_cfg_regs_t *ddr, const common_timing_params_t *common_dimm, const dimm_params_t *dimm_params, @@ -2319,14 +2337,14 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts, set_ddr_eor(ddr, popts); #if !defined(CONFIG_SYS_FSL_DDR1) - set_timing_cfg_0(ddr, popts, dimm_params); + set_timing_cfg_0(ctrl_num, ddr, popts, dimm_params); #endif - set_timing_cfg_3(ddr, popts, common_dimm, cas_latency, + set_timing_cfg_3(ctrl_num, ddr, popts, common_dimm, cas_latency, additive_latency); - set_timing_cfg_1(ddr, popts, common_dimm, cas_latency); - set_timing_cfg_2(ddr, popts, common_dimm, - cas_latency, additive_latency); + set_timing_cfg_1(ctrl_num, ddr, popts, common_dimm, cas_latency); + set_timing_cfg_2(ctrl_num, ddr, popts, common_dimm, + cas_latency, additive_latency); set_ddr_cdr1(ddr, popts); set_ddr_cdr2(ddr, popts); @@ -2338,15 +2356,15 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts, if ((ip_rev > 0x40700) && (popts->cswl_override != 0)) ddr->debug[18] = popts->cswl_override; - set_ddr_sdram_cfg_2(ddr, popts, unq_mrs_en); - set_ddr_sdram_mode(ddr, popts, common_dimm, - cas_latency, additive_latency, unq_mrs_en); - set_ddr_sdram_mode_2(ddr, popts, common_dimm, unq_mrs_en); + set_ddr_sdram_cfg_2(ctrl_num, ddr, popts, unq_mrs_en); + set_ddr_sdram_mode(ctrl_num, ddr, popts, common_dimm, + cas_latency, additive_latency, unq_mrs_en); + set_ddr_sdram_mode_2(ctrl_num, ddr, popts, common_dimm, unq_mrs_en); #ifdef CONFIG_SYS_FSL_DDR4 set_ddr_sdram_mode_9(ddr, popts, common_dimm, unq_mrs_en); - set_ddr_sdram_mode_10(ddr, popts, common_dimm, unq_mrs_en); + set_ddr_sdram_mode_10(ctrl_num, ddr, popts, common_dimm, unq_mrs_en); #endif - set_ddr_sdram_interval(ddr, popts, common_dimm); + set_ddr_sdram_interval(ctrl_num, ddr, popts, common_dimm); set_ddr_data_init(ddr); set_ddr_sdram_clk_cntl(ddr, popts); set_ddr_init_addr(ddr); @@ -2356,8 +2374,8 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts, #ifdef CONFIG_SYS_FSL_DDR4 set_ddr_sdram_cfg_3(ddr, popts); set_timing_cfg_6(ddr); - set_timing_cfg_7(ddr, common_dimm); - set_timing_cfg_8(ddr, popts, common_dimm, cas_latency); + set_timing_cfg_7(ctrl_num, ddr, common_dimm); + set_timing_cfg_8(ctrl_num, ddr, popts, common_dimm, cas_latency); set_timing_cfg_9(ddr); set_ddr_dq_mapping(ddr, dimm_params); #endif diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c index 7df27b90b7..7f1c3afcc4 100644 --- a/drivers/ddr/fsl/ddr1_dimm_params.c +++ b/drivers/ddr/fsl/ddr1_dimm_params.c @@ -228,10 +228,10 @@ compute_derated_DDR1_CAS_latency(unsigned int mclk_ps) * * FIXME: use #define for the retvals */ -unsigned int -ddr_compute_dimm_parameters(const ddr1_spd_eeprom_t *spd, - dimm_params_t *pdimm, - unsigned int dimm_number) +unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, + const ddr1_spd_eeprom_t *spd, + dimm_params_t *pdimm, + unsigned int dimm_number) { unsigned int retval; @@ -311,16 +311,16 @@ ddr_compute_dimm_parameters(const ddr1_spd_eeprom_t *spd, & ~(1 << pdimm->caslat_x_minus_1)); /* Compute CAS latencies below that defined by SPD */ - pdimm->caslat_lowest_derated - = compute_derated_DDR1_CAS_latency(get_memory_clk_period_ps()); + pdimm->caslat_lowest_derated = compute_derated_DDR1_CAS_latency( + get_memory_clk_period_ps(ctrl_num)); /* Compute timing parameters */ pdimm->trcd_ps = spd->trcd * 250; pdimm->trp_ps = spd->trp * 250; pdimm->tras_ps = spd->tras * 1000; - pdimm->twr_ps = mclk_to_picos(3); - pdimm->twtr_ps = mclk_to_picos(1); + pdimm->twr_ps = mclk_to_picos(ctrl_num, 3); + pdimm->twtr_ps = mclk_to_picos(ctrl_num, 1); pdimm->trfc_ps = compute_trfc_ps_from_spd(0, spd->trfc); pdimm->trrd_ps = spd->trrd * 250; @@ -335,7 +335,7 @@ ddr_compute_dimm_parameters(const ddr1_spd_eeprom_t *spd, pdimm->tdh_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->data_hold); - pdimm->trtp_ps = mclk_to_picos(2); /* By the book. */ + pdimm->trtp_ps = mclk_to_picos(ctrl_num, 2); /* By the book. */ pdimm->tdqsq_max_ps = spd->tdqsq * 10; pdimm->tqhs_ps = spd->tqhs * 10; diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c index d865df78a8..49cc1a07ff 100644 --- a/drivers/ddr/fsl/ddr2_dimm_params.c +++ b/drivers/ddr/fsl/ddr2_dimm_params.c @@ -211,10 +211,10 @@ compute_derated_DDR2_CAS_latency(unsigned int mclk_ps) * * FIXME: use #define for the retvals */ -unsigned int -ddr_compute_dimm_parameters(const ddr2_spd_eeprom_t *spd, - dimm_params_t *pdimm, - unsigned int dimm_number) +unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, + const ddr2_spd_eeprom_t *spd, + dimm_params_t *pdimm, + unsigned int dimm_number) { unsigned int retval; @@ -310,8 +310,8 @@ ddr_compute_dimm_parameters(const ddr2_spd_eeprom_t *spd, & ~(1 << pdimm->caslat_x_minus_1)); /* Compute CAS latencies below that defined by SPD */ - pdimm->caslat_lowest_derated - = compute_derated_DDR2_CAS_latency(get_memory_clk_period_ps()); + pdimm->caslat_lowest_derated = compute_derated_DDR2_CAS_latency( + get_memory_clk_period_ps(ctrl_num)); /* Compute timing parameters */ pdimm->trcd_ps = spd->trcd * 250; diff --git a/drivers/ddr/fsl/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c index a4b8c101f5..69177150ec 100644 --- a/drivers/ddr/fsl/ddr3_dimm_params.c +++ b/drivers/ddr/fsl/ddr3_dimm_params.c @@ -83,10 +83,10 @@ compute_ranksize(const ddr3_spd_eeprom_t *spd) * Writes the results to the dimm_params_t structure pointed by pdimm. * */ -unsigned int -ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd, - dimm_params_t *pdimm, - unsigned int dimm_number) +unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, + const ddr3_spd_eeprom_t *spd, + dimm_params_t *pdimm, + unsigned int dimm_number) { unsigned int retval; unsigned int mtb_ps; diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c index aaddc8fa08..bbfb4ee417 100644 --- a/drivers/ddr/fsl/ddr4_dimm_params.c +++ b/drivers/ddr/fsl/ddr4_dimm_params.c @@ -119,10 +119,10 @@ compute_ranksize(const struct ddr4_spd_eeprom_s *spd) * Writes the results to the dimm_params_t structure pointed by pdimm. * */ -unsigned int -ddr_compute_dimm_parameters(const generic_spd_eeprom_t *spd, - dimm_params_t *pdimm, - unsigned int dimm_number) +unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, + const generic_spd_eeprom_t *spd, + dimm_params_t *pdimm, + unsigned int dimm_number) { unsigned int retval; int i; diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 9cca4a06dd..d9fce7d2f3 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -287,7 +287,7 @@ step2: bus_width = 3 - ((ddr_in32(&ddr->sdram_cfg) & SDRAM_CFG_DBW_MASK) >> SDRAM_CFG_DBW_SHIFT); timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / - (get_ddr_freq(0) >> 20)) << 2; + (get_ddr_freq(ctrl_num) >> 20)) << 2; total_gb_size_per_controller >>= 4; /* shift down to gb size */ debug("total %d GB\n", total_gb_size_per_controller); debug("Need to wait up to %d * 10ms\n", timeout); diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c index 73db444615..b295344c4d 100644 --- a/drivers/ddr/fsl/lc_common_dimm_params.c +++ b/drivers/ddr/fsl/lc_common_dimm_params.c @@ -13,7 +13,8 @@ #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4) static unsigned int -compute_cas_latency(const dimm_params_t *dimm_params, +compute_cas_latency(const unsigned int ctrl_num, + const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms) { @@ -22,7 +23,7 @@ compute_cas_latency(const dimm_params_t *dimm_params, unsigned int caslat_actual; unsigned int retry = 16; unsigned int tmp; - const unsigned int mclk_ps = get_memory_clk_period_ps(); + const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); #ifdef CONFIG_SYS_FSL_DDR3 const unsigned int taamax = 20000; #else @@ -72,12 +73,13 @@ compute_cas_latency(const dimm_params_t *dimm_params, } #else /* for DDR1 and DDR2 */ static unsigned int -compute_cas_latency(const dimm_params_t *dimm_params, +compute_cas_latency(const unsigned int ctrl_num, + const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms) { int i; - const unsigned int mclk_ps = get_memory_clk_period_ps(); + const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num); unsigned int lowest_good_caslat; unsigned int not_ok; unsigned int temp1, temp2; @@ -212,7 +214,8 @@ compute_cas_latency(const dimm_params_t *dimm_params, * by dimm_params. */ unsigned int -compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, +compute_lowest_common_dimm_parameters(const unsigned int ctrl_num, + const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, const unsigned int number_of_dimms) { @@ -442,7 +445,8 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, printf("ERROR: Mix different RDIMM detected!\n"); /* calculate cas latency for all DDR types */ - if (compute_cas_latency(dimm_params, outpdimm, number_of_dimms)) + if (compute_cas_latency(ctrl_num, dimm_params, + outpdimm, number_of_dimms)) return 1; /* Determine if all DIMMs ECC capable. */ @@ -518,11 +522,12 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, #if defined(CONFIG_SYS_FSL_DDR2) if ((outpdimm->lowest_common_spd_caslat < 4) && - (picos_to_mclk(trcd_ps) > outpdimm->lowest_common_spd_caslat)) { - additive_latency = picos_to_mclk(trcd_ps) - + (picos_to_mclk(ctrl_num, trcd_ps) > + outpdimm->lowest_common_spd_caslat)) { + additive_latency = picos_to_mclk(ctrl_num, trcd_ps) - outpdimm->lowest_common_spd_caslat; - if (mclk_to_picos(additive_latency) > trcd_ps) { - additive_latency = picos_to_mclk(trcd_ps); + if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { + additive_latency = picos_to_mclk(ctrl_num, trcd_ps); debug("setting additive_latency to %u because it was " " greater than tRCD_ps\n", additive_latency); } @@ -534,7 +539,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, * * AL <= tRCD(min) */ - if (mclk_to_picos(additive_latency) > trcd_ps) { + if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { printf("Error: invalid additive latency exceeds tRCD(min).\n"); return 1; } diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index 6f291ebc03..f49939b135 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -450,7 +450,8 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, &(pinfo->spd_installed_dimms[i][j]); dimm_params_t *pdimm = &(pinfo->dimm_params[i][j]); - retval = compute_dimm_parameters(spd, pdimm, i); + retval = compute_dimm_parameters( + i, spd, pdimm, j); #ifdef CONFIG_SYS_DDR_RAW_TIMING if (!i && !j && retval) { printf("SPD error on controller %d! " @@ -507,10 +508,11 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, for (i = first_ctrl; i <= last_ctrl; i++) { debug("Computing lowest common DIMM" " parameters for memctl=%u\n", i); - compute_lowest_common_dimm_parameters( - pinfo->dimm_params[i], - &timing_params[i], - CONFIG_DIMM_SLOTS_PER_CTLR); + compute_lowest_common_dimm_parameters + (i, + pinfo->dimm_params[i], + &timing_params[i], + CONFIG_DIMM_SLOTS_PER_CTLR); } case STEP_GATHER_OPTS: @@ -562,12 +564,13 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, continue; } - compute_fsl_memctl_config_regs( - &pinfo->memctl_opts[i], - &ddr_reg[i], &timing_params[i], - pinfo->dimm_params[i], - dbw_capacity_adjust[i], - size_only); + compute_fsl_memctl_config_regs + (i, + &pinfo->memctl_opts[i], + &ddr_reg[i], &timing_params[i], + pinfo->dimm_params[i], + dbw_capacity_adjust[i], + size_only); } default: diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c index 8f4d01ad85..6752d4d29e 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c @@ -426,7 +426,7 @@ step2: bus_width = 3 - ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) >> SDRAM_CFG_DBW_SHIFT); timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / - (get_ddr_freq(0) >> 20)) << 1; + (get_ddr_freq(ctrl_num) >> 20)) << 1; #ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 timeout_save = timeout; #endif @@ -538,12 +538,14 @@ step2: case 1: out_be32(&ddr->cs1_bnds, regs->cs[csn].bnds); break; +#if CONFIG_CHIP_SELECTS_PER_CTRL > 2 case 2: out_be32(&ddr->cs2_bnds, regs->cs[csn].bnds); break; case 3: out_be32(&ddr->cs3_bnds, regs->cs[csn].bnds); break; +#endif } clrbits_be32(&ddr->sdram_cfg, 0x2); } diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index 6d098d1fa2..5beb11b02b 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -732,7 +732,7 @@ unsigned int populate_memctl_options(int all_dimms_registered, #endif /* Global Timing Parameters. */ - debug("mclk_ps = %u ps\n", get_memory_clk_period_ps()); + debug("mclk_ps = %u ps\n", get_memory_clk_period_ps(ctrl_num)); /* Pick a caslat override. */ popts->cas_latency_override = 0; @@ -785,7 +785,7 @@ unsigned int populate_memctl_options(int all_dimms_registered, * FIXME: width, was considering looking at pdimm->primary_sdram_width */ #if defined(CONFIG_SYS_FSL_DDR1) - popts->tfaw_window_four_activates_ps = mclk_to_picos(1); + popts->tfaw_window_four_activates_ps = mclk_to_picos(ctrl_num, 1); #elif defined(CONFIG_SYS_FSL_DDR2) /* @@ -1036,7 +1036,7 @@ done: if (pdimm[0].n_ranks == 4) popts->quad_rank_present = 1; - ddr_freq = get_ddr_freq(0) / 1000000; + ddr_freq = get_ddr_freq(ctrl_num) / 1000000; if (popts->registered_dimm_en) { popts->rcw_override = 1; popts->rcw_1 = 0x000a5a00; diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index 58b519b403..ad569de27a 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -43,9 +43,9 @@ u32 fsl_ddr_get_version(void) * propagation, compute a suitably rounded mclk_ps to compute * a working memory controller configuration. */ -unsigned int get_memory_clk_period_ps(void) +unsigned int get_memory_clk_period_ps(const unsigned int ctrl_num) { - unsigned int data_rate = get_ddr_freq(0); + unsigned int data_rate = get_ddr_freq(ctrl_num); unsigned int result; /* Round to nearest 10ps, being careful about 64-bit multiply/divide */ @@ -59,10 +59,10 @@ unsigned int get_memory_clk_period_ps(void) } /* Convert picoseconds into DRAM clock cycles (rounding up if needed). */ -unsigned int picos_to_mclk(unsigned int picos) +unsigned int picos_to_mclk(const unsigned int ctrl_num, unsigned int picos) { unsigned long long clks, clks_rem; - unsigned long data_rate = get_ddr_freq(0); + unsigned long data_rate = get_ddr_freq(ctrl_num); /* Short circuit for zero picos */ if (!picos) @@ -88,9 +88,9 @@ unsigned int picos_to_mclk(unsigned int picos) return (unsigned int) clks; } -unsigned int mclk_to_picos(unsigned int mclk) +unsigned int mclk_to_picos(const unsigned int ctrl_num, unsigned int mclk) { - return get_memory_clk_period_ps() * mclk; + return get_memory_clk_period_ps(ctrl_num) * mclk; } #ifdef CONFIG_PPC diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 3286c95907..96fde91687 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -44,11 +44,12 @@ u32 fsl_ddr_get_version(void); * to this specific DDR technology. */ static __inline__ int -compute_dimm_parameters(const generic_spd_eeprom_t *spd, +compute_dimm_parameters(const unsigned int ctrl_num, + const generic_spd_eeprom_t *spd, dimm_params_t *pdimm, unsigned int dimm_number) { - return ddr_compute_dimm_parameters(spd, pdimm, dimm_number); + return ddr_compute_dimm_parameters(ctrl_num, spd, pdimm, dimm_number); } #endif @@ -92,13 +93,15 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, unsigned int size_only); const char *step_to_string(unsigned int step); -unsigned int compute_fsl_memctl_config_regs(const memctl_options_t *popts, +unsigned int compute_fsl_memctl_config_regs(const unsigned int ctrl_num, + const memctl_options_t *popts, fsl_ddr_cfg_regs_t *ddr, const common_timing_params_t *common_dimm, const dimm_params_t *dimm_parameters, unsigned int dbw_capacity_adjust, unsigned int size_only); unsigned int compute_lowest_common_dimm_parameters( + const unsigned int ctrl_num, const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms); @@ -108,9 +111,9 @@ unsigned int populate_memctl_options(int all_dimms_registered, unsigned int ctrl_num); void check_interleaving_options(fsl_ddr_info_t *pinfo); -unsigned int mclk_to_picos(unsigned int mclk); -unsigned int get_memory_clk_period_ps(void); -unsigned int picos_to_mclk(unsigned int picos); +unsigned int mclk_to_picos(const unsigned int ctrl_num, unsigned int mclk); +unsigned int get_memory_clk_period_ps(const unsigned int ctrl_num); +unsigned int picos_to_mclk(const unsigned int ctrl_num, unsigned int picos); void fsl_ddr_set_lawbar( const common_timing_params_t *memctl_common_params, unsigned int memctl_interleaved, diff --git a/include/fsl_ddr_dimm_params.h b/include/fsl_ddr_dimm_params.h index 09a67a6802..751e935117 100644 --- a/include/fsl_ddr_dimm_params.h +++ b/include/fsl_ddr_dimm_params.h @@ -112,7 +112,7 @@ typedef struct dimm_params_s { #endif } dimm_params_t; -extern unsigned int ddr_compute_dimm_parameters( +unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, const generic_spd_eeprom_t *spd, dimm_params_t *pdimm, unsigned int dimm_number); From 2aa44a2498b7316ddcd1284129f6ec4f8a4e4d5f Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:51 -0800 Subject: [PATCH 187/222] ARMv8/LS2085A: Enable auto precharge for DP-DDR DP-DDR benefits from auto precharge because of its specific application. Signed-off-by: York Sun --- board/freescale/ls2085a/ddr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/ls2085a/ddr.c b/board/freescale/ls2085a/ddr.c index b4a3fc9a9e..4884fa24d0 100644 --- a/board/freescale/ls2085a/ddr.c +++ b/board/freescale/ls2085a/ddr.c @@ -77,6 +77,7 @@ found: popts->data_bus_width = 1; popts->otf_burst_chop_en = 0; popts->burst_length = DDR_BL8; + popts->bstopre = 0; /* enable auto precharge */ } /* * Factors to consider for half-strength driver enable: From dc1437afd761e83497d94eae0d6dcc2c2ff4711f Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:52 -0800 Subject: [PATCH 188/222] driver/ddr/fsl: Fix a typo in timing_cfg_8 calculation wwt_bg should match rrt_bg. It was a typo in driver. Signed-off-by: York Sun --- drivers/ddr/fsl/ctrl_regs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 713c3ed761..690e73dacf 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -1928,7 +1928,7 @@ static void set_timing_cfg_8(const unsigned int ctrl_num, wwt_bg = tccdl - 4; } else { rrt_bg = tccdl - 2; - wwt_bg = tccdl - 4; + wwt_bg = tccdl - 2; } acttoact_bg = picos_to_mclk(ctrl_num, common_dimm->trrdl_ps); From 27f277fe33eb824308a4547d2e96bf511fb91d6b Mon Sep 17 00:00:00 2001 From: Kuldip Giroh Date: Tue, 6 Jan 2015 13:18:53 -0800 Subject: [PATCH 189/222] ARMv8/LS2085A: HugeTLB support is required by default in LS NADK LS NADK memory manager by default works on HugeTLB. Hence bootargs must include parameters default_hugepagesz (default hugepagesize, hugepagesz (hugepage size) and hugepages (number of hugepages to be reserved in kernel for the given size). Signed-off-by: Kuldip Giroh Reviewed-by: York Sun --- include/configs/ls2085a_common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 38984432b5..55e7307cbc 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -274,7 +274,9 @@ "console=ttyAMA0,38400n8\0" #define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \ - "earlyprintk=uart8250-8bit,0x21c0600" + "earlyprintk=uart8250-8bit,0x21c0600 " \ + "default_hugepagesz=2m hugepagesz=2m " \ + "hugepages=16" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 1 From 064d031ca6490d9641bbe308690b1f15b1f56077 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:54 -0800 Subject: [PATCH 190/222] ARMv8/LS2085A: Adjust system clock and DDR clock Set system clock to 100MHz and DDR clock to 133MHz. Signed-off-by: York Sun --- include/configs/ls2085a_common.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 55e7307cbc..387f904705 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -249,7 +249,8 @@ /* Physical Memory Map */ /* fixme: these need to be checked against the board */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_SYS_CLK_FREQ 133333333 +#define CONFIG_SYS_CLK_FREQ 100000000 +#define CONFIG_DDR_CLK_FREQ 133333333 #define CONFIG_NR_DRAM_BANKS 3 From e32d59a2fa6446b64167bba31c0dd40eb023e8bb Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:55 -0800 Subject: [PATCH 191/222] driver/ddr/fsl: Add sync of refresh Add sync of refresh for multiple DDR controllers. DDRC initialization needs to complete first. Code is re-ordered to keep refresh close. Signed-off-by: York Sun --- README | 3 +++ drivers/ddr/fsl/main.c | 4 +++ drivers/ddr/fsl/util.c | 55 ++++++++++++++++++++++++++++++++++++++++++ include/fsl_ddr.h | 2 ++ 4 files changed, 64 insertions(+) diff --git a/README b/README index ba57dc5617..6800b959ca 100644 --- a/README +++ b/README @@ -4916,6 +4916,9 @@ Low Level (hardware related) configuration options: - CONFIG_FSL_DDR_INTERACTIVE Enable interactive DDR debugging. See doc/README.fsl-ddr. +- CONFIG_FSL_DDR_SYNC_REFRESH + Enable sync of refresh for multiple controllers. + - CONFIG_SYS_83XX_DDR_USES_CS0 Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index f49939b135..b72b24290e 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -692,6 +692,10 @@ phys_size_t __fsl_ddr_sdram(fsl_ddr_info_t *pinfo) } } +#ifdef CONFIG_FSL_DDR_SYNC_REFRESH + fsl_ddr_sync_memctl_refresh(first_ctrl, last_ctrl); +#endif + #ifdef CONFIG_PPC /* program LAWs */ for (i = first_ctrl; i <= last_ctrl; i++) { diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index ad569de27a..664081b1b8 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -308,3 +308,58 @@ void board_add_ram_info(int use_default) { detail_board_ddr_info(); } + +#ifdef CONFIG_FSL_DDR_SYNC_REFRESH +#define DDRC_DEBUG20_INIT_DONE 0x80000000 +#define DDRC_DEBUG2_RF 0x00000040 +void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl, + unsigned int last_ctrl) +{ + unsigned int i; + u32 ddrc_debug20; + u32 ddrc_debug2[CONFIG_NUM_DDR_CONTROLLERS] = {}; + u32 *ddrc_debug2_p[CONFIG_NUM_DDR_CONTROLLERS] = {}; + struct ccsr_ddr __iomem *ddr; + + for (i = first_ctrl; i <= last_ctrl; i++) { + switch (i) { + case 0: + ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR; + break; +#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1) + case 1: + ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; + break; +#endif +#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2) + case 2: + ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; + break; +#endif +#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3) + case 3: + ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR; + break; +#endif + default: + printf("%s unexpected ctrl = %u\n", __func__, i); + return; + } + ddrc_debug20 = ddr_in32(&ddr->debug[19]); + ddrc_debug2_p[i] = &ddr->debug[1]; + while (!(ddrc_debug20 & DDRC_DEBUG20_INIT_DONE)) { + /* keep polling until DDRC init is done */ + udelay(100); + ddrc_debug20 = ddr_in32(&ddr->debug[19]); + } + ddrc_debug2[i] = ddr_in32(&ddr->debug[1]) | DDRC_DEBUG2_RF; + } + /* + * Sync refresh + * This is put together to make sure the refresh reqeusts are sent + * closely to each other. + */ + for (i = first_ctrl; i <= last_ctrl; i++) + ddr_out32(ddrc_debug2_p[i], ddrc_debug2[i]); +} +#endif /* CONFIG_FSL_DDR_SYNC_REFRESH */ diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 96fde91687..feccef9c9c 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -118,6 +118,8 @@ void fsl_ddr_set_lawbar( const common_timing_params_t *memctl_common_params, unsigned int memctl_interleaved, unsigned int ctrl_num); +void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl, + unsigned int last_ctrl); int fsl_ddr_interactive_env_var_exists(void); unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set); From 40e61f8e54f8262a6e85c127c5d9dc240253382a Mon Sep 17 00:00:00 2001 From: Arnab Basu Date: Tue, 6 Jan 2015 13:18:56 -0800 Subject: [PATCH 192/222] ARMv8/ls2085a: Switch to passing earlycon to kernel Since Linux v3.16-rc1 earlyprintk has been removed for arm64. Switch to using earlycon. Signed-off-by: Arnab Basu Signed-off-by: York Sun --- include/configs/ls2085a_common.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 387f904705..7e8d944dff 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -274,10 +274,10 @@ "kernel_size=0x1000000\0" \ "console=ttyAMA0,38400n8\0" -#define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \ - "earlyprintk=uart8250-8bit,0x21c0600 " \ - "default_hugepagesz=2m hugepagesz=2m " \ - "hugepages=16" +#define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \ + "earlycon=uart8250,mmio,0x21c0600,115200 " \ + "default_hugepagesz=2m hugepagesz=2m " \ + "hugepages=16" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 1 From 052ddd5c812ad9f30e7cf9023e50fde882bd65da Mon Sep 17 00:00:00 2001 From: Stuart Yoder Date: Tue, 6 Jan 2015 13:18:57 -0800 Subject: [PATCH 193/222] ARMv8/ls2085a: Move kernel image load address Move the load address of the kernel image to get it away from the region of the uncompressed kernel. Signed-off-by: Stuart Yoder Reviewed-by: York Sun --- include/configs/ls2085a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 7e8d944dff..befd4c7257 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -270,7 +270,7 @@ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x581200000\0" \ - "kernel_load=0x806f0000\0" \ + "kernel_load=0xa0000000\0" \ "kernel_size=0x1000000\0" \ "console=ttyAMA0,38400n8\0" From bbeeb8bec084d9fff2cd16d2577ca285f8e66b72 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Tue, 6 Jan 2015 13:18:58 -0800 Subject: [PATCH 194/222] ls2085/configs: Ensure right banners are printed for EMU and SIMU This patch enusres that right banners are printed for LS2085A emulator and simulator platforms. Signed-off-by: Bhupesh Sharma Reviewed-by: York Sun --- include/configs/ls2085a_common.h | 3 --- include/configs/ls2085a_emu.h | 3 +++ include/configs/ls2085a_simu.h | 3 +++ 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index befd4c7257..55f4c96360 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -27,9 +27,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F 1 -#define CONFIG_IDENT_STRING " LS2085A-EMU" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-EMU" - /* Flat Device Tree Definitions */ #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP diff --git a/include/configs/ls2085a_emu.h b/include/configs/ls2085a_emu.h index 487cd99c5d..2d2e1ea0bd 100644 --- a/include/configs/ls2085a_emu.h +++ b/include/configs/ls2085a_emu.h @@ -9,6 +9,9 @@ #include "ls2085a_common.h" +#define CONFIG_IDENT_STRING " LS2085A-EMU" +#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-EMU" + #define CONFIG_DDR_SPD #define CONFIG_SYS_FSL_DDR_EMU /* Support emulator */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/ls2085a_simu.h b/include/configs/ls2085a_simu.h index 0f40b787b4..af34f3f95d 100644 --- a/include/configs/ls2085a_simu.h +++ b/include/configs/ls2085a_simu.h @@ -9,6 +9,9 @@ #include "ls2085a_common.h" +#define CONFIG_IDENT_STRING " LS2085A-SIMU" +#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-SIMU" + /* SMSC 91C111 ethernet configuration */ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x2210000) From a5ebdf06a031b77438524f1f48b5bfb56d57c2b3 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:18:59 -0800 Subject: [PATCH 195/222] armv8/fsl-lsch3: Enable workaround for A008336 Erratum A008336 applied to LS2085A. Signed-off-by: York Sun --- arch/arm/include/asm/arch-fsl-lsch3/config.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index 256adb0a42..1bada10aec 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -101,4 +101,8 @@ #error SoC not defined #endif +#ifdef CONFIG_LS2085A +#define CONFIG_SYS_FSL_ERRATUM_A008336 +#endif + #endif /* _ASM_ARMV8_FSL_LSCH3_CONFIG_ */ From 1478fdef526f7881f809f6dcce1d63fc6cd080d6 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:19:00 -0800 Subject: [PATCH 196/222] armv8/fsl-lsch3: Enable erratum workround for A008514 Erratum A008514 appleis to ls2085a. Signed-off-by: York Sun --- arch/arm/include/asm/arch-fsl-lsch3/config.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index 1bada10aec..b140c1fac2 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -103,6 +103,7 @@ #ifdef CONFIG_LS2085A #define CONFIG_SYS_FSL_ERRATUM_A008336 +#define CONFIG_SYS_FSL_ERRATUM_A008514 #endif #endif /* _ASM_ARMV8_FSL_LSCH3_CONFIG_ */ From 4f2532c4a4a34f0241ef9bc921044772f19f928d Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 6 Jan 2015 13:19:01 -0800 Subject: [PATCH 197/222] armv8/ls2085a_emu: Enable sync of refresh Enable sync of DDR refresh for LS2085a platform. GPP DDR controllers stay in sync. DP-DDR has only one controller so it does no harm. Signed-off-by: York Sun --- include/configs/ls2085a_emu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/ls2085a_emu.h b/include/configs/ls2085a_emu.h index 2d2e1ea0bd..a02d69450b 100644 --- a/include/configs/ls2085a_emu.h +++ b/include/configs/ls2085a_emu.h @@ -20,4 +20,5 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD on I2C bus 1 */ +#define CONFIG_FSL_DDR_SYNC_REFRESH #endif /* __LS2_EMU_H */ From 7b3bd9a7988a8b4c8ba22a52b4927e8e59819b12 Mon Sep 17 00:00:00 2001 From: "J. German Rivera" Date: Tue, 6 Jan 2015 13:19:02 -0800 Subject: [PATCH 198/222] drivers/mc: Migrated MC Flibs to 0.5.2 Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree from "fsl,dprcr" to "fsl-mc". Print MC version info when appropriate. Signed-off-by: J. German Rivera Signed-off-by: Lijun Pan Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 2 +- board/freescale/ls2085a/ls2085a.c | 18 +++- drivers/net/Makefile | 2 +- drivers/net/{fsl_mc => fsl-mc}/Makefile | 4 +- drivers/net/fsl-mc/dpmng.c | 91 ++++++++++++++++ drivers/net/fsl-mc/fsl_dpmng_cmd.h | 49 +++++++++ drivers/net/{fsl_mc => fsl-mc}/mc.c | 132 ++++++++++++++++-------- drivers/net/fsl-mc/mc_sys.c | 63 +++++++++++ include/configs/ls2085a_common.h | 4 +- include/fsl-mc/fsl_dpmng.h | 121 ++++++++++++++++++++++ include/{ => fsl-mc}/fsl_mc.h | 0 include/fsl-mc/fsl_mc_cmd.h | 132 ++++++++++++++++++++++++ include/fsl-mc/fsl_mc_sys.h | 26 +++++ 13 files changed, 592 insertions(+), 52 deletions(-) rename drivers/net/{fsl_mc => fsl-mc}/Makefile (75%) create mode 100644 drivers/net/fsl-mc/dpmng.c create mode 100644 drivers/net/fsl-mc/fsl_dpmng_cmd.h rename drivers/net/{fsl_mc => fsl-mc}/mc.c (67%) create mode 100644 drivers/net/fsl-mc/mc_sys.c create mode 100644 include/fsl-mc/fsl_dpmng.h rename include/{ => fsl-mc}/fsl_mc.h (100%) create mode 100644 include/fsl-mc/fsl_mc_cmd.h create mode 100644 include/fsl-mc/fsl_mc_sys.h diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 42cee65546..49974878b9 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -10,10 +10,10 @@ #include #include #include +#include #include "cpu.h" #include "mp.h" #include "speed.h" -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index ee75d1b7ed..519d61cb1e 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -98,7 +98,21 @@ void fdt_fixup_board_enet(void *fdt) { int offset; - offset = fdt_path_offset(fdt, "/fsl,dprc@0"); + offset = fdt_path_offset(fdt, "/fsl-mc"); + + /* + * TODO: Remove this when backward compatibility + * with old DT node (fsl,dprc@0) is no longer needed. + */ + if (offset < 0) + offset = fdt_path_offset(fdt, "/fsl,dprc@0"); + + if (offset < 0) { + printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n", + __func__, offset); + return; + } + if (get_mc_boot_status() == 0) fdt_status_okay(fdt, offset); else diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 46c4ac697d..6e1ccdbb3d 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -65,5 +65,5 @@ obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o xilinx_ll_temac_mdio.o \ xilinx_ll_temac_fifo.o xilinx_ll_temac_sdma.o obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o -obj-$(CONFIG_FSL_MC_ENET) += fsl_mc/ +obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/ obj-$(CONFIG_VSC9953) += vsc9953.o diff --git a/drivers/net/fsl_mc/Makefile b/drivers/net/fsl-mc/Makefile similarity index 75% rename from drivers/net/fsl_mc/Makefile rename to drivers/net/fsl-mc/Makefile index 483408623c..206ac6be07 100644 --- a/drivers/net/fsl_mc/Makefile +++ b/drivers/net/fsl-mc/Makefile @@ -5,4 +5,6 @@ # # Layerscape MC driver -obj-y += mc.o +obj-y += mc.o \ + mc_sys.o \ + dpmng.o diff --git a/drivers/net/fsl-mc/dpmng.c b/drivers/net/fsl-mc/dpmng.c new file mode 100644 index 0000000000..cc14c7b755 --- /dev/null +++ b/drivers/net/fsl-mc/dpmng.c @@ -0,0 +1,91 @@ +/* Copyright 2014 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include +#include +#include +#include "fsl_dpmng_cmd.h" + +int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info) +{ + struct mc_command cmd = { 0 }; + int err; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION, + MC_CMD_PRI_LOW, 0); + + /* send command to mc*/ + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + /* retrieve response parameters */ + DPMNG_RSP_GET_VERSION(cmd, mc_ver_info); + + return 0; +} + +int dpmng_reset_aiop(struct fsl_mc_io *mc_io, int container_id, + int aiop_tile_id) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPMNG_CMDID_RESET_AIOP, + MC_CMD_PRI_LOW, 0); + DPMNG_CMD_RESET_AIOP(cmd, container_id, aiop_tile_id); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dpmng_load_aiop(struct fsl_mc_io *mc_io, + int container_id, + int aiop_tile_id, + uint64_t img_iova, + uint32_t img_size) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPMNG_CMDID_LOAD_AIOP, + MC_CMD_PRI_LOW, + 0); + DPMNG_CMD_LOAD_AIOP(cmd, container_id, aiop_tile_id, img_size, + img_iova); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dpmng_run_aiop(struct fsl_mc_io *mc_io, + int container_id, + int aiop_tile_id, + const struct dpmng_aiop_run_cfg *cfg) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPMNG_CMDID_RUN_AIOP, + MC_CMD_PRI_LOW, + 0); + DPMNG_CMD_RUN_AIOP(cmd, container_id, aiop_tile_id, cfg); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} + +int dpmng_reset_mc_portal(struct fsl_mc_io *mc_io) +{ + struct mc_command cmd = { 0 }; + + /* prepare command */ + cmd.header = mc_encode_cmd_header(DPMNG_CMDID_RESET_MC_PORTAL, + MC_CMD_PRI_LOW, + 0); + + /* send command to mc*/ + return mc_send_command(mc_io, &cmd); +} diff --git a/drivers/net/fsl-mc/fsl_dpmng_cmd.h b/drivers/net/fsl-mc/fsl_dpmng_cmd.h new file mode 100644 index 0000000000..c9fe021f45 --- /dev/null +++ b/drivers/net/fsl-mc/fsl_dpmng_cmd.h @@ -0,0 +1,49 @@ +/* Copyright 2014 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __FSL_DPMNG_CMD_H +#define __FSL_DPMNG_CMD_H + +/* Command IDs */ +#define DPMNG_CMDID_GET_VERSION 0x831 +#define DPMNG_CMDID_RESET_AIOP 0x832 +#define DPMNG_CMDID_LOAD_AIOP 0x833 +#define DPMNG_CMDID_RUN_AIOP 0x834 +#define DPMNG_CMDID_RESET_MC_PORTAL 0x835 + +/* cmd, param, offset, width, type, arg_name */ +#define DPMNG_RSP_GET_VERSION(cmd, mc_ver_info) \ +do { \ + MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mc_ver_info->revision); \ + MC_RSP_OP(cmd, 0, 32, 32, uint32_t, mc_ver_info->major); \ + MC_RSP_OP(cmd, 1, 0, 32, uint32_t, mc_ver_info->minor); \ +} while (0) + +/* cmd, param, offset, width, type, arg_name */ +#define DPMNG_CMD_RESET_AIOP(cmd, container_id, aiop_tile_id) \ +do { \ + MC_CMD_OP(cmd, 0, 0, 32, int, aiop_tile_id); \ + MC_CMD_OP(cmd, 0, 32, 32, int, container_id); \ +} while (0) + +/* cmd, param, offset, width, type, arg_name */ +#define DPMNG_CMD_LOAD_AIOP(cmd, container_id, aiop_tile_id, img_size, \ + img_iova) \ +do { \ + MC_CMD_OP(cmd, 0, 0, 32, int, aiop_tile_id); \ + MC_CMD_OP(cmd, 0, 32, 32, int, container_id); \ + MC_CMD_OP(cmd, 1, 0, 32, uint32_t, img_size); \ + MC_CMD_OP(cmd, 2, 0, 64, uint64_t, img_iova); \ +} while (0) + +/* cmd, param, offset, width, type, arg_name */ +#define DPMNG_CMD_RUN_AIOP(cmd, container_id, aiop_tile_id, cfg) \ +do { \ + MC_CMD_OP(cmd, 0, 0, 32, int, aiop_tile_id); \ + MC_CMD_OP(cmd, 0, 32, 32, int, container_id); \ + MC_CMD_OP(cmd, 1, 0, 32, uint32_t, cfg->cores_mask); \ + MC_CMD_OP(cmd, 2, 0, 64, uint64_t, cfg->options); \ +} while (0) + +#endif /* __FSL_DPMNG_CMD_H */ diff --git a/drivers/net/fsl_mc/mc.c b/drivers/net/fsl-mc/mc.c similarity index 67% rename from drivers/net/fsl_mc/mc.c rename to drivers/net/fsl-mc/mc.c index df84568a94..74b0085301 100644 --- a/drivers/net/fsl_mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -3,9 +3,12 @@ * * SPDX-License-Identifier: GPL-2.0+ */ + #include #include -#include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; static int mc_boot_status; @@ -14,7 +17,7 @@ static int mc_boot_status; * Copying MC firmware or DPL image to DDR */ static int mc_copy_image(const char *title, - u64 image_addr, u32 image_size, u64 mc_ram_addr) + u64 image_addr, u32 image_size, u64 mc_ram_addr) { debug("%s copied to address %p\n", title, (void *)mc_ram_addr); memcpy((void *)mc_ram_addr, (void *)image_addr, image_size); @@ -25,10 +28,9 @@ static int mc_copy_image(const char *title, * MC firmware FIT image parser checks if the image is in FIT * format, verifies integrity of the image and calculates * raw image address and size values. - * Returns 0 if success and 1 if any of the above mentioned + * Returns 0 on success and a negative errno on error. * task fail. **/ - int parse_mc_firmware_fit_image(const void **raw_image_addr, size_t *raw_image_size) { @@ -39,7 +41,7 @@ int parse_mc_firmware_fit_image(const void **raw_image_addr, size_t size; const char *uname = "firmware"; - /* Check if the image is in NOR flash*/ + /* Check if the image is in NOR flash */ #ifdef CONFIG_SYS_LS_MC_FW_IN_NOR fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR; #else @@ -50,26 +52,26 @@ int parse_mc_firmware_fit_image(const void **raw_image_addr, format = genimg_get_format(fit_hdr); if (format != IMAGE_FORMAT_FIT) { - debug("Not a FIT image\n"); - return 1; + printf("fsl-mc: ERROR: Bad firmware image (not a FIT image)\n"); + return -EINVAL; } if (!fit_check_format(fit_hdr)) { - debug("Bad FIT image format\n"); - return 1; + printf("fsl-mc: ERROR: Bad firmware image (bad FIT header)\n"); + return -EINVAL; } node_offset = fit_image_get_node(fit_hdr, uname); if (node_offset < 0) { - debug("Can not find %s subimage\n", uname); - return 1; + printf("fsl-mc: ERROR: Bad firmware image (missing subimage)\n"); + return -ENOENT; } /* Verify MC firmware image */ if (!(fit_image_verify(fit_hdr, node_offset))) { - debug("Bad MC firmware hash"); - return 1; + printf("fsl-mc: ERROR: Bad firmware image (bad CRC)\n"); + return -EINVAL; } /* Get address and size of raw image */ @@ -90,12 +92,13 @@ int mc_init(bd_t *bis) u64 mc_dpl_offset; u32 reg_gsr; u32 mc_fw_boot_status; - void *fdt_hdr; + void *dpl_fdt_hdr; int dpl_size; const void *raw_image_addr; size_t raw_image_size = 0; - - BUILD_BUG_ON(CONFIG_SYS_LS_MC_FW_LENGTH % 4 != 0); + struct fsl_mc_io mc_io; + int portal_id; + struct mc_version mc_ver_info; /* * The MC private DRAM block was already carved at the end of DRAM @@ -130,25 +133,44 @@ int mc_init(bd_t *bis) /* * Load the MC FW at the beginning of the MC private DRAM block: */ - mc_copy_image( - "MC Firmware", - (u64)raw_image_addr, - raw_image_size, - mc_ram_addr); + mc_copy_image("MC Firmware", + (u64)raw_image_addr, raw_image_size, mc_ram_addr); + + /* + * Get address and size of the DPL blob stored in flash: + */ +#ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR + dpl_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR; +#else +#error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined" +#endif + + error = fdt_check_header(dpl_fdt_hdr); + if (error != 0) { + printf("fsl-mc: ERROR: Bad DPL image (bad header)\n"); + goto out; + } + + dpl_size = fdt_totalsize(dpl_fdt_hdr); + if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) { + printf("fsl-mc: ERROR: Bad DPL image (too large: %d)\n", + dpl_size); + error = -EINVAL; + goto out; + } /* * Calculate offset in the MC private DRAM block at which the MC DPL * blob is to be placed: */ #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET - BUILD_BUG_ON( - (CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 || - CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff); + BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 || + CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff); mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET; #else mc_dpl_offset = mc_get_dram_block_size() - - roundup(CONFIG_SYS_LS_MC_DPL_LENGTH, 4096); + roundup(CONFIG_SYS_LS_MC_DPL_MAX_LENGTH, 4096); if ((mc_dpl_offset & 0x3) != 0 || mc_dpl_offset > 0xffffffff) { printf("%s: Invalid MC DPL offset: %llu\n", @@ -158,23 +180,14 @@ int mc_init(bd_t *bis) } #endif - /* Check if DPL image is in NOR flash */ -#ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR - fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR; -#else -#error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined" -#endif - - dpl_size = fdt_totalsize(fdt_hdr); - /* * Load the MC DPL blob at the far end of the MC private DRAM block: + * + * TODO: Should we place the DPL at a different location to match + * assumptions of MC firmware about its memory layout? */ - mc_copy_image( - "MC DPL blob", - (u64)fdt_hdr, - dpl_size, - mc_ram_addr + mc_dpl_offset); + mc_copy_image("MC DPL blob", + (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset); debug("mc_ccsr_regs %p\n", mc_ccsr_regs); @@ -200,6 +213,8 @@ int mc_init(bd_t *bis) */ out_le32(&mc_ccsr_regs->reg_gsr, (u32)(mc_dpl_offset >> 2)); + printf("\nfsl-mc: Booting Management Complex ...\n"); + /* * Deassert reset and release MC core 0 to run */ @@ -219,17 +234,13 @@ int mc_init(bd_t *bis) } if (timeout <= 0) { - printf("%s: timeout booting management complex firmware\n", - __func__); + printf("fsl-mc: timeout booting management complex firmware\n"); /* TODO: Get an error status from an MC CCSR register */ error = -ETIMEDOUT; goto out; } - printf("Management complex booted (boot status: %#x)\n", - mc_fw_boot_status); - if (mc_fw_boot_status != 0x1) { /* * TODO: Identify critical errors from the GSR register's FS @@ -237,8 +248,41 @@ int mc_init(bd_t *bis) * appropriate errno, so that the status property is set to * failure in the fsl,dprc device tree node. */ + printf("fsl-mc: WARNING: Firmware booted with error (GSR: %#x)\n", + reg_gsr); } + /* + * TODO: need to obtain the portal_id for the root container from the + * DPL + */ + portal_id = 0; + + /* + * Check that the MC firmware is responding portal commands: + */ + mc_io.mmio_regs = SOC_MC_PORTAL_ADDR(portal_id); + debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n", + portal_id, mc_io.mmio_regs); + + error = mc_get_version(&mc_io, &mc_ver_info); + if (error != 0) { + printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n", + error); + goto out; + } + + if (MC_VER_MAJOR != mc_ver_info.major) + printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n", + mc_ver_info.major, MC_VER_MAJOR); + + if (MC_VER_MINOR != mc_ver_info.minor) + printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n", + mc_ver_info.minor, MC_VER_MINOR); + + printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n", + mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision, + mc_fw_boot_status); out: if (error != 0) mc_boot_status = -error; diff --git a/drivers/net/fsl-mc/mc_sys.c b/drivers/net/fsl-mc/mc_sys.c new file mode 100644 index 0000000000..7c8e003ad0 --- /dev/null +++ b/drivers/net/fsl-mc/mc_sys.c @@ -0,0 +1,63 @@ +/* + * Freescale Layerscape MC I/O wrapper + * + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Author: German Rivera + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +#define MC_CMD_HDR_READ_CMDID(_hdr) \ + ((uint16_t)u64_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S)) + +/** + * mc_send_command - Send MC command and wait for response + * + * @mc_io: Pointer to MC I/O object to be used + * @cmd: MC command buffer. On input, it contains the command to send to the MC. + * On output, it contains the response from the MC if any. + * + * Depending on the sharing option specified when creating the MC portal + * wrapper, this function will use a spinlock or mutex to ensure exclusive + * access to the MC portal from the point when the command is sent until a + * response is received from the MC. + */ +int mc_send_command(struct fsl_mc_io *mc_io, + struct mc_command *cmd) +{ + enum mc_cmd_status status; + int timeout = 2000; + + mc_write_command(mc_io->mmio_regs, cmd); + + for ( ; ; ) { + status = mc_read_response(mc_io->mmio_regs, cmd); + if (status != MC_CMD_STATUS_READY) + break; + + if (--timeout == 0) { + printf("Error: Timeout waiting for MC response\n"); + return -ETIMEDOUT; + } + + udelay(500); + } + + if (status != MC_CMD_STATUS_OK) { + printf("Error: MC command failed (portal: %p, obj handle: %#x, command: %#x, status: %#x)\n", + mc_io->mmio_regs, + (unsigned int)MC_CMD_HDR_READ_AUTHID(cmd->header), + (unsigned int)MC_CMD_HDR_READ_CMDID(cmd->header), + (unsigned int)status); + + return -EIO; + } + + return 0; +} diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 55f4c96360..17a1cde039 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -207,12 +207,10 @@ #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) #define CONFIG_SYS_LS_MC_FW_IN_NOR #define CONFIG_SYS_LS_MC_FW_ADDR 0x580200000ULL -/* TODO Actual FW length needs to be determined at runtime from FW header */ -#define CONFIG_SYS_LS_MC_FW_LENGTH (4U * 1024 * 1024) #define CONFIG_SYS_LS_MC_DPL_IN_NOR #define CONFIG_SYS_LS_MC_DPL_ADDR 0x5806C0000ULL /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ -#define CONFIG_SYS_LS_MC_DPL_LENGTH 4096 +#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH (256 * 1024) #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0xe00000 /* Carve the MC private DRAM block from the end of DRAM */ diff --git a/include/fsl-mc/fsl_dpmng.h b/include/fsl-mc/fsl_dpmng.h new file mode 100644 index 0000000000..c2e1ddd18b --- /dev/null +++ b/include/fsl-mc/fsl_dpmng.h @@ -0,0 +1,121 @@ +/* Copyright 2014 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/*! + * @file fsl_dpmng.h + * @brief Management Complex General API + */ + +#ifndef __FSL_DPMNG_H +#define __FSL_DPMNG_H + +/*! + * @Group grp_dpmng Management Complex General API + * + * @brief Contains general API for the Management Complex firmware + * @{ + */ + +struct fsl_mc_io; + +/** + * @brief Management Complex firmware version information + */ +#define MC_VER_MAJOR 4 +#define MC_VER_MINOR 0 + +struct mc_version { + uint32_t major; + /*!< Major version number: incremented on API compatibility changes */ + uint32_t minor; + /*!< Minor version number: incremented on API additions (that are + * backward compatible); reset when major version is incremented + */ + uint32_t revision; + /*!< Internal revision number: incremented on implementation changes + * and/or bug fixes that have no impact on API + */ +}; + +/** + * @brief Retrieves the Management Complex firmware version information + * + * @param[in] mc_io Pointer to opaque I/O object + * @param[out] mc_ver_info Pointer to version information structure + * + * @returns '0' on Success; Error code otherwise. + */ +int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info); + +/** + * @brief Resets an AIOP tile + * + * @param[in] mc_io Pointer to opaque I/O object + * @param[in] container_id AIOP container ID + * @param[in] aiop_tile_id AIOP tile ID to reset + * + * @returns '0' on Success; Error code otherwise. + */ +int dpmng_reset_aiop(struct fsl_mc_io *mc_io, + int container_id, + int aiop_tile_id); + +/** + * @brief Loads an image to AIOP tile + * + * @param[in] mc_io Pointer to opaque I/O object + * @param[in] container_id AIOP container ID + * @param[in] aiop_tile_id AIOP tile ID to reset + * @param[in] img_iova I/O virtual address of AIOP ELF image + * @param[in] img_size Size of AIOP ELF image in memory (in bytes) + * + * @returns '0' on Success; Error code otherwise. + */ +int dpmng_load_aiop(struct fsl_mc_io *mc_io, + int container_id, + int aiop_tile_id, + uint64_t img_iova, + uint32_t img_size); + +/** + * @brief AIOP run configuration + */ +struct dpmng_aiop_run_cfg { + uint32_t cores_mask; + /*!< Mask of AIOP cores to run (core 0 in most significant bit) */ + uint64_t options; + /*!< Execution options (currently none defined) */ +}; + +/** + * @brief Starts AIOP tile execution + * + * @param[in] mc_io Pointer to MC portal's I/O object + * @param[in] container_id AIOP container ID + * @param[in] aiop_tile_id AIOP tile ID to reset + * @param[in] cfg AIOP run configuration + * + * @returns '0' on Success; Error code otherwise. + */ +int dpmng_run_aiop(struct fsl_mc_io *mc_io, + int container_id, + int aiop_tile_id, + const struct dpmng_aiop_run_cfg *cfg); + +/** + * @brief Resets MC portal + * + * This function closes all object handles (tokens) that are currently + * open in the MC portal on which the command is submitted. This allows + * cleanup of stale handles that belong to non-functional user processes. + * + * @param[in] mc_io Pointer to MC portal's I/O object + * + * @returns '0' on Success; Error code otherwise. + */ +int dpmng_reset_mc_portal(struct fsl_mc_io *mc_io); + +/** @} */ + +#endif /* __FSL_DPMNG_H */ diff --git a/include/fsl_mc.h b/include/fsl-mc/fsl_mc.h similarity index 100% rename from include/fsl_mc.h rename to include/fsl-mc/fsl_mc.h diff --git a/include/fsl-mc/fsl_mc_cmd.h b/include/fsl-mc/fsl_mc_cmd.h new file mode 100644 index 0000000000..e7fcb5b142 --- /dev/null +++ b/include/fsl-mc/fsl_mc_cmd.h @@ -0,0 +1,132 @@ +/* Copyright 2014 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __FSL_MC_CMD_H +#define __FSL_MC_CMD_H + +#define MC_CMD_NUM_OF_PARAMS 7 + +#define MAKE_UMASK64(_width) \ + ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1)) + +static inline uint64_t u64_enc(int lsoffset, int width, uint64_t val) +{ + return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset); +} +static inline uint64_t u64_dec(uint64_t val, int lsoffset, int width) +{ + return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width)); +} + +struct mc_command { + uint64_t header; + uint64_t params[MC_CMD_NUM_OF_PARAMS]; +}; + +enum mc_cmd_status { + MC_CMD_STATUS_OK = 0x0, /*!< Completed successfully */ + MC_CMD_STATUS_READY = 0x1, /*!< Ready to be processed */ + MC_CMD_STATUS_AUTH_ERR = 0x3, /*!< Authentication error */ + MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /*!< No privilege */ + MC_CMD_STATUS_DMA_ERR = 0x5, /*!< DMA or I/O error */ + MC_CMD_STATUS_CONFIG_ERR = 0x6, /*!< Configuration error */ + MC_CMD_STATUS_TIMEOUT = 0x7, /*!< Operation timed out */ + MC_CMD_STATUS_NO_RESOURCE = 0x8, /*!< No resources */ + MC_CMD_STATUS_NO_MEMORY = 0x9, /*!< No memory available */ + MC_CMD_STATUS_BUSY = 0xA, /*!< Device is busy */ + MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /*!< Unsupported operation */ + MC_CMD_STATUS_INVALID_STATE = 0xC /*!< Invalid state */ +}; + +#define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */ +#define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */ +#define MC_CMD_HDR_AUTHID_O 38 /* Authentication ID field offset */ +#define MC_CMD_HDR_AUTHID_S 10 /* Authentication ID field size */ +#define MC_CMD_HDR_STATUS_O 16 /* Status field offset */ +#define MC_CMD_HDR_STATUS_S 8 /* Status field size*/ +#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */ +#define MC_CMD_HDR_PRI_S 1 /* Priority field size */ + +#define MC_CMD_HDR_READ_STATUS(_hdr) \ + ((enum mc_cmd_status)u64_dec((_hdr), \ + MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S)) + +#define MC_CMD_HDR_READ_AUTHID(_hdr) \ + ((uint16_t)u64_dec((_hdr), MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S)) + +#define MC_CMD_PRI_LOW 0 /*!< Low Priority command indication */ +#define MC_CMD_PRI_HIGH 1 /*!< High Priority command indication */ + +#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \ + ((_cmd).params[_param] |= u64_enc((_offset), (_width), _arg)) + +#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \ + (_arg = (_type)u64_dec(_cmd.params[_param], (_offset), (_width))) + +static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id, + uint8_t priority, + uint16_t auth_id) +{ + uint64_t hdr; + + hdr = u64_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id); + hdr |= u64_enc(MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S, auth_id); + hdr |= u64_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority); + hdr |= u64_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S, + MC_CMD_STATUS_READY); + + return hdr; +} + +/** + * mc_write_command - writes a command to a Management Complex (MC) portal + * + * @portal: pointer to an MC portal + * @cmd: pointer to a filled command + */ +static inline void mc_write_command(struct mc_command __iomem *portal, + struct mc_command *cmd) +{ + int i; + + /* copy command parameters into the portal */ + for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++) + writeq(cmd->params[i], &portal->params[i]); + + /* submit the command by writing the header */ + writeq(cmd->header, &portal->header); +} + +/** + * mc_read_response - reads the response for the last MC command from a + * Management Complex (MC) portal + * + * @portal: pointer to an MC portal + * @resp: pointer to command response buffer + * + * Returns MC_CMD_STATUS_OK on Success; Error code otherwise. + */ +static inline enum mc_cmd_status mc_read_response( + struct mc_command __iomem *portal, + struct mc_command *resp) +{ + int i; + enum mc_cmd_status status; + + /* Copy command response header from MC portal: */ + resp->header = readq(&portal->header); + status = MC_CMD_HDR_READ_STATUS(resp->header); + if (status != MC_CMD_STATUS_OK) + return status; + + /* Copy command response data from MC portal: */ + for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++) + resp->params[i] = readq(&portal->params[i]); + + return status; +} + +int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd); + +#endif /* __FSL_MC_CMD_H */ diff --git a/include/fsl-mc/fsl_mc_sys.h b/include/fsl-mc/fsl_mc_sys.h new file mode 100644 index 0000000000..c0befe01d2 --- /dev/null +++ b/include/fsl-mc/fsl_mc_sys.h @@ -0,0 +1,26 @@ +/* + * Freescale Layerscape Management Complex (MC) Environment-specific code + * + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _FSL_MC_SYS_H +#define _FSL_MC_SYS_H + +#include + +struct mc_command; + +/* + * struct mc_portal_wrapper - MC command portal wrapper object + */ +struct fsl_mc_io { + struct mc_command __iomem *mmio_regs; +}; + +int mc_send_command(struct fsl_mc_io *mc_io, + struct mc_command *cmd); + +#endif /* _FSL_MC_SYS_H */ From 60d517369cca0ff0352b3c9a023cd3e18e195c38 Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Fri, 16 Jan 2015 17:23:04 +0800 Subject: [PATCH 199/222] arm: ls102xa: Define default values for some CCSR macros This patch is to define default values for some CCSR macros to make header files cleaner. Signed-off-by: Alison Wang Reviewed-by: York Sun --- .../include/asm/arch-ls102xa/immap_ls102xa.h | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index f70d568d46..f3aaddcf0f 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -37,6 +37,43 @@ #define DCFG_DCSR_PORCR1 0 +/* + * Define default values for some CCSR macros to make header files cleaner + * + * To completely disable CCSR relocation in a board header file, define + * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS + * to a value that is the same as CONFIG_SYS_CCSRBAR. + */ + +#ifdef CONFIG_SYS_CCSRBAR_PHYS +#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly." +#endif + +#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE +#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH +#undef CONFIG_SYS_CCSRBAR_PHYS_LOW +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 +#endif + +#ifndef CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR CONFIG_SYS_IMMR +#endif + +#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf +#else +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 +#endif +#endif + +#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_IMMR +#endif + +#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ + CONFIG_SYS_CCSRBAR_PHYS_LOW) + struct sys_info { unsigned long freq_processor[CONFIG_MAX_CPUS]; unsigned long freq_systembus; From 636ef95605560a45cd9be21c6340d2bca33352ed Mon Sep 17 00:00:00 2001 From: Minghuan Lian Date: Wed, 21 Jan 2015 17:29:17 +0800 Subject: [PATCH 200/222] arm/ls102xa: create TLB to map PCIe region LS1021A's PCIe1 region begins 0x40_00000000; PCIe2 begins 0x48_00000000. In order to access PCIe device, we must create TLB to map the 40bit physical address to 32bit virtual address. This patch will enable MMU after DDR is available and creates MMU table in DRAM to map all 4G space; then, re-use the reserved space to map PCIe region. The following the mapping layout. VA mapping: ------- <---- 0GB | | | | |-------| <---- 0x24000000 |///////| ===> 192MB VA map for PCIe1 with offset 0x40_0000_0000 |-------| <---- 0x300000000 | | |-------| <---- 0x34000000 |///////| ===> 192MB VA map for PCIe2 with offset 0x48_0000_0000 |-------| <---- 0x40000000 | | |-------| <---- 0x80000000 DDR0 space start |\\\\\\\| |\\\\\\\| ===> 2GB VA map for 2GB DDR0 Memory space |\\\\\\\| ------- <---- 4GB DDR0 space end Signed-off-by: Minghuan Lian Reviewed-by: York Sun --- arch/arm/cpu/armv7/ls102xa/cpu.c | 203 ++++++++++++++++++++- arch/arm/include/asm/arch-ls102xa/config.h | 14 ++ 2 files changed, 207 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index ce2d92f5a6..18665a32d2 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -8,6 +8,8 @@ #include #include #include +#include +#include #include #include #include @@ -16,6 +18,197 @@ DECLARE_GLOBAL_DATA_PTR; +#ifndef CONFIG_SYS_DCACHE_OFF + +/* + * Bit[1] of the descriptor indicates the descriptor type, + * and bit[0] indicates whether the descriptor is valid. + */ +#define PMD_TYPE_TABLE 0x3 +#define PMD_TYPE_SECT 0x1 + +/* AttrIndx[2:0] */ +#define PMD_ATTRINDX(t) ((t) << 2) + +/* Section */ +#define PMD_SECT_AF (1 << 10) + +#define BLOCK_SIZE_L1 (1UL << 30) +#define BLOCK_SIZE_L2 (1UL << 21) + +/* TTBCR flags */ +#define TTBCR_EAE (1 << 31) +#define TTBCR_T0SZ(x) ((x) << 0) +#define TTBCR_T1SZ(x) ((x) << 16) +#define TTBCR_USING_TTBR0 (TTBCR_T0SZ(0) | TTBCR_T1SZ(0)) +#define TTBCR_IRGN0_NC (0 << 8) +#define TTBCR_IRGN0_WBWA (1 << 8) +#define TTBCR_IRGN0_WT (2 << 8) +#define TTBCR_IRGN0_WBNWA (3 << 8) +#define TTBCR_IRGN0_MASK (3 << 8) +#define TTBCR_ORGN0_NC (0 << 10) +#define TTBCR_ORGN0_WBWA (1 << 10) +#define TTBCR_ORGN0_WT (2 << 10) +#define TTBCR_ORGN0_WBNWA (3 << 10) +#define TTBCR_ORGN0_MASK (3 << 10) +#define TTBCR_SHARED_NON (0 << 12) +#define TTBCR_SHARED_OUTER (2 << 12) +#define TTBCR_SHARED_INNER (3 << 12) +#define TTBCR_EPD0 (0 << 7) +#define TTBCR (TTBCR_SHARED_NON | \ + TTBCR_ORGN0_NC | \ + TTBCR_IRGN0_NC | \ + TTBCR_USING_TTBR0 | \ + TTBCR_EAE) + +/* + * Memory region attributes for LPAE (defined in pgtable): + * + * n = AttrIndx[2:0] + * + * n MAIR + * UNCACHED 000 00000000 + * BUFFERABLE 001 01000100 + * DEV_WC 001 01000100 + * WRITETHROUGH 010 10101010 + * WRITEBACK 011 11101110 + * DEV_CACHED 011 11101110 + * DEV_SHARED 100 00000100 + * DEV_NONSHARED 100 00000100 + * unused 101 + * unused 110 + * WRITEALLOC 111 11111111 + */ +#define MT_MAIR0 0xeeaa4400 +#define MT_MAIR1 0xff000004 +#define MT_STRONLY_ORDER 0 +#define MT_NORMAL_NC 1 +#define MT_DEVICE_MEM 4 +#define MT_NORMAL 7 + +/* The phy_addr must be aligned to 4KB */ +static inline void set_pgtable(u32 *page_table, u32 index, u32 phy_addr) +{ + u32 value = phy_addr | PMD_TYPE_TABLE; + + page_table[2 * index] = value; + page_table[2 * index + 1] = 0; +} + +/* The phy_addr must be aligned to 4KB */ +static inline void set_pgsection(u32 *page_table, u32 index, u64 phy_addr, + u32 memory_type) +{ + u64 value; + + value = phy_addr | PMD_TYPE_SECT | PMD_SECT_AF; + value |= PMD_ATTRINDX(memory_type); + page_table[2 * index] = value & 0xFFFFFFFF; + page_table[2 * index + 1] = (value >> 32) & 0xFFFFFFFF; +} + +/* + * Start MMU after DDR is available, we create MMU table in DRAM. + * The base address of TTLB is gd->arch.tlb_addr. We use two + * levels of translation tables here to cover 40-bit address space. + * + * The TTLBs are located at PHY 2G~4G. + * + * VA mapping: + * + * ------- <---- 0GB + * | | + * | | + * |-------| <---- 0x24000000 + * |///////| ===> 192MB VA map for PCIe1 with offset 0x40_0000_0000 + * |-------| <---- 0x300000000 + * | | + * |-------| <---- 0x34000000 + * |///////| ===> 192MB VA map for PCIe2 with offset 0x48_0000_0000 + * |-------| <---- 0x40000000 + * | | + * |-------| <---- 0x80000000 DDR0 space start + * |\\\\\\\| + *.|\\\\\\\| ===> 2GB VA map for 2GB DDR0 Memory space + * |\\\\\\\| + * ------- <---- 4GB DDR0 space end + */ +static void mmu_setup(void) +{ + u32 *level0_table = (u32 *)gd->arch.tlb_addr; + u32 *level1_table = (u32 *)(gd->arch.tlb_addr + 0x1000); + u64 va_start = 0; + u32 reg; + int i; + + /* Level 0 Table 2-3 are used to map DDR */ + set_pgsection(level0_table, 3, 3 * BLOCK_SIZE_L1, MT_NORMAL); + set_pgsection(level0_table, 2, 2 * BLOCK_SIZE_L1, MT_NORMAL); + /* Level 0 Table 1 is used to map device */ + set_pgsection(level0_table, 1, 1 * BLOCK_SIZE_L1, MT_DEVICE_MEM); + /* Level 0 Table 0 is used to map device including PCIe MEM */ + set_pgtable(level0_table, 0, (u32)level1_table); + + /* Level 1 has 512 entries */ + for (i = 0; i < 512; i++) { + /* Mapping for PCIe 1 */ + if (va_start >= CONFIG_SYS_PCIE1_VIRT_ADDR && + va_start < (CONFIG_SYS_PCIE1_VIRT_ADDR + + CONFIG_SYS_PCIE_MMAP_SIZE)) + set_pgsection(level1_table, i, + CONFIG_SYS_PCIE1_PHYS_BASE + va_start, + MT_DEVICE_MEM); + /* Mapping for PCIe 2 */ + else if (va_start >= CONFIG_SYS_PCIE2_VIRT_ADDR && + va_start < (CONFIG_SYS_PCIE2_VIRT_ADDR + + CONFIG_SYS_PCIE_MMAP_SIZE)) + set_pgsection(level1_table, i, + CONFIG_SYS_PCIE2_PHYS_BASE + va_start, + MT_DEVICE_MEM); + else + set_pgsection(level1_table, i, + va_start, + MT_DEVICE_MEM); + va_start += BLOCK_SIZE_L2; + } + + asm volatile("dsb sy;isb"); + asm volatile("mcr p15, 0, %0, c2, c0, 2" /* Write RT to TTBCR */ + : : "r" (TTBCR) : "memory"); + asm volatile("mcrr p15, 0, %0, %1, c2" /* TTBR 0 */ + : : "r" ((u32)level0_table), "r" (0) : "memory"); + asm volatile("mcr p15, 0, %0, c10, c2, 0" /* write MAIR 0 */ + : : "r" (MT_MAIR0) : "memory"); + asm volatile("mcr p15, 0, %0, c10, c2, 1" /* write MAIR 1 */ + : : "r" (MT_MAIR1) : "memory"); + + /* Set the access control to all-supervisor */ + asm volatile("mcr p15, 0, %0, c3, c0, 0" + : : "r" (~0)); + + /* Enable the mmu */ + reg = get_cr(); + set_cr(reg | CR_M); +} + +/* + * This function is called from lib/board.c. It recreates MMU + * table in main memory. MMU and i/d-cache are enabled here. + */ +void enable_caches(void) +{ + /* Invalidate all TLB */ + mmu_page_table_flush(gd->arch.tlb_addr, + gd->arch.tlb_addr + gd->arch.tlb_size); + /* Set up and enable mmu */ + mmu_setup(); + + /* Invalidate & Enable d-cache */ + invalidate_dcache_all(); + set_cr(get_cr() | CR_C); +} +#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ + #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) { @@ -78,16 +271,6 @@ int print_cpuinfo(void) } #endif -void enable_caches(void) -{ -#ifndef CONFIG_SYS_ICACHE_OFF - icache_enable(); -#endif -#ifndef CONFIG_SYS_DCACHE_OFF - dcache_enable(); -#endif -} - #ifdef CONFIG_FSL_ESDHC int cpu_mmc_init(bd_t *bis) { diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 791551841c..cfabdc605f 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -61,6 +61,20 @@ #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) +#define CONFIG_SYS_PCIE1_PHYS_BASE 0x4000000000ULL +#define CONFIG_SYS_PCIE2_PHYS_BASE 0x4800000000ULL +#define CONFIG_SYS_PCIE1_VIRT_ADDR 0x24000000UL +#define CONFIG_SYS_PCIE2_VIRT_ADDR 0x34000000UL +#define CONFIG_SYS_PCIE_MMAP_SIZE (192 * 1024 * 1024) /* 192M */ +/* + * TLB will map VIRT_ADDR to (PHYS_BASE + VIRT_ADDR) + * So 40bit PCIe PHY addr can directly be converted to a 32bit virtual addr. + */ +#define CONFIG_SYS_PCIE1_PHYS_ADDR (CONFIG_SYS_PCIE1_PHYS_BASE + \ + CONFIG_SYS_PCIE1_VIRT_ADDR) +#define CONFIG_SYS_PCIE2_PHYS_ADDR (CONFIG_SYS_PCIE2_PHYS_BASE + \ + CONFIG_SYS_PCIE2_VIRT_ADDR) + #ifdef CONFIG_DDR_SPD #define CONFIG_SYS_FSL_DDR_BE #define CONFIG_VERY_BIG_RAM From ec245fd74d5d307a2c523d28c22db8d24ddd7902 Mon Sep 17 00:00:00 2001 From: Minghuan Lian Date: Wed, 21 Jan 2015 17:29:18 +0800 Subject: [PATCH 201/222] arm/ls102xa: use a array to define pexmscportsr Signed-off-by: Minghuan Lian Reviewed-by: York Sun --- arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index f3aaddcf0f..3a64afce46 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -170,8 +170,7 @@ struct ccsr_scfg { u32 pex1rdmmsgrqsr; u32 pex2rdmmsgrqsr; u32 spimsiclrcr; - u32 pex1mscportsr; - u32 pex2mscportsr; + u32 pexmscportsr[2]; u32 pex2pmwrcr; u32 resv5[24]; u32 mac1_streamid; From 180b8688dca2a7731a291a7660ae188e6eec84b8 Mon Sep 17 00:00:00 2001 From: Minghuan Lian Date: Wed, 21 Jan 2015 17:29:19 +0800 Subject: [PATCH 202/222] arm/ls1021a: add PCIe settings The patch enables and adds PCIe settings for boards LS1021AQDS and LS1021ATWR. Signed-off-by: Minghuan Lian Reviewed-by: York Sun --- include/configs/ls1021aqds.h | 24 ++++++++++++++++++++++++ include/configs/ls1021atwr.h | 24 ++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 2874ccc6fa..3dc4da391b 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -510,6 +510,30 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" +#define CONFIG_SYS_PCI_64BIT + +#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000 +#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */ +#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000 +#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */ + +#define CONFIG_SYS_PCIE_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000 +#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */ + +#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000 +#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000 +#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */ + +#ifdef CONFIG_PCI +#define CONFIG_NET_MULTI +#define CONFIG_PCI_PNP +#define CONFIG_E1000 +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_CMD_PCI +#define CONFIG_CMD_NET +#endif + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 0a0bb5f109..a13876b550 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -303,6 +303,30 @@ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" +#define CONFIG_SYS_PCI_64BIT + +#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000 +#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */ +#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000 +#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */ + +#define CONFIG_SYS_PCIE_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000 +#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */ + +#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000 +#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000 +#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */ + +#ifdef CONFIG_PCI +#define CONFIG_NET_MULTI +#define CONFIG_PCI_PNP +#define CONFIG_E1000 +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_CMD_PCI +#define CONFIG_CMD_NET +#endif + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII From e4e8cb71384a7572b32509df6aa257809b8dcd5d Mon Sep 17 00:00:00 2001 From: Minghuan Lian Date: Wed, 21 Jan 2015 17:29:20 +0800 Subject: [PATCH 203/222] driver/pci: add Layerscape PCIe driver The patch adds Freescale Layerscape PCIe driver and provides up to 4 controllers support. Signed-off-by: Minghuan Lian Reviewed-by: York Sun --- drivers/pci/pcie_layerscape.c | 471 +++++++++++++++++++++++++++++++++- 1 file changed, 466 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 291c249c86..bcad8f2aec 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -1,5 +1,5 @@ /* - * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2014-2015 Freescale Semiconductor, Inc. * Layerscape PCIe driver * * SPDX-License-Identifier: GPL-2.0+ @@ -9,8 +9,465 @@ #include #include #include +#include +#include #include +#ifndef CONFIG_SYS_PCI_MEMORY_BUS +#define CONFIG_SYS_PCI_MEMORY_BUS CONFIG_SYS_SDRAM_BASE +#endif + +#ifndef CONFIG_SYS_PCI_MEMORY_PHYS +#define CONFIG_SYS_PCI_MEMORY_PHYS CONFIG_SYS_SDRAM_BASE +#endif + +#ifndef CONFIG_SYS_PCI_MEMORY_SIZE +#define CONFIG_SYS_PCI_MEMORY_SIZE (2 * 1024 * 1024 * 1024UL) /* 2G */ +#endif + +/* iATU registers */ +#define PCIE_ATU_VIEWPORT 0x900 +#define PCIE_ATU_REGION_INBOUND (0x1 << 31) +#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31) +#define PCIE_ATU_REGION_INDEX0 (0x0 << 0) +#define PCIE_ATU_REGION_INDEX1 (0x1 << 0) +#define PCIE_ATU_REGION_INDEX2 (0x2 << 0) +#define PCIE_ATU_REGION_INDEX3 (0x3 << 0) +#define PCIE_ATU_CR1 0x904 +#define PCIE_ATU_TYPE_MEM (0x0 << 0) +#define PCIE_ATU_TYPE_IO (0x2 << 0) +#define PCIE_ATU_TYPE_CFG0 (0x4 << 0) +#define PCIE_ATU_TYPE_CFG1 (0x5 << 0) +#define PCIE_ATU_CR2 0x908 +#define PCIE_ATU_ENABLE (0x1 << 31) +#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30) +#define PCIE_ATU_LOWER_BASE 0x90C +#define PCIE_ATU_UPPER_BASE 0x910 +#define PCIE_ATU_LIMIT 0x914 +#define PCIE_ATU_LOWER_TARGET 0x918 +#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24) +#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19) +#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16) +#define PCIE_ATU_UPPER_TARGET 0x91C + +#define PCIE_LINK_CAP 0x7c +#define PCIE_LINK_SPEED_MASK 0xf +#define PCIE_LINK_STA 0x82 + +#define PCIE_DBI_SIZE (4 * 1024) /* 4K */ + +struct ls_pcie { + int idx; + void __iomem *dbi; + void __iomem *va_cfg0; + void __iomem *va_cfg1; + struct pci_controller hose; +}; + +struct ls_pcie_info { + unsigned long regs; + int pci_num; + u64 cfg0_phys; + u64 cfg0_size; + u64 cfg1_phys; + u64 cfg1_size; + u64 mem_bus; + u64 mem_phys; + u64 mem_size; + u64 io_bus; + u64 io_phys; + u64 io_size; +}; + +#define SET_LS_PCIE_INFO(x, num) \ +{ \ + x.regs = CONFIG_SYS_PCIE##num##_ADDR; \ + x.cfg0_phys = CONFIG_SYS_PCIE_CFG0_PHYS_OFF + \ + CONFIG_SYS_PCIE##num##_PHYS_ADDR; \ + x.cfg0_size = CONFIG_SYS_PCIE_CFG0_SIZE; \ + x.cfg1_phys = CONFIG_SYS_PCIE_CFG1_PHYS_OFF + \ + CONFIG_SYS_PCIE##num##_PHYS_ADDR; \ + x.cfg1_size = CONFIG_SYS_PCIE_CFG1_SIZE; \ + x.mem_bus = CONFIG_SYS_PCIE_MEM_BUS; \ + x.mem_phys = CONFIG_SYS_PCIE_MEM_PHYS_OFF + \ + CONFIG_SYS_PCIE##num##_PHYS_ADDR; \ + x.mem_size = CONFIG_SYS_PCIE_MEM_SIZE; \ + x.io_bus = CONFIG_SYS_PCIE_IO_BUS; \ + x.io_phys = CONFIG_SYS_PCIE_IO_PHYS_OFF + \ + CONFIG_SYS_PCIE##num##_PHYS_ADDR; \ + x.io_size = CONFIG_SYS_PCIE_IO_SIZE; \ + x.pci_num = num; \ +} + +#ifdef CONFIG_LS102XA +#include + +/* PEX1/2 Misc Ports Status Register */ +#define LTSSM_STATE_SHIFT 20 +#define LTSSM_STATE_MASK 0x3f +#define LTSSM_PCIE_L0 0x11 /* L0 state */ + +static int ls_pcie_link_state(struct ls_pcie *pcie) +{ + u32 state; + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + + state = in_be32(&scfg->pexmscportsr[pcie->idx]); + state = (state >> LTSSM_STATE_SHIFT) & LTSSM_STATE_MASK; + if (state < LTSSM_PCIE_L0) { + debug("....PCIe link error. LTSSM=0x%02x.\n", state); + return 0; + } + + return 1; +} +#else +#define PCIE_LDBG 0x7FC + +static int ls_pcie_link_state(struct ls_pcie *pcie) +{ + u32 state; + + state = readl(pcie->dbi + PCIE_LDBG); + if (state) + return 1; + + debug("....PCIe link error.\n"); + return 0; +} +#endif + +static int ls_pcie_link_up(struct ls_pcie *pcie) +{ + int state; + u32 cap; + + state = ls_pcie_link_state(pcie); + if (state) + return state; + + /* Try to download speed to gen1 */ + cap = readl(pcie->dbi + PCIE_LINK_CAP); + writel((cap & (~PCIE_LINK_SPEED_MASK)) | 1, pcie->dbi + PCIE_LINK_CAP); + udelay(2000); + state = ls_pcie_link_state(pcie); + if (state) + return state; + + writel(cap, pcie->dbi + PCIE_LINK_CAP); + + return 0; +} + +static void ls_pcie_cfg0_set_busdev(struct ls_pcie *pcie, u32 busdev) +{ + writel(PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0, + pcie->dbi + PCIE_ATU_VIEWPORT); + writel(busdev, pcie->dbi + PCIE_ATU_LOWER_TARGET); +} + +static void ls_pcie_cfg1_set_busdev(struct ls_pcie *pcie, u32 busdev) +{ + writel(PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, + pcie->dbi + PCIE_ATU_VIEWPORT); + writel(busdev, pcie->dbi + PCIE_ATU_LOWER_TARGET); +} + +static void ls_pcie_iatu_outbound_set(struct ls_pcie *pcie, int idx, int type, + u64 phys, u64 bus_addr, pci_size_t size) +{ + writel(PCIE_ATU_REGION_OUTBOUND | idx, pcie->dbi + PCIE_ATU_VIEWPORT); + writel((u32)phys, pcie->dbi + PCIE_ATU_LOWER_BASE); + writel(phys >> 32, pcie->dbi + PCIE_ATU_UPPER_BASE); + writel(phys + size - 1, pcie->dbi + PCIE_ATU_LIMIT); + writel((u32)bus_addr, pcie->dbi + PCIE_ATU_LOWER_TARGET); + writel(bus_addr >> 32, pcie->dbi + PCIE_ATU_UPPER_TARGET); + writel(type, pcie->dbi + PCIE_ATU_CR1); + writel(PCIE_ATU_ENABLE, pcie->dbi + PCIE_ATU_CR2); +} + +static void ls_pcie_setup_atu(struct ls_pcie *pcie, struct ls_pcie_info *info) +{ +#ifdef DEBUG + int i; +#endif + + /* ATU 0 : OUTBOUND : CFG0 */ + ls_pcie_iatu_outbound_set(pcie, PCIE_ATU_REGION_INDEX0, + PCIE_ATU_TYPE_CFG0, + info->cfg0_phys, + 0, + info->cfg0_size); + /* ATU 1 : OUTBOUND : CFG1 */ + ls_pcie_iatu_outbound_set(pcie, PCIE_ATU_REGION_INDEX1, + PCIE_ATU_TYPE_CFG1, + info->cfg1_phys, + 0, + info->cfg1_size); + /* ATU 2 : OUTBOUND : MEM */ + ls_pcie_iatu_outbound_set(pcie, PCIE_ATU_REGION_INDEX2, + PCIE_ATU_TYPE_MEM, + info->mem_phys, + info->mem_bus, + info->mem_size); + /* ATU 3 : OUTBOUND : IO */ + ls_pcie_iatu_outbound_set(pcie, PCIE_ATU_REGION_INDEX3, + PCIE_ATU_TYPE_IO, + info->io_phys, + info->io_bus, + info->io_size); + +#ifdef DEBUG + for (i = 0; i <= PCIE_ATU_REGION_INDEX3; i++) { + writel(PCIE_ATU_REGION_OUTBOUND | i, + pcie->dbi + PCIE_ATU_VIEWPORT); + debug("iATU%d:\n", i); + debug("\tLOWER PHYS 0x%08x\n", + readl(pcie->dbi + PCIE_ATU_LOWER_BASE)); + debug("\tUPPER PHYS 0x%08x\n", + readl(pcie->dbi + PCIE_ATU_UPPER_BASE)); + debug("\tLOWER BUS 0x%08x\n", + readl(pcie->dbi + PCIE_ATU_LOWER_TARGET)); + debug("\tUPPER BUS 0x%08x\n", + readl(pcie->dbi + PCIE_ATU_UPPER_TARGET)); + debug("\tLIMIT 0x%08x\n", + readl(pcie->dbi + PCIE_ATU_LIMIT)); + debug("\tCR1 0x%08x\n", + readl(pcie->dbi + PCIE_ATU_CR1)); + debug("\tCR2 0x%08x\n", + readl(pcie->dbi + PCIE_ATU_CR2)); + } +#endif +} + +int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) +{ + /* Do not skip controller */ + return 0; +} + +static int ls_pcie_addr_valid(struct pci_controller *hose, pci_dev_t d) +{ + if (PCI_DEV(d) > 0) + return -EINVAL; + + return 0; +} + +static int ls_pcie_read_config(struct pci_controller *hose, pci_dev_t d, + int where, u32 *val) +{ + struct ls_pcie *pcie = hose->priv_data; + u32 busdev, *addr; + + if (ls_pcie_addr_valid(hose, d)) { + *val = 0xffffffff; + return -EINVAL; + } + + if (PCI_BUS(d) == hose->first_busno) { + addr = pcie->dbi + (where & ~0x3); + } else { + busdev = PCIE_ATU_BUS(PCI_BUS(d)) | + PCIE_ATU_DEV(PCI_DEV(d)) | + PCIE_ATU_FUNC(PCI_FUNC(d)); + + if (PCI_BUS(d) == hose->first_busno + 1) { + ls_pcie_cfg0_set_busdev(pcie, busdev); + addr = pcie->va_cfg0 + (where & ~0x3); + } else { + ls_pcie_cfg1_set_busdev(pcie, busdev); + addr = pcie->va_cfg1 + (where & ~0x3); + } + } + + *val = readl(addr); + + return 0; +} + +static int ls_pcie_write_config(struct pci_controller *hose, pci_dev_t d, + int where, u32 val) +{ + struct ls_pcie *pcie = hose->priv_data; + u32 busdev, *addr; + + if (ls_pcie_addr_valid(hose, d)) + return -EINVAL; + + if (PCI_BUS(d) == hose->first_busno) { + addr = pcie->dbi + (where & ~0x3); + } else { + busdev = PCIE_ATU_BUS(PCI_BUS(d)) | + PCIE_ATU_DEV(PCI_DEV(d)) | + PCIE_ATU_FUNC(PCI_FUNC(d)); + + if (PCI_BUS(d) == hose->first_busno + 1) { + ls_pcie_cfg0_set_busdev(pcie, busdev); + addr = pcie->va_cfg0 + (where & ~0x3); + } else { + ls_pcie_cfg1_set_busdev(pcie, busdev); + addr = pcie->va_cfg1 + (where & ~0x3); + } + } + + writel(val, addr); + + return 0; +} + +static void ls_pcie_setup_ctrl(struct ls_pcie *pcie, + struct ls_pcie_info *info) +{ + struct pci_controller *hose = &pcie->hose; + pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); + + ls_pcie_setup_atu(pcie, info); + + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0); + + /* program correct class for RC */ + pci_hose_write_config_word(hose, dev, PCI_CLASS_DEVICE, + PCI_CLASS_BRIDGE_PCI); +} + +int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info) +{ + struct ls_pcie *pcie; + struct pci_controller *hose; + int num = dev - PCIE1; + pci_dev_t pdev = PCI_BDF(busno, 0, 0); + int i, linkup, ep_mode; + u8 header_type; + u16 temp16; + + if (!is_serdes_configured(dev)) { + printf("PCIe%d: disabled\n", num + 1); + return busno; + } + + pcie = malloc(sizeof(*pcie)); + if (!pcie) + return busno; + memset(pcie, 0, sizeof(*pcie)); + + hose = &pcie->hose; + hose->priv_data = pcie; + hose->first_busno = busno; + pcie->idx = num; + pcie->dbi = map_physmem(info->regs, PCIE_DBI_SIZE, MAP_NOCACHE); + pcie->va_cfg0 = map_physmem(info->cfg0_phys, + info->cfg0_size, + MAP_NOCACHE); + pcie->va_cfg1 = map_physmem(info->cfg1_phys, + info->cfg1_size, + MAP_NOCACHE); + + /* outbound memory */ + pci_set_region(&hose->regions[0], + (pci_size_t)info->mem_bus, + (phys_size_t)info->mem_phys, + (pci_size_t)info->mem_size, + PCI_REGION_MEM); + + /* outbound io */ + pci_set_region(&hose->regions[1], + (pci_size_t)info->io_bus, + (phys_size_t)info->io_phys, + (pci_size_t)info->io_size, + PCI_REGION_IO); + + /* System memory space */ + pci_set_region(&hose->regions[2], + CONFIG_SYS_PCI_MEMORY_BUS, + CONFIG_SYS_PCI_MEMORY_PHYS, + CONFIG_SYS_PCI_MEMORY_SIZE, + PCI_REGION_SYS_MEMORY); + + hose->region_count = 3; + + for (i = 0; i < hose->region_count; i++) + debug("PCI reg:%d %016llx:%016llx %016llx %08lx\n", + i, + (u64)hose->regions[i].phys_start, + (u64)hose->regions[i].bus_start, + (u64)hose->regions[i].size, + hose->regions[i].flags); + + pci_set_ops(hose, + pci_hose_read_config_byte_via_dword, + pci_hose_read_config_word_via_dword, + ls_pcie_read_config, + pci_hose_write_config_byte_via_dword, + pci_hose_write_config_word_via_dword, + ls_pcie_write_config); + + pci_hose_read_config_byte(hose, pdev, PCI_HEADER_TYPE, &header_type); + ep_mode = (header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL; + printf("PCIe%u: %s ", info->pci_num, + ep_mode ? "Endpoint" : "Root Complex"); + + linkup = ls_pcie_link_up(pcie); + + if (!linkup) { + /* Let the user know there's no PCIe link */ + printf("no link, regs @ 0x%lx\n", info->regs); + hose->last_busno = hose->first_busno; + return busno; + } + + /* Print the negotiated PCIe link width */ + pci_hose_read_config_word(hose, dev, PCIE_LINK_STA, &temp16); + printf("x%d gen%d, regs @ 0x%lx\n", (temp16 & 0x3f0) >> 4, + (temp16 & 0xf), info->regs); + + if (ep_mode) + return busno; + + ls_pcie_setup_ctrl(pcie, info); + + pci_register_hose(hose); + + hose->last_busno = pci_hose_scan(hose); + + printf("PCIe%x: Bus %02x - %02x\n", + info->pci_num, hose->first_busno, hose->last_busno); + + return hose->last_busno + 1; +} + +int ls_pcie_init_board(int busno) +{ + struct ls_pcie_info info; + +#ifdef CONFIG_PCIE1 + SET_LS_PCIE_INFO(info, 1); + busno = ls_pcie_init_ctrl(busno, PCIE1, &info); +#endif + +#ifdef CONFIG_PCIE2 + SET_LS_PCIE_INFO(info, 2); + busno = ls_pcie_init_ctrl(busno, PCIE2, &info); +#endif + +#ifdef CONFIG_PCIE3 + SET_LS_PCIE_INFO(info, 3); + busno = ls_pcie_init_ctrl(busno, PCIE3, &info); +#endif + +#ifdef CONFIG_PCIE4 + SET_LS_PCIE_INFO(info, 4); + busno = ls_pcie_init_ctrl(busno, PCIE4, &info); +#endif + + return busno; +} + +void pci_init_board(void) +{ + ls_pcie_init_board(0); +} + #ifdef CONFIG_OF_BOARD_SETUP #include #include @@ -38,6 +495,14 @@ void ft_pcie_setup(void *blob, bd_t *bd) #ifdef CONFIG_PCIE2 ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE2_ADDR, PCIE2); #endif + + #ifdef CONFIG_PCIE3 + ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE3_ADDR, PCIE3); + #endif + + #ifdef CONFIG_PCIE4 + ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE4_ADDR, PCIE4); + #endif } #else @@ -45,7 +510,3 @@ void ft_pcie_setup(void *blob, bd_t *bd) { } #endif - -void pci_init_board(void) -{ -} From 9f076be71313c1900fa9824e1f866e750c32e0db Mon Sep 17 00:00:00 2001 From: chenhui zhao Date: Fri, 23 Jan 2015 15:53:53 +0800 Subject: [PATCH 204/222] arm: ls102xa: workaround for cache coherency problem The RCPM FSM may not be reset after power-on, for example, in the cases of cold boot and wakeup from deep sleep. It causes cache coherency problem and may block deep sleep. Therefore, reset them if they are not be reset. Signed-off-by: Chenhui Zhao Reviewed-by: York Sun --- arch/arm/cpu/armv7/ls102xa/cpu.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 18665a32d2..1a640bbb9c 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -16,6 +16,13 @@ #include "fsl_epu.h" +#define DCSR_RCPM2_BLOCK_OFFSET 0x223000 +#define DCSR_RCPM2_CPMFSMCR0 0x400 +#define DCSR_RCPM2_CPMFSMSR0 0x404 +#define DCSR_RCPM2_CPMFSMCR1 0x414 +#define DCSR_RCPM2_CPMFSMSR1 0x418 +#define CPMFSMSR_FSM_STATE_MASK 0x7f + DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_SYS_DCACHE_OFF @@ -290,6 +297,27 @@ int cpu_eth_init(bd_t *bis) int arch_cpu_init(void) { void *epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET); + void *rcpm2_base = + (void *)(CONFIG_SYS_DCSRBAR + DCSR_RCPM2_BLOCK_OFFSET); + u32 state; + + /* + * The RCPM FSM state may not be reset after power-on. + * So, reset them. + */ + state = in_be32(rcpm2_base + DCSR_RCPM2_CPMFSMSR0) & + CPMFSMSR_FSM_STATE_MASK; + if (state != 0) { + out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR0, 0x80); + out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR0, 0x0); + } + + state = in_be32(rcpm2_base + DCSR_RCPM2_CPMFSMSR1) & + CPMFSMSR_FSM_STATE_MASK; + if (state != 0) { + out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR1, 0x80); + out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR1, 0x0); + } /* * After wakeup from deep sleep, Clear EPU registers From 8133574ea4769806145a8fd49fc0567db86583a8 Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Fri, 16 Jan 2015 17:21:34 +0800 Subject: [PATCH 205/222] arm: ls1021x: Add support for initializing CAAM's stream id There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id for using the same SMMU3 on LS1021A. Signed-off-by: Xiubo Li Signed-off-by: Alison Wang Reviewed-by: York Sun --- arch/arm/include/asm/arch-ls102xa/config.h | 1 + .../asm/arch-ls102xa/ls102xa_stream_id.h | 57 +++++++++++++++++++ board/freescale/common/ls102xa_stream_id.c | 15 +++++ board/freescale/ls1021aqds/ls1021aqds.c | 21 +++++++ board/freescale/ls1021atwr/ls1021atwr.c | 21 +++++++ 5 files changed, 115 insertions(+) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index cfabdc605f..3b6a1696d8 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -36,6 +36,7 @@ #define CONFIG_SYS_LS102XA_USB1_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) +#define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000 #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 #define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h index abd70fc706..fa571b3a38 100644 --- a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h +++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h @@ -7,11 +7,68 @@ #ifndef __FSL_LS102XA_STREAM_ID_H_ #define __FSL_LS102XA_STREAM_ID_H_ +#include + +#define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \ + { .compat = name, \ + .id = { idA }, .num_ids = 1, \ + .reg_offset = off + CONFIG_SYS_IMMR, \ + .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ + } + +#define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \ + { .compat = name, \ + .id = { idA, idB }, .num_ids = 2, \ + .reg_offset = off + CONFIG_SYS_IMMR, \ + .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ + } + +/* + * handle both old and new versioned SEC properties: + * "fsl,secX.Y" became "fsl,sec-vX.Y" during development + */ +#define SET_SEC_JR_LIODN_ENTRY(jrnum, liodnA, liodnB) \ + SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB, \ + offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum), \ + SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\ + offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum) + +/* This is a bit evil since we treat rtic param as both a string & hex value */ +#define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \ + SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \ + liodnA, \ + offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \ + SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \ + liodnA, \ + offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, \ + CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)) + +#define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \ + SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \ + offsetof(ccsr_sec_t, decoliodnr[num].ls) + \ + CONFIG_SYS_FSL_SEC_OFFSET, 0) + +struct liodn_id_table { + const char *compat; + u32 id[2]; + u8 num_ids; + phys_addr_t compat_offset; + unsigned long reg_offset; +}; + struct smmu_stream_id { uint16_t offset; uint16_t stream_id; char dev_name[32]; }; +void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size); void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num); #endif diff --git a/board/freescale/common/ls102xa_stream_id.c b/board/freescale/common/ls102xa_stream_id.c index 6154c9c458..f43426991b 100644 --- a/board/freescale/common/ls102xa_stream_id.c +++ b/board/freescale/common/ls102xa_stream_id.c @@ -16,3 +16,18 @@ void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num) for (i = 0; i < num; i++) out_be32(scfg + id[i].offset, id[i].stream_id); } + +void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size) +{ + int i; + u32 liodn; + + for (i = 0; i < size; i++) { + if (tbl[i].num_ids == 2) + liodn = (tbl[i].id[0] << 16) | tbl[i].id[1]; + else + liodn = tbl[i].id[0]; + + out_le32((uint32_t *)(tbl[i].reg_offset), liodn); + } +} diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 20eade4651..722b88f1e9 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -509,6 +509,25 @@ static struct csu_ns_dev ns_dev[] = { }; #endif +struct liodn_id_table sec_liodn_tbl[] = { + SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(a, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(b, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(c, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(d, 0x10), + SET_SEC_DECO_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(4, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(5, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(6, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(7, 0x10, 0x10), +}; + struct smmu_stream_id dev_stream_id[] = { { 0x100, 0x01, "ETSEC MAC1" }, { 0x104, 0x02, "ETSEC MAC2" }, @@ -541,6 +560,8 @@ int board_init(void) config_serdes_mux(); #endif + ls1021x_config_caam_stream_id(sec_liodn_tbl, + ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id)); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index bc8b00686c..fb8525fe59 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -401,6 +401,25 @@ static struct csu_ns_dev ns_dev[] = { }; #endif +struct liodn_id_table sec_liodn_tbl[] = { + SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_JR_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(a, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(b, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(c, 0x10), + SET_SEC_RTIC_LIODN_ENTRY(d, 0x10), + SET_SEC_DECO_LIODN_ENTRY(0, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(1, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(2, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(3, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(4, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(5, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(6, 0x10, 0x10), + SET_SEC_DECO_LIODN_ENTRY(7, 0x10, 0x10), +}; + struct smmu_stream_id dev_stream_id[] = { { 0x100, 0x01, "ETSEC MAC1" }, { 0x104, 0x02, "ETSEC MAC2" }, @@ -427,6 +446,8 @@ int board_init(void) #endif #endif + ls1021x_config_caam_stream_id(sec_liodn_tbl, + ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id)); From 0e1bf614d5045b060db8e1bf9e7f69afdf1c592f Mon Sep 17 00:00:00 2001 From: Volodymyr Riazantsev Date: Tue, 20 Jan 2015 10:16:44 -0500 Subject: [PATCH 206/222] mmc: fsl_esdhc: Add support for DDR mode Add support of the DDR mode for eSDHC driver. Enable it for i.MX6 SoC family only. Signed-off-by: Volodymyr Riazantsev Reviewed-by: York Sun --- drivers/mmc/fsl_esdhc.c | 8 ++++++-- include/configs/mx6_common.h | 2 ++ include/fsl_esdhc.h | 1 + 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index c55eb28217..f5d2ccba15 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -319,7 +319,8 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) esdhc_write32(®s->cmdarg, cmd->cmdarg); #if defined(CONFIG_FSL_USDHC) esdhc_write32(®s->mixctrl, - (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F)); + (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F) + | (mmc->ddr_mode ? XFERTYP_DDREN : 0)); esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000); #else esdhc_write32(®s->xfertyp, xfertyp); @@ -442,7 +443,7 @@ static void set_sysctl(struct mmc *mmc, uint clock) if ((sdhc_clk / (div * pre_div)) <= clock) break; - pre_div >>= 1; + pre_div >>= mmc->ddr_mode ? 2 : 1; div -= 1; clk = (pre_div << 8) | (div << 4); @@ -601,6 +602,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) } cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC; +#ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE + cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz; +#endif if (cfg->max_bus_width > 0) { if (cfg->max_bus_width < 8) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index e0528ce4b9..29b72b2e9d 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -28,6 +28,8 @@ #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif +#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE + #define CONFIG_MP #define CONFIG_MXC_GPT_HCLK diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index c1b6648591..313fa1e312 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -108,6 +108,7 @@ #define XFERTYP_RSPTYP_48_BUSY 0x00030000 #define XFERTYP_MSBSEL 0x00000020 #define XFERTYP_DTDSEL 0x00000010 +#define XFERTYP_DDREN 0x00000008 #define XFERTYP_AC12EN 0x00000004 #define XFERTYP_BCEN 0x00000002 #define XFERTYP_DMAEN 0x00000001 From 50bb94c9496113c8bb588c4d82f3d6c61279dc02 Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Tue, 24 Feb 2015 19:27:15 +0100 Subject: [PATCH 207/222] OMAP3: igep0032: Fix regression due commit f3b4bc45. Commit referenced in subject breaks IGEP0032 build with the following error: drivers/misc/status_led.c:30:7: error: 'RED_LED_GPIO' undeclared here (not in a function) scripts/Makefile.build:275: recipe for target 'drivers/misc/status_led.o' failed make[2]: *** [drivers/misc/status_led.o] Error 1 scripts/Makefile.build:420: recipe for target 'drivers/misc' failed make[1]: *** [drivers/misc] Error 2 Makefile:1093: recipe for target 'drivers' failed make: *** [drivers] Error 2 Fix this by skipping the status led on IGEP0032 machine as is not available and throw an error for future machines if the status led is not configured to avoid build breakage. Reported-by: Albert ARIBAUD Signed-off-by: Enric Balletbo i Serra --- include/configs/omap3_igep00x0.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 6295ec505f..a5e7d8f6a4 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -29,21 +29,24 @@ #define CONFIG_REVISION_TAG 1 -/* Status LED */ +/* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */ +#if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032) #define CONFIG_STATUS_LED #define CONFIG_BOARD_SPECIFIC_LED #define CONFIG_GPIO_LED #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) #define RED_LED_GPIO 27 -#endif -#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) +#elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) #define RED_LED_GPIO 16 +#else +#error "status LED not defined for this machine." #endif #define RED_LED_DEV 0 #define STATUS_LED_BIT RED_LED_GPIO #define STATUS_LED_STATE STATUS_LED_ON #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) #define STATUS_LED_BOOT RED_LED_DEV +#endif /* GPIO banks */ #define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */ From 6d4d05b1e9e411c90934e78bae76263f07881186 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 22:26:18 +0900 Subject: [PATCH 208/222] ARM: UniPhier: set CONFIG_SYS_MALLOC_F to the global default value It is true that malloc is necessary for Driver Model before relocation, but there is no good reason to reserve the malloc space more than enough. The default value 0x400 works well. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- arch/arm/cpu/armv7/uniphier/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig index 1a47ac9029..8fdef28c02 100644 --- a/arch/arm/cpu/armv7/uniphier/Kconfig +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -52,7 +52,7 @@ config SYS_MALLOC_F default y config SYS_MALLOC_F_LEN - default 0x2000 + default 0x400 config CMD_PINMON bool "Enable boot mode pins monitor command" From 66afaef22889e2685aa500c047b66ac003eea264 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 24 Feb 2015 22:26:19 +0900 Subject: [PATCH 209/222] kconfig: Adjust ordering so that defaults work as expected At present defaults in arch-specific Kconfig files are ignored if the top-level item comes ahead of it in include order. This means that it is not possible to have a U-Boot default that architectures and boards can override. This does not seem very useful. Move the include earlier to support this. Signed-off-by: Simon Glass Reported-by: Masahiro Yamada Reviewed-by: Masahiro Yamada --- Kconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Kconfig b/Kconfig index 75bab7f6cc..823f1e2b21 100644 --- a/Kconfig +++ b/Kconfig @@ -12,6 +12,9 @@ config KCONFIG_OBJDIR string option env="KCONFIG_OBJDIR" +# Allow defaults in arch-specific code to override any given here +source "arch/Kconfig" + menu "General setup" config LOCALVERSION @@ -172,8 +175,6 @@ config SYS_CLK_FREQ endmenu # Boot images -source "arch/Kconfig" - source "common/Kconfig" source "dts/Kconfig" From e02ee2548afe22f7d197b89df2ae7bd72f1df630 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 22:26:20 +0900 Subject: [PATCH 210/222] kconfig: switch to single .config configuration When Kconfig for U-boot was examined, one of the biggest issues was how to support multiple images (Normal, SPL, TPL). There were actually two options, "single .config" and "multiple .config". After some discussions and thought experiments, I chose the latter, i.e. to create ".config", "spl/.config", "tpl/.config" for Normal, SPL, TPL, respectively. It is true that the "multiple .config" strategy provided us the maximum flexibility and helped to avoid duplicating CONFIGs among Normal, SPL, TPL, but I have noticed some fatal problems: [1] It is impossible to share CONFIG options across the images. If you change the configuration of Main image, you often have to adjust some SPL configurations correspondingly. Currently, we cannot handle the dependencies between them. It means one of the biggest advantages of Kconfig is lost. [2] It is too painful to change both ".config" and "spl/.config". Sunxi guys started to work around this problem by creating a new configuration target. Commit cbdd9a9737cc (sunxi: kconfig: Add %_felconfig rule to enable FEL build of sunxi platforms.) added "make *_felconfig" to enable CONFIG_SPL_FEL on both images. Changing the configuration of multiple images in one command is a generic demand. The current implementation cannot propose any good solution about this. [3] Kconfig files are getting ugly and difficult to understand. Commit b724bd7d6349 (dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to Kconfig) has sprinkled "if !SPL_BUILD" over the Kconfig files. [4] The build system got more complicated than it should be. To adjust Linux-originated Kconfig to U-Boot, the helper script "scripts/multiconfig.sh" was introduced. Writing a complicated text processor is a shell script sometimes caused problems. Now I believe the "single .config" will serve us better. With it, all the problems above would go away. Instead, we will have to add some CONFIG_SPL_* (and CONFIG_TPL_*) options such as CONFIG_SPL_DM, but we will not have much. Anyway, this is what we do now in scripts/Makefile.spl. I admit my mistake with my apology and this commit switches to the single .config configuration. It is not so difficult to do that: - Remove unnecessary processings from scripts/multiconfig.sh This file will remain for a while to support the current defconfig format. It will be removed after more cleanups are done. - Adjust some makefiles and Kconfigs - Add some entries to include/config_uncmd_spl.h and the new file scripts/Makefile.uncmd_spl. Some CONFIG options that are not supported on SPL must be disabled because one .config is shared between SPL and U-Boot proper going forward. I know this is not a beautiful solution and I think we can do better, but let's see how much we will have to describe them. - update doc/README.kconfig More cleaning up patches will follow this. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- Kconfig | 14 -- arch/arm/cpu/armv7/uniphier/Kconfig | 1 - arch/arm/mach-tegra/Kconfig | 2 +- config.mk | 5 + configs/ph1_ld4_defconfig | 2 +- configs/ph1_pro4_defconfig | 2 +- configs/ph1_sld8_defconfig | 2 +- doc/README.kconfig | 122 +++---------- drivers/mtd/nand/Kconfig | 2 +- include/config_uncmd_spl.h | 9 + scripts/Makefile.autoconf | 36 ++-- scripts/Makefile.build | 3 +- scripts/Makefile.spl | 10 +- scripts/Makefile.uncmd_spl | 16 ++ scripts/multiconfig.sh | 261 +--------------------------- 15 files changed, 103 insertions(+), 384 deletions(-) create mode 100644 scripts/Makefile.uncmd_spl diff --git a/Kconfig b/Kconfig index 823f1e2b21..bb9b5c27ff 100644 --- a/Kconfig +++ b/Kconfig @@ -8,10 +8,6 @@ config UBOOTVERSION string option env="UBOOTVERSION" -config KCONFIG_OBJDIR - string - option env="KCONFIG_OBJDIR" - # Allow defaults in arch-specific code to override any given here source "arch/Kconfig" @@ -90,16 +86,6 @@ endmenu # General setup menu "Boot images" -config SPL_BUILD - bool - depends on $KCONFIG_OBJDIR="spl" || $KCONFIG_OBJDIR="tpl" - default y - -config TPL_BUILD - bool - depends on $KCONFIG_OBJDIR="tpl" - default y - config SUPPORT_SPL bool diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig index 8fdef28c02..9bbc011eee 100644 --- a/arch/arm/cpu/armv7/uniphier/Kconfig +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -71,7 +71,6 @@ config CMD_DDRPHY_DUMP choice prompt "DDR3 Frequency select" - depends on SPL_BUILD config DDR_FREQ_1600 bool "DDR3 1600" diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 3a8e2b19d6..8569167369 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -24,7 +24,7 @@ config SYS_MALLOC_F_LEN default 0x1800 config USE_PRIVATE_LIBGCC - default y if SPL_BUILD + default y config DM default y if !SPL_BUILD diff --git a/config.mk b/config.mk index 64c2951ac1..6282919482 100644 --- a/config.mk +++ b/config.mk @@ -24,6 +24,11 @@ VENDOR := ARCH := $(CONFIG_SYS_ARCH:"%"=%) CPU := $(CONFIG_SYS_CPU:"%"=%) +ifdef CONFIG_SPL_BUILD +ifdef CONFIG_TEGRA +CPU := arm720t +endif +endif BOARD := $(CONFIG_SYS_BOARD:"%"=%) ifneq ($(CONFIG_SYS_VENDOR),) VENDOR := $(CONFIG_SYS_VENDOR:"%"=%) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 86b4b15724..fa8d291ca1 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -39,4 +39,4 @@ CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -S:CONFIG_SPL_NAND_DENALI=y +CONFIG_SPL_NAND_DENALI=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 242bcf9263..12f069400f 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -39,4 +39,4 @@ CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -S:CONFIG_SPL_NAND_DENALI=y +CONFIG_SPL_NAND_DENALI=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 8e95f17e6d..e66d166566 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -39,4 +39,4 @@ CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -S:CONFIG_SPL_NAND_DENALI=y +CONFIG_SPL_NAND_DENALI=y diff --git a/doc/README.kconfig b/doc/README.kconfig index 69dc45970b..288d17d232 100644 --- a/doc/README.kconfig +++ b/doc/README.kconfig @@ -17,109 +17,45 @@ source directory for a basic specification of Kconfig. Difference from Linux's Kconfig ------------------------------- -The biggest difference between Linux Kernel and U-Boot in terms of the -configuration is that U-Boot has to configure multiple boot images per board: -Normal, SPL, TPL. -Kconfig functions need to be expanded for U-Boot to handle multiple images. -The files scripts/kconfig/* were imported from Linux Kernel and adjusted -for that purpose. - -See below for how each configuration target works in U-Boot: - -- config, nconfig, menuconfig, xconfig, gconfig - - These targets are used to configure Normal and create (or modify) the - .config file. For SPL configuration, the configutation targets are prefixed - with "spl/", for example "make spl/config", "make spl/menuconfig", etc. - Those targets create or modify the spl/.config file. Likewise, run - "make tpl/config", "make tpl/menuconfig", etc. for TPL. +Here are some worth-mentioning configuration targets. - silentoldconfig This target updates .config, include/generated/autoconf.h and - include/configs/*. In U-Boot, the same thing is done for SPL, TPL, - if supported by the target board. Depending on whether CONFIG_SPL and - CONFIG_TPL are defined, "make silentoldconfig" iterates three times at most - changing the work directory. + include/configs/* as in Linux. In U-Boot, it also does the followings + for the compatibility with the old configuration system: - To sum up, "make silentoldconfig" possibly updates: - - .config, include/generated/autoconf.h, include/config/* - - spl/.config, spl/include/generated/autoconf.h, spl/include/config/* - (in case CONFIG_SPL=y) - - tpl/.config, tpl/include/generated/autoconf.h, tpl/include/config/* - (in case CONFIG_TPL=y) + * create a symbolic link "arch/${ARCH}/include/asm/arch" pointing to + the SoC/CPU specific header directory + * create include/config.h + * create include/autoconf.mk + * create spl/include/autoconf.mk (SPL and TPL only) + * create tpl/include/autoconf.mk (TPL only) -- defconfig, _defconfig + If we could completely switch to Kconfig in a long run + (i.e. remove all the include/configs/*.h), those additional processings + above would be removed. - The target "_defconfig" is used to create the .config based on the - file configs/_defconfig. The "defconfig" target is the same - except it checks for a file specified with KBUILD_DEFCONFIG environment. +- defconfig - Note: - The defconfig files are placed under the "configs" directory, - not "arch/$(ARCH)/configs". This is because "ARCH" is not necessarily - given from the command line for the U-Boot configuration and build. + In U-Boot, "make defconfig" is a shorthand of "make sandbox_defconfig" - The defconfig file format in U-Boot has the special syntax; each line has - ":" prefix to show which image(s) the line is valid for. - For example, +- _defconfig - CONFIG_FOO=100 - S:CONFIG_FOO=200 - T:CONFIG_FOO=300 - ST:CONFIG_BAR=y - +S:CONFIG_BAZ=y - +T:CONFIG_QUX=y - +ST:CONFIG_QUUX=y - - Here, the ":" prefix is one of: - None - the line is valid only for Normal image - S: - the line is valid only for SPL image - T: - the line is valid only for TPL image - ST: - the line is valid for SPL and TPL images - +S: - the line is valid for Normal and SPL images - +T: - the line is valid for Normal and TPL images - +ST: - the line is valid for Normal, SPL and TPL images - - So, if neither CONFIG_SPL nor CONFIG_TPL is defined, the defconfig file - has no ":" part and therefore has the same form as in Linux. - From the example defconfig shown above, three separete configuration sets - are generated and used for creating .config, spl/.config and tpl/.config. - - - Input for the default configuration of Normal - CONFIG_FOO=100 - CONFIG_BAZ=y - CONFIG_QUX=y - CONFIG_QUUX=y - - - Input for the default configuration of SPL - CONFIG_FOO=200 - CONFIG_BAR=y - CONFIG_BAZ=y - CONFIG_QUUX=y - - - Input for the default configuration of TPL - CONFIG_FOO=300 - CONFIG_BAR=y - CONFIG_QUX=y - CONFIG_QUUX=y - -- savedefconfig - - This is the reverse operation of "make defconfig". If neither CONFIG_SPL - nor CONFIG_TPL is defined in the .config file, it works like "savedefconfig" - in Linux Kernel: creates the minimal set of config based on the .config - and saves it into the "defconfig" file. If CONFIG_SPL (and CONFIG_TPL) is - defined, the common lines among .config, spl/.config (and tpl/.config) are - coalesced together with "" prefix for each line as shown above. - This file can be used as an input of "defconfig" target. + Now it works as in Linux. + The prefixes such as "+S:" in *_defconfig are deprecated. + You can simply remove the prefixes. Do not add them for new boards. - _config This does not exist in Linux's Kconfig. + "make _config" works the same as "make _defconfig". Prior to Kconfig, in U-Boot, "make _config" was used for the - configuration. It is still supported for backward compatibility and - its behavior is the same as "make _defconfig". + configuration. It is still supported for backward compatibility, so + we do not need to update the distro recipes. + + +The other configuration targets work as in Linux Kernel. Migration steps to Kconfig @@ -137,14 +73,10 @@ based configuration as follows: Configuration files for use in C sources - include/generated/autoconf.h (generated by Kconfig for Normal) - - spl/include/generated/autoconf.h (generated by Kconfig for SPL) - - tpl/include/generated/autoconf.h (generated by Kconfig for TPL) - include/configs/.h (exists for all boards) Configuration file for use in makefiles - - include/config/auto.conf (generated by Kconfig for Normal) - - spl/include/config/auto.conf (generated by Kconfig for SPL) - - tpl/include/config/auto.conf (generated by Kconfig for TPL) + - include/config/auto.conf (generated by Kconfig) - include/autoconf.mk (generated by the old config for Normal) - spl/include/autoconfig.mk (generated by the old config for SPL) - tpl/include/autoconfig.mk (generated by the old config for TPL) @@ -215,8 +147,8 @@ TODO CONFIG_SYS_EXTRA_OPTIONS should not be used for new boards. - In the pre-Kconfig, a single board had multiple entries in the boards.cfg - file with differences in the option fields. The correspoing defconfig files - were auto-generated when switching to Kconfig. Now we have too many + file with differences in the option fields. The corresponding defconfig + files were auto-generated when switching to Kconfig. Now we have too many defconfig files compared with the number of the supported boards. It is recommended to have only one defconfig per board and allow users to select the config options. diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index c24221499b..ccd8211eb2 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -36,7 +36,7 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES endif -if SPL_BUILD +if SPL config SPL_NAND_DENALI bool "Support Denali NAND controller for SPL" diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index 9cb7a9a1fc..9f0fe44443 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -20,5 +20,14 @@ #undef CONFIG_CMD_SNTP #undef CONFIG_CMD_TFTPPUT #undef CONFIG_CMD_TFTPSRV +#undef CONFIG_OF_CONTROL + +#ifndef CONFIG_SPL_DM +#undef CONFIG_DM_SERIAL +#undef CONFIG_DM_GPIO +#undef CONFIG_DM_I2C +#undef CONFIG_DM_SPI +#endif + #endif /* CONFIG_SPL_BUILD */ #endif /* __CONFIG_UNCMD_SPL_H__ */ diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf index 58e1642fb9..f054081c98 100644 --- a/scripts/Makefile.autoconf +++ b/scripts/Makefile.autoconf @@ -7,9 +7,17 @@ # (= When we move all CONFIGs from header files to Kconfig) # this makefile can be deleted. -# obj is "include" or "spl/include" or "tpl/include" -# for non-SPL, SPL, TPL, respectively -include $(obj)/config/auto.conf +__all: include/autoconf.mk include/autoconf.mk.dep + +ifeq ($(shell grep -q '^CONFIG_SPL=y' include/config/auto.conf 2>/dev/null && echo y),y) +__all: spl/include/autoconf.mk +endif + +ifeq ($(shell grep -q '^CONFIG_TPL=y' include/config/auto.conf 2>/dev/null && echo y),y) +__all: tpl/include/autoconf.mk +endif + +include include/config/auto.conf include scripts/Kbuild.include @@ -22,7 +30,6 @@ CPP = $(CC) -E include config.mk UBOOTINCLUDE := \ - -I$(obj) \ -Iinclude \ $(if $(KBUILD_SRC), -I$(srctree)/include) \ -I$(srctree)/arch/$(ARCH)/include \ @@ -48,10 +55,10 @@ include/autoconf.mk.dep: FORCE # same CONFIG macros quiet_cmd_autoconf = GEN $@ cmd_autoconf = \ - $(CPP) $(c_flags) -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \ + $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \ sed -n -f $(srctree)/tools/scripts/define2mk.sed $@.tmp | \ while read line; do \ - if ! grep -q "$${line%=*}=" $(obj)/config/auto.conf; then \ + if ! grep -q "$${line%=*}=" include/config/auto.conf; then \ echo "$$line"; \ fi \ done > $@; \ @@ -60,10 +67,19 @@ quiet_cmd_autoconf = GEN $@ rm $@.tmp; false; \ } -$(obj)/autoconf.mk: FORCE +include/autoconf.mk: FORCE $(call cmd,autoconf) -include/autoconf.mk include/autoconf.mk.dep: include/config.h +spl/include/autoconf.mk: FORCE + $(Q)mkdir -p $(dir $@) + $(call cmd,autoconf,-DCONFIG_SPL_BUILD) + +tpl/include/autoconf.mk: FORCE + $(Q)mkdir -p $(dir $@) + $(call cmd,autoconf,-DCONFIG_SPL_BUILD -DCONFIG_TPL_BUILD) + +include/autoconf.mk include/autoconf.mk.dep \ + spl/include/autoconf.mk tpl/include/autoconf.mk: include/config.h # include/config.h # Prior to Kconfig, it was generated by mkconfig. Now it is created here. @@ -75,10 +91,10 @@ define filechk_config_h done; \ echo \#define CONFIG_BOARDDIR board/$(if $(VENDOR),$(VENDOR)/)$(BOARD);\ echo \#include \; \ + echo \#include \; \ echo \#include \; \ echo \#include \; \ - echo \#include \; \ - echo \#include \; ) + echo \#include \;) endef include/config.h: scripts/Makefile.autoconf create_symlink FORCE diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 14cf0925d2..ac0554eeae 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -41,8 +41,9 @@ subdir-ccflags-y := # Read auto.conf if it exists, otherwise ignore # Modified for U-Boot --include $(prefix)/include/config/auto.conf +-include include/config/auto.conf -include $(prefix)/include/autoconf.mk +include scripts/Makefile.uncmd_spl include scripts/Kbuild.include diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index cc189adc0c..fcacb7fcb4 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -21,13 +21,15 @@ _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) include $(srctree)/scripts/Kbuild.include -UBOOTINCLUDE := -I$(obj)/include $(UBOOTINCLUDE) - --include $(obj)/include/config/auto.conf +-include include/config/auto.conf -include $(obj)/include/autoconf.mk +KBUILD_CPPFLAGS += -DCONFIG_SPL_BUILD +ifeq ($(CONFIG_TPL_BUILD),y) +KBUILD_CPPFLAGS += -DCONFIG_TPL_BUILD +endif + ifeq ($(CONFIG_TPL_BUILD),y) -export CONFIG_TPL_BUILD SPL_BIN := u-boot-tpl else SPL_BIN := u-boot-spl diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl new file mode 100644 index 0000000000..86c938e1f9 --- /dev/null +++ b/scripts/Makefile.uncmd_spl @@ -0,0 +1,16 @@ +# Makefile version of include/config_uncmd_spl.h +# +# TODO: Invent a better way + +ifdef CONFIG_SPL_BUILD +CONFIG_OF_CONTROL= + +ifndef CONFIG_SPL_DM +CONFIG_DM_SERIAL= +CONFIG_DM_GPIO= +CONIFG_DM_I2C= +CONFIG_DM_SPI= +CONFIG_DM_SPI_FLASH= +endif + +endif diff --git a/scripts/multiconfig.sh b/scripts/multiconfig.sh index 366e8faaa6..cc8a787f88 100755 --- a/scripts/multiconfig.sh +++ b/scripts/multiconfig.sh @@ -2,11 +2,7 @@ # # A wrapper script to adjust Kconfig for U-Boot # -# Instead of touching various parts under the scripts/kconfig/ directory, -# pushing necessary adjustments into this single script would be better -# for code maintainance. All the make targets related to the configuration -# (make %config) should be invoked via this script. -# See doc/README.kconfig for further information of Kconfig. +# This file will be removed after cleaning up defconfig files # # Copyright (C) 2014, Masahiro Yamada # @@ -15,77 +11,23 @@ set -e -# Set "DEBUG" enavironment variable to show debug messages -debug () { - if [ $DEBUG ]; then - echo "$@" - fi -} - -# Useful shorthands -build () { - debug $progname: $MAKE -f $srctree/scripts/Makefile.build obj="$@" - $MAKE -f $srctree/scripts/Makefile.build obj="$@" -} - -autoconf () { - debug $progname: $MAKE -f $srctree/scripts/Makefile.autoconf obj="$@" - $MAKE -f $srctree/scripts/Makefile.autoconf obj="$@" -} - # Make a configuration target # Usage: # run_make_config # : Make target such as "config", "menuconfig", "defconfig", etc. -# : Target directory where the make command is run. -# Typically "", "spl", "tpl" for Normal, SPL, TPL, respectively. run_make_config () { - target=$1 - objdir=$2 - # Linux expects defconfig files in arch/$(SRCARCH)/configs/ directory, # but U-Boot has them in configs/ directory. # Give SRCARCH=.. to fake scripts/kconfig/Makefile. - options="SRCARCH=.. KCONFIG_OBJDIR=$objdir" - if [ "$objdir" ]; then - options="$options KCONFIG_CONFIG=$objdir/$KCONFIG_CONFIG" - mkdir -p $objdir - fi - - build scripts/kconfig $options $target -} - -# Parse .config file to detect if CONFIG_SPL, CONFIG_TPL is enabled -# and returns: -# "" if neither CONFIG_SPL nor CONFIG_TPL is defined -# "spl" if CONFIG_SPL is defined but CONFIG_TPL is not -# "spl tpl" if both CONFIG_SPL and CONFIG_TPL are defined -get_enabled_subimages() { - if [ ! -r "$KCONFIG_CONFIG" ]; then - # This should never happen - echo "$progname: $KCONFIG_CONFIG not found" >&2 - exit 1 - fi - - # CONFIG_SPL=y -> spl - # CONFIG_TPL=y -> tpl - sed -n -e 's/^CONFIG_SPL=y$/spl/p' -e 's/^CONFIG_TPL=y$/tpl/p' \ - $KCONFIG_CONFIG + $MAKE -f $srctree/scripts/Makefile.build obj=scripts/kconfig SRCARCH=.. $1 } do_silentoldconfig () { run_make_config silentoldconfig - subimages=$(get_enabled_subimages) - - for obj in $subimages - do - mkdir -p $obj/include/config $obj/include/generated - run_make_config silentoldconfig $obj - done # If the following part fails, include/config/auto.conf should be # deleted so "make silentoldconfig" will be re-run on the next build. - autoconf include include/autoconf.mk include/autoconf.mk.dep || { + $MAKE -f $srctree/scripts/Makefile.autoconf || { rm -f include/config/auto.conf exit 1 } @@ -95,14 +37,6 @@ do_silentoldconfig () { # than include/config.h. # Otherwise, 'make silentoldconfig' would be invoked twice. touch include/config/auto.conf - - for obj in $subimages - do - autoconf $obj/include $obj/include/autoconf.mk || { - rm -f include/config/auto.conf - exit 1 - } - done } cleanup_after_defconfig () { @@ -116,7 +50,6 @@ cleanup_after_defconfig () { # do_board_defconfig _defconfig do_board_defconfig () { defconfig_path=$srctree/configs/$1 - tmp_defconfig_path=configs/.tmp_defconfig if [ ! -r $defconfig_path ]; then echo >&2 "***" @@ -126,42 +59,17 @@ do_board_defconfig () { fi mkdir -p arch configs - # defconfig for Normal: - # pick lines without prefixes and lines starting '+' prefix - # and rip the prefixes off. - sed -n -e '/^[+A-Z]*:/!p' -e 's/^+[A-Z]*://p' $defconfig_path \ - > configs/.tmp_defconfig + # prefix "*:" is deprecated. Drop it simply. + sed -e 's/^[+A-Z]*://' $defconfig_path > configs/.tmp_defconfig run_make_config .tmp_defconfig || { cleanup_after_defconfig exit 1 } - for img in $(get_enabled_subimages) - do - symbol=$(echo $img | cut -c 1 | tr '[a-z]' '[A-Z]') - # defconfig for SPL, TPL: - # pick lines with 'S', 'T' prefix and rip the prefixes off - sed -n -e 's/^[+A-Z]*'$symbol'[A-Z]*://p' $defconfig_path \ - > configs/.tmp_defconfig - run_make_config .tmp_defconfig $img || { - cleanup_after_defconfig - exit 1 - } - done - cleanup_after_defconfig } -do_defconfig () { - if [ "$KBUILD_DEFCONFIG" ]; then - do_board_defconfig $KBUILD_DEFCONFIG - echo "*** Default configuration is based on '$KBUILD_DEFCONFIG'" - else - run_make_config defconfig - fi -} - do_board_felconfig () { do_board_defconfig ${1%%_felconfig}_defconfig if ! grep -q CONFIG_ARCH_SUNXI=y .config || ! grep -q CONFIG_SPL=y .config ; then @@ -169,162 +77,11 @@ do_board_felconfig () { exit 1 fi sed -i -e 's/\# CONFIG_SPL_FEL is not set/CONFIG_SPL_FEL=y\nCONFIG_UART0_PORT_F=n/g' \ - .config spl/.config + .config } -do_savedefconfig () { - if [ -r "$KCONFIG_CONFIG" ]; then - subimages=$(get_enabled_subimages) - else - subimages= - fi - - run_make_config savedefconfig - - output_lines= - - # -r option is necessay because some string-type configs may include - # backslashes as an escape character - while read -r line - do - output_lines="$output_lines%$line" - done < defconfig - - for img in $subimages - do - run_make_config savedefconfig $img - - symbol=$(echo $img | cut -c 1 | tr '[a-z]' '[A-Z]') - unmatched= - - while read -r line - do - tmp= - match= - - # "# CONFIG_FOO is not set" should not be divided. - # Use "%" as a separator, instead of a whitespace. - # "%" is unlikely to appear in defconfig context. - save_IFS=$IFS - IFS=% - # coalesce common lines together - for i in $output_lines - do - case "$i" in - [+A-Z]*:$line) - tmp="$tmp%$unmatched" - i=$(echo "$i" | \ - sed -e "s/^\([^:]*\)/\1$symbol/") - tmp="$tmp%$i" - match=1 - ;; - $line) - tmp="$tmp%$unmatched" - tmp="$tmp%+$symbol:$i" - match=1 - ;; - *) - tmp="$tmp%$i" - ;; - esac - done - - # Restore the default separator for the outer for loop. - IFS=$save_IFS - - if [ "$match" ]; then - output_lines="$tmp" - unmatched= - else - unmatched="$unmatched%$symbol:$line" - fi - done < defconfig - - output_lines="$output_lines%$unmatched" - done - - rm -f defconfig - touch defconfig - - save_IFS=$IFS - IFS=% - - for line in $output_lines - do - case "$line" in - "") - # do not output blank lines - ;; - *) - echo $line >> defconfig - ;; - esac - done - - IFS=$save_IFS -} - -# Some sanity checks before running "make /", -# where should be either "spl" or "tpl". -# Doing "make spl/menuconfig" etc. on a non-SPL board makes no sense. -# It should be allowed only when ".config" exists and "CONFIG_SPL" is enabled. -# -# Usage: -# check_enabled_sumbimage / -check_enabled_subimage () { - - case $2 in - spl|tpl) ;; - *) - echo >&2 "***" - echo >&2 "*** \"make $1\" is not supported." - echo >&2 "***" - exit 1 - ;; - esac - test -r "$KCONFIG_CONFIG" && get_enabled_subimages | grep -q $2 || { - config=CONFIG_$(echo $2 | tr '[a-z]' '[A-Z]') - - echo >&2 "***" - echo >&2 "*** Create \"$KCONFIG_CONFIG\" with \"$config\" enabled" - echo >&2 "*** before \"make $1\"." - echo >&2 "***" - exit 1 - } -} - -# Usage: -# do_others / -# The field "/" is typically empy, "spl/", "tpl/" for Normal, SPL, TPL, -# respectively. -# The field "" is a configuration target such as "config", -# "menuconfig", etc. do_others () { - target=${1##*/} - - if [ "$target" = "$1" ]; then - objdir= - else - objdir=${1%/*} - check_enabled_subimage $1 $objdir - - if [ -f "$objdir/$KCONFIG_CONFIG" ]; then - timestamp_before=$(stat --printf="%Y" \ - $objdir/$KCONFIG_CONFIG) - fi - fi - - run_make_config $target $objdir - - if [ "$timestamp_before" -a -f "$objdir/$KCONFIG_CONFIG" ]; then - timestamp_after=$(stat --printf="%Y" $objdir/$KCONFIG_CONFIG) - - if [ "$timestamp_after" -gt "$timestamp_before" ]; then - # $objdir/.config has been updated. - # touch .config to invoke "make silentoldconfig" - touch $KCONFIG_CONFIG - fi - fi + run_make_config $1 } progname=$(basename $0) @@ -340,10 +97,6 @@ case $target in do_board_defconfig ${target%_config}_defconfig;; silentoldconfig) do_silentoldconfig;; -defconfig) - do_defconfig;; -savedefconfig) - do_savedefconfig;; *) do_others $target;; esac From d648964fc2495f1184af5782a0b7fc670ba5826e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 22:26:21 +0900 Subject: [PATCH 211/222] kconfig: remove unneeded dependency on !SPL_BUILD Now CONFIG_SPL_BUILD is not defined in Kconfig, so "!depends on SPL_BUILD" and "if !SPL_BUILD" are redundant. Signed-off-by: Masahiro Yamada --- Kconfig | 12 ++---------- arch/arm/Kconfig | 7 +++---- arch/arm/cpu/arm1176/bcm2835/Kconfig | 6 +++--- arch/arm/cpu/armv7/exynos/Kconfig | 28 ++++++++++++++-------------- arch/arm/cpu/armv7/omap3/Kconfig | 10 +++++----- arch/arm/cpu/armv7/s5pc1xx/Kconfig | 4 ++-- arch/arm/cpu/armv7/uniphier/Kconfig | 1 - arch/arm/mach-tegra/Kconfig | 12 ++++++------ board/compulab/cm_t335/Kconfig | 6 +++--- board/gumstix/pepper/Kconfig | 6 +++--- board/isee/igep0033/Kconfig | 6 +++--- board/phytec/pcm051/Kconfig | 6 +++--- board/samsung/goni/Kconfig | 6 +++--- board/samsung/smdkc100/Kconfig | 6 +++--- board/silica/pengwyn/Kconfig | 6 +++--- board/ti/am335x/Kconfig | 10 +++++----- common/Kconfig | 1 - drivers/core/Kconfig | 16 ++++++---------- drivers/mtd/nand/Kconfig | 4 ---- dts/Kconfig | 1 - include/config_uncmd_spl.h | 4 ++++ scripts/Makefile.uncmd_spl | 2 ++ 22 files changed, 73 insertions(+), 87 deletions(-) diff --git a/Kconfig b/Kconfig index bb9b5c27ff..d0318cc879 100644 --- a/Kconfig +++ b/Kconfig @@ -15,7 +15,6 @@ menu "General setup" config LOCALVERSION string "Local version - append to U-Boot release" - depends on !SPL_BUILD help Append an extra string to the end of your U-Boot version. This will show up on your boot log, for example. @@ -26,7 +25,6 @@ config LOCALVERSION config LOCALVERSION_AUTO bool "Automatically append version information to the version string" - depends on !SPL_BUILD default y help This will try to automatically determine if the current tree is a @@ -47,7 +45,6 @@ config LOCALVERSION_AUTO config CC_OPTIMIZE_FOR_SIZE bool "Optimize for size" - depends on !SPL_BUILD default y help Enabling this option will pass "-Os" instead of "-O2" to gcc @@ -95,23 +92,19 @@ config SUPPORT_TPL config SPL bool depends on SUPPORT_SPL - prompt "Enable SPL" if !SPL_BUILD - default y if SPL_BUILD + prompt "Enable SPL" help If you want to build SPL as well as the normal image, say Y. config TPL bool depends on SPL && SUPPORT_TPL - prompt "Enable TPL" if !SPL_BUILD - default y if TPL_BUILD - default n + prompt "Enable TPL" help If you want to build TPL as well as the normal image and SPL, say Y. config FIT bool "Support Flattened Image Tree" - depends on !SPL_BUILD help This option allows to boot the new uImage structrure, Flattened Image Tree. FIT is formally a FDT, which can include @@ -135,7 +128,6 @@ config FIT_SIGNATURE config SYS_EXTRA_OPTIONS string "Extra Options (DEPRECATED)" - depends on !SPL_BUILD help The old configuration infrastructure (= mkconfig + boards.cfg) provided the extra options field. If you have something like diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 820ba1ccab..34083192b6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -620,9 +620,8 @@ config TEGRA bool "NVIDIA Tegra" select SUPPORT_SPL select SPL - select OF_CONTROL if !SPL_BUILD - select CPU_ARM720T if SPL_BUILD - select CPU_V7 if !SPL_BUILD + select OF_CONTROL + select CPU_V7 config TARGET_VEXPRESS64_AEMV8A bool "Support vexpress_aemv8a" @@ -714,7 +713,7 @@ config ARCH_UNIPHIER select CPU_V7 select SUPPORT_SPL select SPL - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL endchoice diff --git a/arch/arm/cpu/arm1176/bcm2835/Kconfig b/arch/arm/cpu/arm1176/bcm2835/Kconfig index 162f973f6c..73cc72b411 100644 --- a/arch/arm/cpu/arm1176/bcm2835/Kconfig +++ b/arch/arm/cpu/arm1176/bcm2835/Kconfig @@ -1,12 +1,12 @@ if TARGET_RPI || TARGET_RPI_2 config DM - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y endif diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index 2064efa761..eb86a7fe7d 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -6,7 +6,7 @@ choice config TARGET_SMDKV310 select SUPPORT_SPL bool "Exynos4210 SMDKV310 board" - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL config TARGET_TRATS bool "Exynos4210 Trats board" @@ -33,32 +33,32 @@ config TARGET_ARNDALE select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select SUPPORT_SPL - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL config TARGET_SMDK5250 bool "SMDK5250 board" select SUPPORT_SPL - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL config TARGET_SNOW bool "Snow board" select SUPPORT_SPL - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL config TARGET_SMDK5420 bool "SMDK5420 board" select SUPPORT_SPL - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL config TARGET_PEACH_PI bool "Peach Pi board" select SUPPORT_SPL - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL config TARGET_PEACH_PIT bool "Peach Pit board" select SUPPORT_SPL - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL endchoice @@ -66,25 +66,25 @@ config SYS_SOC default "exynos" config DM - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y config DM_SPI - default y if !SPL_BUILD + default y config DM_SPI_FLASH - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config SYS_MALLOC_F - default y if !SPL_BUILD + default y config SYS_MALLOC_F_LEN - default 0x400 if !SPL_BUILD + default 0x400 source "board/samsung/smdkv310/Kconfig" source "board/samsung/trats/Kconfig" diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index 46440981b3..4a0ac2c987 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -94,19 +94,19 @@ config TARGET_TWISTER endchoice config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if DM && !SPL_BUILD + default y if DM config DM_SERIAL - default y if DM && !SPL_BUILD + default y if DM config SYS_MALLOC_F - default y if DM && !SPL_BUILD + default y if DM config SYS_MALLOC_F_LEN - default 0x400 if DM && !SPL_BUILD + default 0x400 if DM config SYS_SOC default "omap3" diff --git a/arch/arm/cpu/armv7/s5pc1xx/Kconfig b/arch/arm/cpu/armv7/s5pc1xx/Kconfig index 628813423f..bc73813832 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/Kconfig +++ b/arch/arm/cpu/armv7/s5pc1xx/Kconfig @@ -5,11 +5,11 @@ choice config TARGET_S5P_GONI bool "S5P Goni board" - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL config TARGET_SMDKC100 bool "Support smdkc100 board" - select OF_CONTROL if !SPL_BUILD + select OF_CONTROL endchoice diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig index 9bbc011eee..8335685e32 100644 --- a/arch/arm/cpu/armv7/uniphier/Kconfig +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -64,7 +64,6 @@ config CMD_PINMON config CMD_DDRPHY_DUMP bool "Enable dump command of DDR PHY parameters" - depends on !SPL_BUILD help The command "ddrphy" shows the resulting parameters of DDR PHY training; it is useful for the evaluation of DDR PHY training. diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 8569167369..8615248377 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -27,22 +27,22 @@ config USE_PRIVATE_LIBGCC default y config DM - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y config DM_SPI - default y if !SPL_BUILD + default y config DM_SPI_FLASH - default y if !SPL_BUILD + default y config DM_I2C - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y source "arch/arm/mach-tegra/tegra20/Kconfig" source "arch/arm/mach-tegra/tegra30/Kconfig" diff --git a/board/compulab/cm_t335/Kconfig b/board/compulab/cm_t335/Kconfig index aadbfbc84d..3a8f304bd9 100644 --- a/board/compulab/cm_t335/Kconfig +++ b/board/compulab/cm_t335/Kconfig @@ -13,12 +13,12 @@ config SYS_CONFIG_NAME default "cm_t335" config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y endif diff --git a/board/gumstix/pepper/Kconfig b/board/gumstix/pepper/Kconfig index 3099a9eae1..750db8585d 100644 --- a/board/gumstix/pepper/Kconfig +++ b/board/gumstix/pepper/Kconfig @@ -13,12 +13,12 @@ config SYS_CONFIG_NAME default "pepper" config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y endif diff --git a/board/isee/igep0033/Kconfig b/board/isee/igep0033/Kconfig index 2fe2ef1706..9a8421eb7a 100644 --- a/board/isee/igep0033/Kconfig +++ b/board/isee/igep0033/Kconfig @@ -13,12 +13,12 @@ config SYS_CONFIG_NAME default "am335x_igep0033" config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y endif diff --git a/board/phytec/pcm051/Kconfig b/board/phytec/pcm051/Kconfig index 65094cf9fd..bb987156e6 100644 --- a/board/phytec/pcm051/Kconfig +++ b/board/phytec/pcm051/Kconfig @@ -13,12 +13,12 @@ config SYS_CONFIG_NAME default "pcm051" config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y endif diff --git a/board/samsung/goni/Kconfig b/board/samsung/goni/Kconfig index 2c5d3fc3be..006e864e0b 100644 --- a/board/samsung/goni/Kconfig +++ b/board/samsung/goni/Kconfig @@ -13,12 +13,12 @@ config SYS_CONFIG_NAME default "s5p_goni" config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y endif diff --git a/board/samsung/smdkc100/Kconfig b/board/samsung/smdkc100/Kconfig index 996fe3cc45..ea87166d03 100644 --- a/board/samsung/smdkc100/Kconfig +++ b/board/samsung/smdkc100/Kconfig @@ -13,12 +13,12 @@ config SYS_CONFIG_NAME default "smdkc100" config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y endif diff --git a/board/silica/pengwyn/Kconfig b/board/silica/pengwyn/Kconfig index 6ecda8041c..2e9a2b303f 100644 --- a/board/silica/pengwyn/Kconfig +++ b/board/silica/pengwyn/Kconfig @@ -13,12 +13,12 @@ config SYS_CONFIG_NAME default "pengwyn" config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if !SPL_BUILD + default y config DM_SERIAL - default y if !SPL_BUILD + default y endif diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index a20e0c1ab9..722f9d57c4 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -39,18 +39,18 @@ config NOR_BOOT NOR for environment. config DM - default y if !SPL_BUILD + default y config DM_GPIO - default y if DM && !SPL_BUILD + default y if DM config DM_SERIAL - default y if DM && !SPL_BUILD + default y if DM config SYS_MALLOC_F - default y if DM && !SPL_BUILD + default y if DM config SYS_MALLOC_F_LEN - default 0x400 if DM && !SPL_BUILD + default 0x400 if DM endif diff --git a/common/Kconfig b/common/Kconfig index 2ca002de27..f82bc88a12 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1,5 +1,4 @@ menu "Command line interface" - depends on !SPL_BUILD config HUSH_PARSER bool "Use hush shell" diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index f0d611007a..75d182d27f 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -1,6 +1,5 @@ config DM bool "Enable Driver Model" - depends on !SPL_BUILD help This config option enables Driver Model. This brings in the core support, including scanning of platform data on start-up. If @@ -22,31 +21,28 @@ config SPL_DM config DM_WARN bool "Enable warnings in driver model" + depends on DM + default y help The dm_warn() function can use up quite a bit of space for its strings. By default this is disabled for SPL builds to save space. This will cause dm_warn() to be compiled out - it will do nothing when called. - depends on DM - default y if !SPL_BUILD - default n if SPL_BUILD config DM_DEVICE_REMOVE bool "Support device removal" + depends on DM + default y help We can save some code space by dropping support for removing a device. This is not normally required in SPL, so by default this option is disabled for SPL. - depends on DM - default y if !SPL_BUILD - default n if SPL_BUILD config DM_STDIO bool "Support stdio registration" + depends on DM + default y help Normally serial drivers register with stdio so that they can be used as normal output devices. In SPL we don't normally use stdio, so we can omit this feature. - depends on DM - default y if !SPL_BUILD - default n if SPL_BUILD diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index ccd8211eb2..72825c3e2e 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -6,8 +6,6 @@ config SYS_NAND_SELF_INIT This option, if enabled, provides more flexible and linux-like NAND initialization process. -if !SPL_BUILD - config NAND_DENALI bool "Support Denali NAND controller" select SYS_NAND_SELF_INIT @@ -34,8 +32,6 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES of OOB area before last ECC sector data starts. This is potentially used to preserve the bad block marker in the OOB area. -endif - if SPL config SPL_NAND_DENALI diff --git a/dts/Kconfig b/dts/Kconfig index 5fe63f8025..ca5bd6fb46 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -9,7 +9,6 @@ config SUPPORT_OF_CONTROL bool menu "Device Tree Control" - depends on !SPL_BUILD depends on SUPPORT_OF_CONTROL config OF_CONTROL diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index 9f0fe44443..a9106f4f3b 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -29,5 +29,9 @@ #undef CONFIG_DM_SPI #endif +#undef CONFIG_DM_WARN +#undef CONFIG_DM_DEVICE_REMOVE +#undef CONFIG_DM_STDIO + #endif /* CONFIG_SPL_BUILD */ #endif /* __CONFIG_UNCMD_SPL_H__ */ diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl index 86c938e1f9..343c3fc199 100644 --- a/scripts/Makefile.uncmd_spl +++ b/scripts/Makefile.uncmd_spl @@ -13,4 +13,6 @@ CONFIG_DM_SPI= CONFIG_DM_SPI_FLASH= endif +CONFIG_DM_DEVICE_REMOVE= + endif From 41fbbbbc71161e0c0479d7c6c5598e760d70f624 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 11:45:05 +0900 Subject: [PATCH 212/222] ARM: remove jadecpu board support This is still a non-generic board. Signed-off-by: Masahiro Yamada Cc: Matthias Weisser Acked-by: Marek Vasut --- arch/arm/Kconfig | 5 - arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/cpu/arm926ejs/mb86r0x/Makefile | 8 - arch/arm/cpu/arm926ejs/mb86r0x/clock.c | 27 - arch/arm/cpu/arm926ejs/mb86r0x/reset.c | 24 - arch/arm/cpu/arm926ejs/mb86r0x/timer.c | 115 ---- arch/arm/include/asm/arch-mb86r0x/hardware.h | 15 - arch/arm/include/asm/arch-mb86r0x/mb86r0x.h | 599 ------------------- arch/arm/lib/asm-offsets.c | 46 -- board/syteco/jadecpu/Kconfig | 15 - board/syteco/jadecpu/MAINTAINERS | 6 - board/syteco/jadecpu/Makefile | 13 - board/syteco/jadecpu/jadecpu.c | 160 ----- board/syteco/jadecpu/lowlevel_init.S | 249 -------- configs/jadecpu_defconfig | 2 - doc/README.scrapyard | 35 +- drivers/video/Makefile | 1 - drivers/video/mb86r0xgdc.c | 168 ------ include/configs/jadecpu.h | 273 --------- include/serial.h | 2 +- 20 files changed, 19 insertions(+), 1745 deletions(-) delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/Makefile delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/clock.c delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/reset.c delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/timer.c delete mode 100644 arch/arm/include/asm/arch-mb86r0x/hardware.h delete mode 100644 arch/arm/include/asm/arch-mb86r0x/mb86r0x.h delete mode 100644 board/syteco/jadecpu/Kconfig delete mode 100644 board/syteco/jadecpu/MAINTAINERS delete mode 100644 board/syteco/jadecpu/Makefile delete mode 100644 board/syteco/jadecpu/jadecpu.c delete mode 100644 board/syteco/jadecpu/lowlevel_init.S delete mode 100644 configs/jadecpu_defconfig delete mode 100644 drivers/video/mb86r0xgdc.c delete mode 100644 include/configs/jadecpu.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 34083192b6..089bef22e8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -144,10 +144,6 @@ config TARGET_DEVKIT3250 bool "Support devkit3250" select CPU_ARM926EJS -config TARGET_JADECPU - bool "Support jadecpu" - select CPU_ARM926EJS - config TARGET_MX25PDK bool "Support mx25pdk" select CPU_ARM926EJS @@ -852,7 +848,6 @@ source "board/st-ericsson/snowball/Kconfig" source "board/st-ericsson/u8500/Kconfig" source "board/st/stv0991/Kconfig" source "board/sunxi/Kconfig" -source "board/syteco/jadecpu/Kconfig" source "board/syteco/zmx25/Kconfig" source "board/tbs/tbs2910/Kconfig" source "board/ti/am335x/Kconfig" diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index f5944cc965..ac23116955 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -16,7 +16,6 @@ endif obj-$(CONFIG_ARMADA100) += armada100/ obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/ -obj-$(CONFIG_MB86R0x) += mb86r0x/ obj-$(CONFIG_MX25) += mx25/ obj-$(CONFIG_MX27) += mx27/ obj-$(if $(filter mxs,$(SOC)),y) += mxs/ diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/Makefile b/arch/arm/cpu/arm926ejs/mb86r0x/Makefile deleted file mode 100644 index 365892c413..0000000000 --- a/arch/arm/cpu/arm926ejs/mb86r0x/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = clock.o reset.o timer.o diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/clock.c b/arch/arm/cpu/arm926ejs/mb86r0x/clock.c deleted file mode 100644 index 1f6f66eba2..0000000000 --- a/arch/arm/cpu/arm926ejs/mb86r0x/clock.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * (C) Copyright 2010 - * Matthias Weisser - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -/* - * Get the peripheral bus frequency depending on pll pin settings - */ -ulong get_bus_freq(ulong dummy) -{ - struct mb86r0x_crg * crg = (struct mb86r0x_crg *) - MB86R0x_CRG_BASE; - uint32_t pllmode; - - pllmode = readl(&crg->crpr) & MB86R0x_CRG_CRPR_PLLMODE; - - if (pllmode == MB86R0x_CRG_CRPR_PLLMODE_X20) - return 40000000; - - return 41164767; -} diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/reset.c b/arch/arm/cpu/arm926ejs/mb86r0x/reset.c deleted file mode 100644 index 7bd77ff202..0000000000 --- a/arch/arm/cpu/arm926ejs/mb86r0x/reset.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * (C) Copyright 2010 - * Matthias Weisser - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -/* - * Reset the cpu by setting software reset request bit - */ -void reset_cpu(ulong ignored) -{ - struct mb86r0x_crg * crg = (struct mb86r0x_crg *) - MB86R0x_CRG_BASE; - - writel(MB86R0x_CRSR_SWRSTREQ, &crg->crsr); - while (1) - /* NOP */; - /* Never reached */ -} diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c deleted file mode 100644 index bb078196d0..0000000000 --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * (C) Copyright 2010 - * Matthias Weisser, Graf-Syteco - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#define TIMER_LOAD_VAL 0xffffffff -#define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256) - -DECLARE_GLOBAL_DATA_PTR; - -#define timestamp gd->arch.tbl -#define lastdec gd->arch.lastinc - -static inline unsigned long long tick_to_time(unsigned long long tick) -{ - tick *= CONFIG_SYS_HZ; - do_div(tick, TIMER_FREQ); - - return tick; -} - -static inline unsigned long long usec_to_tick(unsigned long long usec) -{ - usec *= TIMER_FREQ; - do_div(usec, 1000000); - - return usec; -} - -/* nothing really to do with interrupts, just starts up a counter. */ -int timer_init(void) -{ - struct mb86r0x_timer * timer = (struct mb86r0x_timer *) - MB86R0x_TIMER_BASE; - ulong ctrl = readl(&timer->control); - - writel(TIMER_LOAD_VAL, &timer->load); - - ctrl |= MB86R0x_TIMER_ENABLE | MB86R0x_TIMER_PRS_8S | - MB86R0x_TIMER_SIZE_32; - - writel(ctrl, &timer->control); - - /* capture current value time */ - lastdec = readl(&timer->value); - timestamp = 0; /* start "advancing" time stamp from 0 */ - - return 0; -} - -/* - * timer without interrupts - */ -unsigned long long get_ticks(void) -{ - struct mb86r0x_timer * timer = (struct mb86r0x_timer *) - MB86R0x_TIMER_BASE; - ulong now = readl(&timer->value); - - if (now <= lastdec) { - /* normal mode (non roll) */ - /* move stamp forward with absolut diff ticks */ - timestamp += lastdec - now; - } else { - /* we have rollover of incrementer */ - timestamp += lastdec + TIMER_LOAD_VAL - now; - } - lastdec = now; - return timestamp; -} - -ulong get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - -void __udelay(unsigned long usec) -{ - unsigned long long tmp; - ulong tmo; - - tmo = usec_to_tick(usec); - tmp = get_ticks(); /* get current timestamp */ - - while ((get_ticks() - tmp) < tmo) /* loop till event */ - /*NOP*/; -} - -ulong get_timer(ulong base) -{ - return get_timer_masked() - base; -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - ulong tbclk; - - tbclk = TIMER_FREQ; - return tbclk; -} diff --git a/arch/arm/include/asm/arch-mb86r0x/hardware.h b/arch/arm/include/asm/arch-mb86r0x/hardware.h deleted file mode 100644 index 42a52bc36c..0000000000 --- a/arch/arm/include/asm/arch-mb86r0x/hardware.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * (C) Copyright 2007 - * - * Author : Carsten Schneider, mycable GmbH - * - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include - -#endif diff --git a/arch/arm/include/asm/arch-mb86r0x/mb86r0x.h b/arch/arm/include/asm/arch-mb86r0x/mb86r0x.h deleted file mode 100644 index 7fec9715b1..0000000000 --- a/arch/arm/include/asm/arch-mb86r0x/mb86r0x.h +++ /dev/null @@ -1,599 +0,0 @@ -/* - * (C) Copyright 2007 - * - * mb86r0x definitions - * - * Author : Carsten Schneider, mycable GmbH - * - * - * (C) Copyright 2010 - * Matthias Weisser - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef MB86R0X_H -#define MB86R0X_H - -#ifndef __ASSEMBLY__ - -/* GPIO registers */ -struct mb86r0x_gpio { - uint32_t gpdr0; - uint32_t gpdr1; - uint32_t gpdr2; - uint32_t res; - uint32_t gpddr0; - uint32_t gpddr1; - uint32_t gpddr2; -}; - -/* PWM registers */ -struct mb86r0x_pwm { - uint32_t bcr; - uint32_t tpr; - uint32_t pr; - uint32_t dr; - uint32_t cr; - uint32_t sr; - uint32_t ccr; - uint32_t ir; -}; - -/* The mb86r0x chip control (CCNT) register set. */ -struct mb86r0x_ccnt { - uint32_t ccid; - uint32_t csrst; - uint32_t pad0[2]; - uint32_t cist; - uint32_t cistm; - uint32_t cgpio_ist; - uint32_t cgpio_istm; - uint32_t cgpio_ip; - uint32_t cgpio_im; - uint32_t caxi_bw; - uint32_t caxi_ps; - uint32_t cmux_md; - uint32_t cex_pin_st; - uint32_t cmlb; - uint32_t pad1[1]; - uint32_t cusb; - uint32_t pad2[41]; - uint32_t cbsc; - uint32_t cdcrc; - uint32_t cmsr0; - uint32_t cmsr1; - uint32_t pad3[2]; -}; - -/* The mb86r0x clock reset generator */ -struct mb86r0x_crg { - uint32_t crpr; - uint32_t pad0; - uint32_t crwr; - uint32_t crsr; - uint32_t crda; - uint32_t crdb; - uint32_t crha; - uint32_t crpa; - uint32_t crpb; - uint32_t crhb; - uint32_t cram; -}; - -/* The mb86r0x timer */ -struct mb86r0x_timer { - uint32_t load; - uint32_t value; - uint32_t control; - uint32_t intclr; - uint32_t ris; - uint32_t mis; - uint32_t bgload; -}; - -/* mb86r0x gdc display controller */ -struct mb86r0x_gdc_dsp { - /* Display settings */ - uint32_t dcm0; - uint16_t pad00; - uint16_t htp; - uint16_t hdp; - uint16_t hdb; - uint16_t hsp; - uint8_t hsw; - uint8_t vsw; - uint16_t pad01; - uint16_t vtr; - uint16_t vsp; - uint16_t vdp; - uint16_t wx; - uint16_t wy; - uint16_t ww; - uint16_t wh; - - /* Layer 0 */ - uint32_t l0m; - uint32_t l0oa; - uint32_t l0da; - uint16_t l0dx; - uint16_t l0dy; - - /* Layer 1 */ - uint32_t l1m; - uint32_t cbda0; - uint32_t cbda1; - uint32_t pad02; - - /* Layer 2 */ - uint32_t l2m; - uint32_t l2oa0; - uint32_t l2da0; - uint32_t l2oa1; - uint32_t l2da1; - uint16_t l2dx; - uint16_t l2dy; - - /* Layer 3 */ - uint32_t l3m; - uint32_t l3oa0; - uint32_t l3da0; - uint32_t l3oa1; - uint32_t l3da1; - uint16_t l3dx; - uint16_t l3dy; - - /* Layer 4 */ - uint32_t l4m; - uint32_t l4oa0; - uint32_t l4da0; - uint32_t l4oa1; - uint32_t l4da1; - uint16_t l4dx; - uint16_t l4dy; - - /* Layer 5 */ - uint32_t l5m; - uint32_t l5oa0; - uint32_t l5da0; - uint32_t l5oa1; - uint32_t l5da1; - uint16_t l5dx; - uint16_t l5dy; - - /* Cursor */ - uint16_t cutc; - uint8_t cpm; - uint8_t csize; - uint32_t cuoa0; - uint16_t cux0; - uint16_t cuy0; - uint32_t cuoa1; - uint16_t cux1; - uint16_t cuy1; - - /* Layer blending */ - uint32_t l0bld; - uint32_t pad03; - uint32_t l0tc; - uint16_t l3tc; - uint16_t l2tc; - uint32_t pad04[15]; - - /* Display settings */ - uint32_t dcm1; - uint32_t dcm2; - uint32_t dcm3; - uint32_t pad05; - - /* Layer 0 extended */ - uint32_t l0em; - uint16_t l0wx; - uint16_t l0wy; - uint16_t l0ww; - uint16_t l0wh; - uint32_t pad06; - - /* Layer 1 extended */ - uint32_t l1em; - uint16_t l1wx; - uint16_t l1wy; - uint16_t l1ww; - uint16_t l1wh; - uint32_t pad07; - - /* Layer 2 extended */ - uint32_t l2em; - uint16_t l2wx; - uint16_t l2wy; - uint16_t l2ww; - uint16_t l2wh; - uint32_t pad08; - - /* Layer 3 extended */ - uint32_t l3em; - uint16_t l3wx; - uint16_t l3wy; - uint16_t l3ww; - uint16_t l3wh; - uint32_t pad09; - - /* Layer 4 extended */ - uint32_t l4em; - uint16_t l4wx; - uint16_t l4wy; - uint16_t l4ww; - uint16_t l4wh; - uint32_t pad10; - - /* Layer 5 extended */ - uint32_t l5em; - uint16_t l5wx; - uint16_t l5wy; - uint16_t l5ww; - uint16_t l5wh; - uint32_t pad11; - - /* Multi screen control */ - uint32_t msc; - uint32_t pad12[3]; - uint32_t dls; - uint32_t dbgc; - - /* Layer blending */ - uint32_t l1bld; - uint32_t l2bld; - uint32_t l3bld; - uint32_t l4bld; - uint32_t l5bld; - uint32_t pad13; - - /* Extended transparency control */ - uint32_t l0etc; - uint32_t l1etc; - uint32_t l2etc; - uint32_t l3etc; - uint32_t l4etc; - uint32_t l5etc; - uint32_t pad14[10]; - - /* YUV coefficients */ - uint32_t l1ycr0; - uint32_t l1ycr1; - uint32_t l1ycg0; - uint32_t l1ycg1; - uint32_t l1ycb0; - uint32_t l1ycb1; - uint32_t pad15[130]; - - /* Layer palletes */ - uint32_t l0pal[256]; - uint32_t l1pal[256]; - uint32_t pad16[256]; - uint32_t l2pal[256]; - uint32_t l3pal[256]; - uint32_t pad17[256]; - - /* PWM settings */ - uint32_t vpwmm; - uint16_t vpwms; - uint16_t vpwme; - uint32_t vpwmc; - uint32_t pad18[253]; -}; - -/* mb86r0x gdc capture controller */ -struct mb86r0x_gdc_cap { - uint32_t vcm; - uint32_t csc; - uint32_t vcs; - uint32_t pad01; - - uint32_t cbm; - uint32_t cboa; - uint32_t cbla; - uint16_t cihstr; - uint16_t civstr; - uint16_t cihend; - uint16_t civend; - uint32_t pad02; - - uint32_t chp; - uint32_t cvp; - uint32_t pad03[4]; - - uint32_t clpf; - uint32_t pad04; - uint32_t cmss; - uint32_t cmds; - uint32_t pad05[12]; - - uint32_t rgbhc; - uint32_t rgbhen; - uint32_t rgbven; - uint32_t pad06; - uint32_t rgbs; - uint32_t pad07[11]; - - uint32_t rgbcmy; - uint32_t rgbcmcb; - uint32_t rgbcmcr; - uint32_t rgbcmb; - uint32_t pad08[12 + 1984]; -}; - -/* mb86r0x gdc draw */ -struct mb86r0x_gdc_draw { - uint32_t ys; - uint32_t xs; - uint32_t dxdy; - uint32_t xus; - uint32_t dxudy; - uint32_t xls; - uint32_t dxldy; - uint32_t usn; - uint32_t lsn; - uint32_t pad01[7]; - uint32_t rs; - uint32_t drdx; - uint32_t drdy; - uint32_t gs; - uint32_t dgdx; - uint32_t dgdy; - uint32_t bs; - uint32_t dbdx; - uint32_t dbdy; - uint32_t pad02[7]; - uint32_t zs; - uint32_t dzdx; - uint32_t dzdy; - uint32_t pad03[13]; - uint32_t ss; - uint32_t dsdx; - uint32_t dsdy; - uint32_t ts; - uint32_t dtdx; - uint32_t dtdy; - uint32_t qs; - uint32_t dqdx; - uint32_t dqdy; - uint32_t pad04[23]; - uint32_t lpn; - uint32_t lxs; - uint32_t lxde; - uint32_t lys; - uint32_t lyde; - uint32_t lzs; - uint32_t lzde; - uint32_t pad05[13]; - uint32_t pxdc; - uint32_t pydc; - uint32_t pzdc; - uint32_t pad06[25]; - uint32_t rxs; - uint32_t rys; - uint32_t rsizex; - uint32_t rsizey; - uint32_t pad07[12]; - uint32_t saddr; - uint32_t sstride; - uint32_t srx; - uint32_t sry; - uint32_t daddr; - uint32_t dstride; - uint32_t drx; - uint32_t dry; - uint32_t brsizex; - uint32_t brsizey; - uint32_t tcolor; - uint32_t pad08[93]; - uint32_t blpo; - uint32_t pad09[7]; - uint32_t ctr; - uint32_t ifsr; - uint32_t ifcnt; - uint32_t sst; - uint32_t ds; - uint32_t pst; - uint32_t est; - uint32_t pad10; - uint32_t mdr0; - uint32_t mdr1; - uint32_t mdr2; - uint32_t mdr3; - uint32_t mdr4; - uint32_t pad14[2]; - uint32_t mdr7; - uint32_t fbr; - uint32_t xres; - uint32_t zbr; - uint32_t tbr; - uint32_t pfbr; - uint32_t cxmin; - uint32_t cxmax; - uint32_t cymin; - uint32_t cymax; - uint32_t txs; - uint32_t tis; - uint32_t toa; - uint32_t sho; - uint32_t abr; - uint32_t pad15[2]; - uint32_t fc; - uint32_t bc; - uint32_t alf; - uint32_t blp; - uint32_t pad16; - uint32_t tbc; - uint32_t pad11[42]; - uint32_t lx0dc; - uint32_t ly0dc; - uint32_t lx1dc; - uint32_t ly1dc; - uint32_t pad12[12]; - uint32_t x0dc; - uint32_t y0dc; - uint32_t x1dc; - uint32_t y1dc; - uint32_t x2dc; - uint32_t y2dc; - uint32_t pad13[666]; -}; - -/* mb86r0x gdc geometry engine */ -struct mb86r0x_gdc_geom { - uint32_t gctr; - uint32_t pad00[15]; - uint32_t gmdr0; - uint32_t gmdr1; - uint32_t gmdr2; - uint32_t pad01[237]; - uint32_t dfifog; - uint32_t pad02[767]; -}; - -/* mb86r0x gdc */ -struct mb86r0x_gdc { - uint32_t pad00[2]; - uint32_t lts; - uint32_t pad01; - uint32_t lsta; - uint32_t pad02[3]; - uint32_t ist; - uint32_t imask; - uint32_t pad03[6]; - uint32_t lsa; - uint32_t lco; - uint32_t lreq; - - uint32_t pad04[16*1024 - 19]; - struct mb86r0x_gdc_dsp dsp0; - struct mb86r0x_gdc_dsp dsp1; - uint32_t pad05[4*1024 - 2]; - uint32_t vccc; - uint32_t vcsr; - struct mb86r0x_gdc_cap cap0; - struct mb86r0x_gdc_cap cap1; - uint32_t pad06[4*1024]; - uint32_t texture_base[16*1024]; - struct mb86r0x_gdc_draw draw; - uint32_t pad07[7*1024]; - struct mb86r0x_gdc_geom geom; - uint32_t pad08[7*1024]; -}; - -/* mb86r0x ddr2c */ -struct mb86r0x_ddr2c { - uint16_t dric; - uint16_t dric1; - uint16_t dric2; - uint16_t drca; - uint16_t drcm; - uint16_t drcst1; - uint16_t drcst2; - uint16_t drcr; - uint16_t pad00[8]; - uint16_t drcf; - uint16_t pad01[7]; - uint16_t drasr; - uint16_t pad02[15]; - uint16_t drims; - uint16_t pad03[7]; - uint16_t dros; - uint16_t pad04; - uint16_t dribsodt1; - uint16_t dribsocd; - uint16_t dribsocd2; - uint16_t pad05[3]; - uint16_t droaba; - uint16_t pad06[9]; - uint16_t drobs; - uint16_t pad07[5]; - uint16_t drimr1; - uint16_t drimr2; - uint16_t drimr3; - uint16_t drimr4; - uint16_t droisr1; - uint16_t droisr2; -}; - -/* mb86r0x memc */ -struct mb86r0x_memc { - uint32_t mcfmode[8]; - uint32_t mcftim[8]; - uint32_t mcfarea[8]; -}; - -#endif /* __ASSEMBLY__ */ - -/* - * Physical Address Defines - */ -#define MB86R0x_DDR2_BASE 0xf3000000 -#define MB86R0x_GDC_BASE 0xf1fc0000 -#define MB86R0x_CCNT_BASE 0xfff42000 -#define MB86R0x_CAN0_BASE 0xfff54000 -#define MB86R0x_CAN1_BASE 0xfff55000 -#define MB86R0x_I2C0_BASE 0xfff56000 -#define MB86R0x_I2C1_BASE 0xfff57000 -#define MB86R0x_EHCI_BASE 0xfff80000 -#define MB86R0x_OHCI_BASE 0xfff81000 -#define MB86R0x_IRC1_BASE 0xfffb0000 -#define MB86R0x_MEMC_BASE 0xfffc0000 -#define MB86R0x_TIMER_BASE 0xfffe0000 -#define MB86R0x_UART0_BASE 0xfffe1000 -#define MB86R0x_UART1_BASE 0xfffe2000 -#define MB86R0x_IRCE_BASE 0xfffe4000 -#define MB86R0x_CRG_BASE 0xfffe7000 -#define MB86R0x_IRC0_BASE 0xfffe8000 -#define MB86R0x_GPIO_BASE 0xfffe9000 -#define MB86R0x_PWM0_BASE 0xfff41000 -#define MB86R0x_PWM1_BASE 0xfff41100 - -#define MB86R0x_CRSR_SWRSTREQ (1 << 1) - -/* - * Timer register bits - */ -#define MB86R0x_TIMER_ENABLE (1 << 7) -#define MB86R0x_TIMER_MODE_MSK (1 << 6) -#define MB86R0x_TIMER_MODE_FR (0 << 6) -#define MB86R0x_TIMER_MODE_PD (1 << 6) - -#define MB86R0x_TIMER_INT_EN (1 << 5) -#define MB86R0x_TIMER_PRS_MSK (3 << 2) -#define MB86R0x_TIMER_PRS_4S (1 << 2) -#define MB86R0x_TIMER_PRS_8S (1 << 3) -#define MB86R0x_TIMER_SIZE_32 (1 << 1) -#define MB86R0x_TIMER_ONE_SHT (1 << 0) - -/* - * Clock reset generator bits - */ -#define MB86R0x_CRG_CRPR_PLLRDY (1 << 8) -#define MB86R0x_CRG_CRPR_PLLMODE (0x1f << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X49 (0 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X46 (1 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X37 (2 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X20 (3 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X47 (4 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X44 (5 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X36 (6 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X19 (7 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X39 (8 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X38 (9 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X30 (10 << 0) -#define MB86R0x_CRG_CRPR_PLLMODE_X15 (11 << 0) -/* - * DDR2 controller bits - */ -#define MB86R0x_DDR2_DRCI_DRINI (1 << 15) -#define MB86R0x_DDR2_DRCI_CKEN (1 << 14) -#define MB86R0x_DDR2_DRCI_DRCMD (1 << 0) -#define MB86R0x_DDR2_DRCI_CMD (MB86R0x_DDR2_DRCI_DRINI | \ - MB86R0x_DDR2_DRCI_CKEN | \ - MB86R0x_DDR2_DRCI_DRCMD) -#define MB86R0x_DDR2_DRCI_INIT (MB86R0x_DDR2_DRCI_DRINI | \ - MB86R0x_DDR2_DRCI_CKEN) -#define MB86R0x_DDR2_DRCI_NORMAL MB86R0x_DDR2_DRCI_CKEN -#endif /* MB86R0X_H */ diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index b0c26e5d68..e5bcaea1ae 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -15,9 +15,6 @@ #include #include -#if defined(CONFIG_MB86R0x) -#include -#endif #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) \ || defined(CONFIG_MX51) || defined(CONFIG_MX53) #include @@ -27,8 +24,6 @@ int main(void) { /* * TODO : Check if each entry in this file is really necessary. - * - struct mb86r0x_ddr2 - * - struct mb86r0x_memc * - struct esdramc_regs * - struct max_regs * - struct aips_regs @@ -40,47 +35,6 @@ int main(void) * code. Is it better to define the macros directly in headers? */ -#if defined(CONFIG_MB86R0x) - /* ddr2 controller */ - DEFINE(DDR2_DRIC, offsetof(struct mb86r0x_ddr2c, dric)); - DEFINE(DDR2_DRIC1, offsetof(struct mb86r0x_ddr2c, dric1)); - DEFINE(DDR2_DRIC2, offsetof(struct mb86r0x_ddr2c, dric2)); - DEFINE(DDR2_DRCA, offsetof(struct mb86r0x_ddr2c, drca)); - DEFINE(DDR2_DRCM, offsetof(struct mb86r0x_ddr2c, drcm)); - DEFINE(DDR2_DRCST1, offsetof(struct mb86r0x_ddr2c, drcst1)); - DEFINE(DDR2_DRCST2, offsetof(struct mb86r0x_ddr2c, drcst2)); - DEFINE(DDR2_DRCR, offsetof(struct mb86r0x_ddr2c, drcr)); - DEFINE(DDR2_DRCF, offsetof(struct mb86r0x_ddr2c, drcf)); - DEFINE(DDR2_DRASR, offsetof(struct mb86r0x_ddr2c, drasr)); - DEFINE(DDR2_DRIMS, offsetof(struct mb86r0x_ddr2c, drims)); - DEFINE(DDR2_DROS, offsetof(struct mb86r0x_ddr2c, dros)); - DEFINE(DDR2_DRIBSODT1, offsetof(struct mb86r0x_ddr2c, dribsodt1)); - DEFINE(DDR2_DROABA, offsetof(struct mb86r0x_ddr2c, droaba)); - DEFINE(DDR2_DROBS, offsetof(struct mb86r0x_ddr2c, drobs)); - - /* clock reset generator */ - DEFINE(CRG_CRPR, offsetof(struct mb86r0x_crg, crpr)); - DEFINE(CRG_CRHA, offsetof(struct mb86r0x_crg, crha)); - DEFINE(CRG_CRPA, offsetof(struct mb86r0x_crg, crpa)); - DEFINE(CRG_CRPB, offsetof(struct mb86r0x_crg, crpb)); - DEFINE(CRG_CRHB, offsetof(struct mb86r0x_crg, crhb)); - DEFINE(CRG_CRAM, offsetof(struct mb86r0x_crg, cram)); - - /* chip control module */ - DEFINE(CCNT_CDCRC, offsetof(struct mb86r0x_ccnt, cdcrc)); - - /* external bus interface */ - DEFINE(MEMC_MCFMODE0, offsetof(struct mb86r0x_memc, mcfmode[0])); - DEFINE(MEMC_MCFMODE2, offsetof(struct mb86r0x_memc, mcfmode[2])); - DEFINE(MEMC_MCFMODE4, offsetof(struct mb86r0x_memc, mcfmode[4])); - DEFINE(MEMC_MCFTIM0, offsetof(struct mb86r0x_memc, mcftim[0])); - DEFINE(MEMC_MCFTIM2, offsetof(struct mb86r0x_memc, mcftim[2])); - DEFINE(MEMC_MCFTIM4, offsetof(struct mb86r0x_memc, mcftim[4])); - DEFINE(MEMC_MCFAREA0, offsetof(struct mb86r0x_memc, mcfarea[0])); - DEFINE(MEMC_MCFAREA2, offsetof(struct mb86r0x_memc, mcfarea[2])); - DEFINE(MEMC_MCFAREA4, offsetof(struct mb86r0x_memc, mcfarea[4])); -#endif - #if defined(CONFIG_MX25) /* Clock Control Module */ DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl)); diff --git a/board/syteco/jadecpu/Kconfig b/board/syteco/jadecpu/Kconfig deleted file mode 100644 index 6e9392e21f..0000000000 --- a/board/syteco/jadecpu/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_JADECPU - -config SYS_BOARD - default "jadecpu" - -config SYS_VENDOR - default "syteco" - -config SYS_SOC - default "mb86r0x" - -config SYS_CONFIG_NAME - default "jadecpu" - -endif diff --git a/board/syteco/jadecpu/MAINTAINERS b/board/syteco/jadecpu/MAINTAINERS deleted file mode 100644 index b53e7cad42..0000000000 --- a/board/syteco/jadecpu/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -JADECPU BOARD -M: Matthias Weisser -S: Maintained -F: board/syteco/jadecpu/ -F: include/configs/jadecpu.h -F: configs/jadecpu_defconfig diff --git a/board/syteco/jadecpu/Makefile b/board/syteco/jadecpu/Makefile deleted file mode 100644 index 74264361e5..0000000000 --- a/board/syteco/jadecpu/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# (C) Copyright 2003-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2008 -# Stelian Pop -# Lead Tech Design -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += jadecpu.o -obj-y += lowlevel_init.o diff --git a/board/syteco/jadecpu/jadecpu.c b/board/syteco/jadecpu/jadecpu.c deleted file mode 100644 index 6c60a41e3d..0000000000 --- a/board/syteco/jadecpu/jadecpu.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * (c) 2010 Graf-Syteco, Matthias Weisser - * - * - * (C) Copyright 2007, mycable GmbH - * Carsten Schneider , Alexander Bigga - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - struct mb86r0x_ccnt * ccnt = (struct mb86r0x_ccnt *) - MB86R0x_CCNT_BASE; - - /* We select mode 0 for group 2 and mode 1 for group 4 */ - writel(0x00000010, &ccnt->cmux_md); - - gd->flags = 0; - gd->bd->bi_boot_params = PHYS_SDRAM + PHYS_SDRAM_SIZE - 0x10000; - - icache_enable(); - dcache_enable(); - - return 0; -} - -static void setup_display_power(uint32_t pwr_bit, char *pwm_opts, - unsigned long pwm_base) -{ - struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *) - MB86R0x_GPIO_BASE; - struct mb86r0x_pwm *pwm = (struct mb86r0x_pwm *) pwm_base; - const char *e; - - writel(readl(&gpio->gpdr2) | pwr_bit, &gpio->gpdr2); - - e = getenv(pwm_opts); - if (e != NULL) { - const char *s; - uint32_t freq, init; - - freq = 0; - init = 0; - - s = strchr(e, 'f'); - if (s != NULL) - freq = simple_strtol(s + 2, NULL, 0); - - s = strchr(e, 'i'); - if (s != NULL) - init = simple_strtol(s + 2, NULL, 0); - - if (freq > 0) { - writel(CONFIG_MB86R0x_IOCLK / 1000 / freq, - &pwm->bcr); - writel(1002, &pwm->tpr); - writel(1, &pwm->pr); - writel(init * 10 + 1, &pwm->dr); - writel(1, &pwm->cr); - writel(1, &pwm->sr); - } - } -} - -int board_late_init(void) -{ - struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *) - MB86R0x_GPIO_BASE; - uint32_t in_word; - -#ifdef CONFIG_VIDEO_MB86R0xGDC - /* Check if we have valid display settings and turn on power if so */ - /* Display 0 */ - if (getenv("gs_dsp_0_param") || getenv("videomode")) - setup_display_power((1 << 3), "gs_dsp_0_pwm", - MB86R0x_PWM0_BASE); - - /* The corresponding GPIO is always an output */ - writel(readl(&gpio->gpddr2) | (1 << 3), &gpio->gpddr2); - - /* Display 1 */ - if (getenv("gs_dsp_1_param") || getenv("videomode1")) - setup_display_power((1 << 4), "gs_dsp_1_pwm", - MB86R0x_PWM1_BASE); - - /* The corresponding GPIO is always an output */ - writel(readl(&gpio->gpddr2) | (1 << 4), &gpio->gpddr2); -#endif /* CONFIG_VIDEO_MB86R0xGDC */ - - /* 5V enable */ - writel(readl(&gpio->gpdr1) & ~(1 << 5), &gpio->gpdr1); - writel(readl(&gpio->gpddr1) | (1 << 5), &gpio->gpddr1); - - /* We have special boot options if told by GPIOs */ - in_word = readl(&gpio->gpdr1); - - if ((in_word & 0xC0) == 0xC0) { - setenv("stdin", "serial"); - setenv("stdout", "serial"); - setenv("stderr", "serial"); - setenv("preboot", "run gs_slow_boot"); - } else if ((in_word & 0xC0) != 0) { - setenv("stdout", "vga"); - setenv("preboot", "run gs_slow_boot"); - } else { - setenv("stdin", "serial"); - setenv("stdout", "serial"); - setenv("stderr", "serial"); - if (getenv("gs_devel")) { - setenv("preboot", "run gs_slow_boot"); - } else { - setenv("preboot", "run gs_fast_boot"); - } - } - - return 0; -} - -int misc_init_r(void) -{ - return 0; -} - -/* - * DRAM configuration - */ -int dram_init(void) -{ - /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, - PHYS_SDRAM_SIZE); - - return 0; -} - -void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = gd->ram_size; -} - -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC911X - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); -#endif - return rc; -} diff --git a/board/syteco/jadecpu/lowlevel_init.S b/board/syteco/jadecpu/lowlevel_init.S deleted file mode 100644 index 9568cec9a8..0000000000 --- a/board/syteco/jadecpu/lowlevel_init.S +++ /dev/null @@ -1,249 +0,0 @@ -/* - * Board specific setup info - * - * (C) Copyright 2007, mycable GmbH - * Carsten Schneider , Alexander Bigga - * - * (C) Copyright 2003, ARM Ltd. - * Philippe Robin, - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include - -/* Set up the platform, once the cpu has been initialized */ -.globl lowlevel_init -lowlevel_init: -/* - * Initialize Clock Reset Generator (CRG) - */ - - ldr r0, =MB86R0x_CRG_BASE - - /* Not change the initial value that is set by external pin.*/ -WAIT_PLL: - ldr r2, [r0, #CRG_CRPR] /* Wait for PLLREADY */ - tst r2, #MB86R0x_CRG_CRPR_PLLRDY - beq WAIT_PLL - - /* Set clock gate control */ - ldr r1, =CONFIG_SYS_CRG_CRHA_INIT - str r1, [r0, #CRG_CRHA] - ldr r1, =CONFIG_SYS_CRG_CRPA_INIT - str r1, [r0, #CRG_CRPA] - ldr r1, =CONFIG_SYS_CRG_CRPB_INIT - str r1, [r0, #CRG_CRPB] - ldr r1, =CONFIG_SYS_CRG_CRHB_INIT - str r1, [r0, #CRG_CRHB] - ldr r1, =CONFIG_SYS_CRG_CRAM_INIT - str r1, [r0, #CRG_CRAM] - -/* - * Initialize External Bus Interface - */ - ldr r0, =MB86R0x_MEMC_BASE - - ldr r1, =CONFIG_SYS_MEMC_MCFMODE0_INIT - str r1, [r0, #MEMC_MCFMODE0] - ldr r1, =CONFIG_SYS_MEMC_MCFMODE2_INIT - str r1, [r0, #MEMC_MCFMODE2] - ldr r1, =CONFIG_SYS_MEMC_MCFMODE4_INIT - str r1, [r0, #MEMC_MCFMODE4] - - ldr r1, =CONFIG_SYS_MEMC_MCFTIM0_INIT - str r1, [r0, #MEMC_MCFTIM0] - ldr r1, =CONFIG_SYS_MEMC_MCFTIM2_INIT - str r1, [r0, #MEMC_MCFTIM2] - ldr r1, =CONFIG_SYS_MEMC_MCFTIM4_INIT - str r1, [r0, #MEMC_MCFTIM4] - - ldr r1, =CONFIG_SYS_MEMC_MCFAREA0_INIT - str r1, [r0, #MEMC_MCFAREA0] - ldr r1, =CONFIG_SYS_MEMC_MCFAREA2_INIT - str r1, [r0, #MEMC_MCFAREA2] - ldr r1, =CONFIG_SYS_MEMC_MCFAREA4_INIT - str r1, [r0, #MEMC_MCFAREA4] - -/* - * Initialize DDR2 Controller - */ - - /* Wait for PLL LOCK up time or more */ - wait_timer 20 - - /* - * (2) Initialize DDRIF - */ - ldr r0, =MB86R0x_DDR2_BASE - ldr r1, =CONFIG_SYS_DDR2_DRIMS_INIT - strh r1, [r0, #DDR2_DRIMS] - - /* - * (3) Wait for 20MCKPs(120nsec) or more - */ - wait_timer 20 - - /* - * (4) IRESET/IUSRRST release - */ - ldr r0, =MB86R0x_CCNT_BASE - ldr r1, =CONFIG_SYS_CCNT_CDCRC_INIT_1 - str r1, [r0, #CCNT_CDCRC] - - /* - * (5) Wait for 20MCKPs(120nsec) or more - */ - wait_timer 20 - - /* - * (6) IDLLRST release - */ - ldr r0, =MB86R0x_CCNT_BASE - ldr r1, =CONFIG_SYS_CCNT_CDCRC_INIT_2 - str r1, [r0, #CCNT_CDCRC] - - /* - * (7+8) Wait for 200us(=200000ns) or more (DDR2 Spec) - */ - wait_timer 33536 - - /* - * (9) MCKE ON - */ - ldr r0, =MB86R0x_DDR2_BASE - ldr r1, =CONFIG_SYS_DDR2_DRIC1_INIT - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_DRIC2_INIT - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =CONFIG_SYS_DDR2_DRCA_INIT - strh r1, [r0, #DDR2_DRCA] - ldr r1, =MB86R0x_DDR2_DRCI_INIT - strh r1, [r0, #DDR2_DRIC] - - /* - * (10) Initialize SDRAM - */ - - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - wait_timer 67 /* 400ns wait */ - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_1 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_1 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_2 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_2 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_3 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_3 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_4 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_4 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_5 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_5 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - wait_timer 200 - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_6 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_6 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_7 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_7 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - wait_timer 18 /* 105ns wait */ - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_8 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_8 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - wait_timer 200 /* MRS to OCD: 200clock */ - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_9 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_9 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_10 - strh r1, [r0, #DDR2_DRIC1] - ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_10 - strh r1, [r0, #DDR2_DRIC2] - ldr r1, =MB86R0x_DDR2_DRCI_CMD - strh r1, [r0, #DDR2_DRIC] - - ldr r1, =CONFIG_SYS_DDR2_DRCM_INIT - strh r1, [r0, #DDR2_DRCM] - - ldr r1, =CONFIG_SYS_DDR2_DRCST1_INIT - strh r1, [r0, #DDR2_DRCST1] - - ldr r1, =CONFIG_SYS_DDR2_DRCST2_INIT - strh r1, [r0, #DDR2_DRCST2] - - ldr r1, =CONFIG_SYS_DDR2_DRCR_INIT - strh r1, [r0, #DDR2_DRCR] - - ldr r1, =CONFIG_SYS_DDR2_DRCF_INIT - strh r1, [r0, #DDR2_DRCF] - - ldr r1, =CONFIG_SYS_DDR2_DRASR_INIT - strh r1, [r0, #DDR2_DRASR] - - /* - * (11) ODT setting - */ - ldr r1, =CONFIG_SYS_DDR2_DROBS_INIT - strh r1, [r0, #DDR2_DROBS] - ldr r1, =CONFIG_SYS_DDR2_DROABA_INIT - strh r1, [r0, #DDR2_DROABA] - ldr r1, =CONFIG_SYS_DDR2_DRIBSODT1_INIT - strh r1, [r0, #DDR2_DRIBSODT1] - - /* - * (12) Shift to ODTCONT ON (SDRAM side) and DDR2 usual operation mode - */ - ldr r1, =CONFIG_SYS_DDR2_DROS_INIT - strh r1, [r0, #DDR2_DROS] - ldr r1, =MB86R0x_DDR2_DRCI_NORMAL - strh r1, [r0, #DDR2_DRIC] - - mov pc, lr diff --git a/configs/jadecpu_defconfig b/configs/jadecpu_defconfig deleted file mode 100644 index 4348e0e5df..0000000000 --- a/configs/jadecpu_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_JADECPU=y diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 952ab871c2..0fc6ac7fda 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,23 +12,24 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= -icecube_5200 powerpc mpc5xxx - - Wolfgang Denk -Lite5200 powerpc mpc5xxx - - -cpci5200 powerpc mpc5xxx - - Reinhard Arlt -mecp5200 powerpc mpc5xxx - - Reinhard Arlt -pf5200 powerpc mpc5xxx - - Reinhard Arlt -PM520 powerpc mpc5xxx - - Josef Wagner -Total5200 powerpc mpc5xxx - - -CATcenter powerpc ppc4xx - - -PPChameleonEVB powerpc ppc4xx - - Andrea "llandre" Marson -P2020DS powerpc mpc85xx - - -P2020COME powerpc mpc85xx - - Ira W. Snyder -P2020RDB powerpc mpc85xx - - Poonam Aggrwal -P2010RDB powerpc mpc85xx - - -P1020RDB powerpc mpc85xx - - -P1011RDB powerpc mpc85xx - - -MPC8360EMDS powerpc mpc83xx - - Dave Liu -MPC8360ERDK powerpc mpc83xx - - Anton Vorontsov +jadecpu arm arm926ejs - - Matthias Weisser +icecube_5200 powerpc mpc5xxx 37b608a5 2015-01-23 Wolfgang Denk +Lite5200 powerpc mpc5xxx 37b608a5 2015-01-23 +cpci5200 powerpc mpc5xxx 37b608a5 2015-01-23 Reinhard Arlt +mecp5200 powerpc mpc5xxx 37b608a5 2015-01-23 Reinhard Arlt +pf5200 powerpc mpc5xxx 37b608a5 2015-01-23 Reinhard Arlt +PM520 powerpc mpc5xxx a258e732 2015-01-23 Josef Wagner +Total5200 powerpc mpc5xxx ad734f7d 2015-01-23 +CATcenter powerpc ppc4xx 5344cc1a 2015-01-23 +PPChameleonEVB powerpc ppc4xx 5344cc1a 2015-01-23 Andrea "llandre" Marson +P2020DS powerpc mpc85xx 168dcc6c 2015-01-23 +P2020COME powerpc mpc85xx 89123536 2015-01-23 Ira W. Snyder +P2020RDB powerpc mpc85xx 743d4815 2015-01-23 Poonam Aggrwal +P2010RDB powerpc mpc85xx 743d4815 2015-01-23 +P1020RDB powerpc mpc85xx 743d4815 2015-01-23 +P1011RDB powerpc mpc85xx 743d4815 2015-01-23 +MPC8360EMDS powerpc mpc83xx 8d1e3cb1 2015-01-23 Dave Liu +MPC8360ERDK powerpc mpc83xx 8d1e3cb1 2015-01-23 Anton Vorontsov P3G4 powerpc 74xx_7xx d928664f 2015-01-16 Wolfgang Denk ZUMA powerpc 74xx_7xx d928664f 2015-01-16 Nye Liu ppmc7xx powerpc 74xx_7xx d928664f 2015-01-16 diff --git a/drivers/video/Makefile b/drivers/video/Makefile index af2d47bd75..22a316b536 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -32,7 +32,6 @@ obj-$(CONFIG_VIDEO_IMX25LCDC) += imx25lcdc.o videomodes.o obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o -obj-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o obj-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o diff --git a/drivers/video/mb86r0xgdc.c b/drivers/video/mb86r0xgdc.c deleted file mode 100644 index bb7a7497cc..0000000000 --- a/drivers/video/mb86r0xgdc.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * (C) Copyright 2010 - * Matthias Weisser - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * mb86r0xgdc.c - Graphic interface for Fujitsu MB86R0x integrated graphic - * controller. - */ - -#include - -#include -#include -#include -#include -#include "videomodes.h" - -/* - * 4MB (at the end of system RAM) - */ -#define VIDEO_MEM_SIZE 0x400000 - -#define FB_SYNC_CLK_INV (1<<16) /* pixel clock inverted */ - -/* - * Graphic Device - */ -static GraphicDevice mb86r0x; - -static void dsp_init(struct mb86r0x_gdc_dsp *dsp, char *modestr, - u32 *videomem) -{ - struct ctfb_res_modes var_mode; - u32 dcm1, dcm2, dcm3; - u16 htp, hdp, hdb, hsp, vtr, vsp, vdp; - u8 hsw, vsw; - u32 l2m, l2em, l2oa0, l2da0, l2oa1, l2da1; - u16 l2dx, l2dy, l2wx, l2wy, l2ww, l2wh; - unsigned long div; - int bpp; - - bpp = video_get_params(&var_mode, modestr); - - if (bpp == 0) { - var_mode.xres = 640; - var_mode.yres = 480; - var_mode.pixclock = 39721; /* 25MHz */ - var_mode.left_margin = 48; - var_mode.right_margin = 16; - var_mode.upper_margin = 33; - var_mode.lower_margin = 10; - var_mode.hsync_len = 96; - var_mode.vsync_len = 2; - var_mode.sync = 0; - var_mode.vmode = 0; - bpp = 15; - } - - /* Fill memory with white */ - memset(videomem, 0xFF, var_mode.xres * var_mode.yres * 2); - - mb86r0x.winSizeX = var_mode.xres; - mb86r0x.winSizeY = var_mode.yres; - - /* LCD base clock is ~ 660MHZ. We do calculations in kHz */ - div = 660000 / (1000000000L / var_mode.pixclock); - if (div > 64) - div = 64; - if (0 == div) - div = 1; - - dcm1 = (div - 1) << 8; - dcm2 = 0x00000000; - if (var_mode.sync & FB_SYNC_CLK_INV) - dcm3 = 0x00000100; - else - dcm3 = 0x00000000; - - htp = var_mode.left_margin + var_mode.xres + - var_mode.hsync_len + var_mode.right_margin; - hdp = var_mode.xres; - hdb = var_mode.xres; - hsp = var_mode.xres + var_mode.right_margin; - hsw = var_mode.hsync_len; - - vsw = var_mode.vsync_len; - vtr = var_mode.upper_margin + var_mode.yres + - var_mode.vsync_len + var_mode.lower_margin; - vsp = var_mode.yres + var_mode.lower_margin; - vdp = var_mode.yres; - - l2m = ((var_mode.yres - 1) << (0)) | - (((var_mode.xres * 2) / 64) << (16)) | - ((1) << (31)); - - l2em = (1 << 0) | (1 << 1); - - l2oa0 = mb86r0x.frameAdrs; - l2da0 = mb86r0x.frameAdrs; - l2oa1 = mb86r0x.frameAdrs; - l2da1 = mb86r0x.frameAdrs; - l2dx = 0; - l2dy = 0; - l2wx = 0; - l2wy = 0; - l2ww = var_mode.xres; - l2wh = var_mode.yres - 1; - - writel(dcm1, &dsp->dcm1); - writel(dcm2, &dsp->dcm2); - writel(dcm3, &dsp->dcm3); - - writew(htp, &dsp->htp); - writew(hdp, &dsp->hdp); - writew(hdb, &dsp->hdb); - writew(hsp, &dsp->hsp); - writeb(hsw, &dsp->hsw); - - writeb(vsw, &dsp->vsw); - writew(vtr, &dsp->vtr); - writew(vsp, &dsp->vsp); - writew(vdp, &dsp->vdp); - - writel(l2m, &dsp->l2m); - writel(l2em, &dsp->l2em); - writel(l2oa0, &dsp->l2oa0); - writel(l2da0, &dsp->l2da0); - writel(l2oa1, &dsp->l2oa1); - writel(l2da1, &dsp->l2da1); - writew(l2dx, &dsp->l2dx); - writew(l2dy, &dsp->l2dy); - writew(l2wx, &dsp->l2wx); - writew(l2wy, &dsp->l2wy); - writew(l2ww, &dsp->l2ww); - writew(l2wh, &dsp->l2wh); - - writel(dcm1 | (1 << 18) | (1 << 31), &dsp->dcm1); -} - -void *video_hw_init(void) -{ - struct mb86r0x_gdc *gdc = (struct mb86r0x_gdc *) MB86R0x_GDC_BASE; - GraphicDevice *pGD = &mb86r0x; - char *s; - u32 *vid; - - memset(pGD, 0, sizeof(GraphicDevice)); - - pGD->gdfIndex = GDF_15BIT_555RGB; - pGD->gdfBytesPP = 2; - pGD->memSize = VIDEO_MEM_SIZE; - pGD->frameAdrs = PHYS_SDRAM + PHYS_SDRAM_SIZE - VIDEO_MEM_SIZE; - - vid = (u32 *)pGD->frameAdrs; - - s = getenv("videomode"); - if (s != NULL) - dsp_init(&gdc->dsp0, s, vid); - - s = getenv("videomode1"); - if (s != NULL) - dsp_init(&gdc->dsp1, s, vid); - - return pGD; -} diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h deleted file mode 100644 index 8175621338..0000000000 --- a/include/configs/jadecpu.h +++ /dev/null @@ -1,273 +0,0 @@ -/* - * (C) Copyright 2010 - * Matthias Weisser - * - * Configuation settings for the jadecpu board - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MB86R0x -#define CONFIG_MB86R0x_IOCLK get_bus_freq(0) -#define CONFIG_SYS_TEXT_BASE 0x10000000 - - -#define CONFIG_USE_ARCH_MEMCPY -#define CONFIG_USE_ARCH_MEMSET - -#define MACH_TYPE_JADECPU 2636 - -#define CONFIG_MACH_TYPE MACH_TYPE_JADECPU - -/* - * Environment settings - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "gs_fast_boot=setenv bootdelay 5\0" \ - "gs_slow_boot=setenv bootdelay 10\0" \ - "bootcmd=dcache off; mw.l 0x40000000 0 1024; usb start;" \ - "fatls usb 0; fatload usb 0 0x40000000 jadecpu-init.bin;" \ - "bootelf 0x40000000\0" \ - "" - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_BOARD_LATE_INIT - -/* - * Compressions - */ -#define CONFIG_LZO - -/* - * Hardware drivers - */ - -/* - * Serial - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#define CONFIG_SYS_NS16550_COM1 0xfffe1000 /* UART 0 */ -#define CONFIG_SYS_NS16550_COM2 0xfff50000 /* UART 2 */ -#define CONFIG_SYS_NS16550_COM3 0xfff51000 /* UART 3 */ -#define CONFIG_SYS_NS16550_COM4 0xfff43000 /* UART 4 */ - -#define CONFIG_CONS_INDEX 4 - -/* - * Ethernet - */ -#define CONFIG_SMC911X -#define CONFIG_SMC911X_BASE 0x02000000 -#define CONFIG_SMC911X_16_BIT - -/* - * Video - */ -#define CONFIG_VIDEO -#define CONFIG_VIDEO_MB86R0xGDC -#define CONFIG_SYS_WHITE_ON_BLACK -#define CONFIG_CFB_CONSOLE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE -#define CONFIG_VIDEO_LOGO -#define CONFIG_SPLASH_SCREEN -#define CONFIG_SPLASH_SCREEN_ALIGN -#define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_VIDEO_BMP_GZIP -#define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (800*480 + 256*4 + 10*1024) -#define VIDEO_FB_16BPP_WORD_SWAP -#define VIDEO_KBD_INIT_FCT 0 -#define VIDEO_TSTC_FCT serial_stub_tstc -#define VIDEO_GETC_FCT serial_stub_getc - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 - -/* - * Command line configuration. - */ -#include -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_XIMG - -#define CONFIG_CMD_BMP -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FAT -#define CONFIG_CMD_PING -#define CONFIG_CMD_USB -#define CONFIG_CMD_CACHE - -#define CONFIG_SYS_HUSH_PARSER - -/* USB */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0xFFF81000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mb86r0x" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#define CONFIG_USB_STORAGE -#define CONFIG_DOS_PARTITION - -/* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x40000000 /* Start address of DDRRAM */ -#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_SP_ADDR 0x01008000 - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_FLASH_BASE 0x10000000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE (128 * 1024) - -/* - * CFI FLASH driver setup - */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* ~10x faster */ - -#define CONFIG_SYS_LOAD_ADDR 0x40000000 /* load address */ - -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) - -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_SYS_PROMPT "jade> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 - -#define CONFIG_PREBOOT "" - -#define CONFIG_BOOTDELAY 5 -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "boot in %d s\n", bootdelay -#define CONFIG_AUTOBOOT_DELAY_STR "delaygs" -#define CONFIG_AUTOBOOT_STOP_STR "stopgs" - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (10 << 20) -#define CONFIG_SYS_MEM_TOP_HIDE (4 << 20) - -/* - * Clock reset generator init - */ -#define CONFIG_SYS_CRG_CRHA_INIT 0xffff -#define CONFIG_SYS_CRG_CRPA_INIT 0xffff -#define CONFIG_SYS_CRG_CRPB_INIT 0xfffe -#define CONFIG_SYS_CRG_CRHB_INIT 0xffff -#define CONFIG_SYS_CRG_CRAM_INIT 0xffef - -/* - * Memory controller settings - */ -#define CONFIG_SYS_MEMC_MCFMODE0_INIT 0x00000001 /* 16bit */ -#define CONFIG_SYS_MEMC_MCFMODE2_INIT 0x00000001 /* 16bit */ -#define CONFIG_SYS_MEMC_MCFMODE4_INIT 0x00000021 /* 16bit, Page*/ -#define CONFIG_SYS_MEMC_MCFTIM0_INIT 0x16191008 -#define CONFIG_SYS_MEMC_MCFTIM2_INIT 0x03061008 -#define CONFIG_SYS_MEMC_MCFTIM4_INIT 0x03061804 -#define CONFIG_SYS_MEMC_MCFAREA0_INIT 0x000000c0 /* 0x0c000000 1MB */ -#define CONFIG_SYS_MEMC_MCFAREA2_INIT 0x00000020 /* 0x02000000 1MB */ -#define CONFIG_SYS_MEMC_MCFAREA4_INIT 0x001f0000 /* 0x10000000 32 MB */ - -/* - * DDR2 controller init settings - */ -#define CONFIG_SYS_DDR2_DRIMS_INIT 0x5555 -#define CONFIG_SYS_CCNT_CDCRC_INIT_1 0x00000002 -#define CONFIG_SYS_CCNT_CDCRC_INIT_2 0x00000003 -#define CONFIG_SYS_DDR2_DRIC1_INIT 0x003f -#define CONFIG_SYS_DDR2_DRIC2_INIT 0x0000 -#define CONFIG_SYS_DDR2_DRCA_INIT 0xc124 /* 512Mbit DDR2SDRAM x 2 */ -#define CONFIG_SYS_DDR2_DRCM_INIT 0x0032 -#define CONFIG_SYS_DDR2_DRCST1_INIT 0x3418 -#define CONFIG_SYS_DDR2_DRCST2_INIT 0x6e32 -#define CONFIG_SYS_DDR2_DRCR_INIT 0x0141 -#define CONFIG_SYS_DDR2_DRCF_INIT 0x0002 -#define CONFIG_SYS_DDR2_DRASR_INIT 0x0001 -#define CONFIG_SYS_DDR2_DROBS_INIT 0x0001 -#define CONFIG_SYS_DDR2_DROABA_INIT 0x0103 -#define CONFIG_SYS_DDR2_DRIBSODT1_INIT 0x003F -#define CONFIG_SYS_DDR2_DROS_INIT 0x0001 - -/* - * DRAM init sequence - */ - -/* PALL Command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_1 0x0017 -#define CONFIG_SYS_DDR2_INIT_DRIC2_1 0x0400 - -/* EMR(2) command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_2 0x0006 -#define CONFIG_SYS_DDR2_INIT_DRIC2_2 0x0000 - -/* EMR(3) command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_3 0x0007 -#define CONFIG_SYS_DDR2_INIT_DRIC2_3 0x0000 - -/* EMR(1) command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_4 0x0005 -#define CONFIG_SYS_DDR2_INIT_DRIC2_4 0x0000 - -/* MRS command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_5 0x0004 -#define CONFIG_SYS_DDR2_INIT_DRIC2_5 0x0532 - -/* PALL command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_6 0x0017 -#define CONFIG_SYS_DDR2_INIT_DRIC2_6 0x0400 - -/* REF command 1 */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_7 0x000f -#define CONFIG_SYS_DDR2_INIT_DRIC2_7 0x0000 - -/* MRS command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_8 0x0004 -#define CONFIG_SYS_DDR2_INIT_DRIC2_8 0x0432 - -/* EMR(1) command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_9 0x0005 -#define CONFIG_SYS_DDR2_INIT_DRIC2_9 0x0380 - -/* EMR(1) command */ -#define CONFIG_SYS_DDR2_INIT_DRIC1_10 0x0005 -#define CONFIG_SYS_DDR2_INIT_DRIC2_10 0x0002 - -#endif /* __CONFIG_H */ diff --git a/include/serial.h b/include/serial.h index 66ed12c9c2..3d2e5697f4 100644 --- a/include/serial.h +++ b/include/serial.h @@ -29,7 +29,7 @@ extern struct serial_device *default_serial_console(void); #if defined(CONFIG_405GP) || \ defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \ defined(CONFIG_405EX) || defined(CONFIG_440) || \ - defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \ + defined(CONFIG_MPC5xxx) || \ defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \ defined(CONFIG_TEGRA) || defined(CONFIG_SYS_COREBOOT) || \ From 346cfba4f013c34e1dc16948d1ed89dc8c44c478 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 11:45:06 +0900 Subject: [PATCH 213/222] ARM: remove dkb board support This is still a non-generic board. Signed-off-by: Masahiro Yamada Cc: Lei Wen Acked-by: Marek Vasut --- arch/arm/Kconfig | 5 - arch/arm/cpu/arm926ejs/Makefile | 1 - arch/arm/cpu/arm926ejs/pantheon/Makefile | 9 - arch/arm/cpu/arm926ejs/pantheon/cpu.c | 85 -------- arch/arm/cpu/arm926ejs/pantheon/dram.c | 117 ---------- arch/arm/cpu/arm926ejs/pantheon/timer.c | 201 ------------------ arch/arm/include/asm/arch-pantheon/config.h | 53 ----- arch/arm/include/asm/arch-pantheon/cpu.h | 77 ------- arch/arm/include/asm/arch-pantheon/gpio.h | 0 arch/arm/include/asm/arch-pantheon/mfp.h | 39 ---- arch/arm/include/asm/arch-pantheon/pantheon.h | 38 ---- board/Marvell/dkb/Kconfig | 15 -- board/Marvell/dkb/MAINTAINERS | 6 - board/Marvell/dkb/Makefile | 9 - board/Marvell/dkb/dkb.c | 85 -------- configs/dkb_defconfig | 2 - doc/README.scrapyard | 1 + include/configs/dkb.h | 51 ----- 18 files changed, 1 insertion(+), 793 deletions(-) delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/Makefile delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/cpu.c delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/dram.c delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/timer.c delete mode 100644 arch/arm/include/asm/arch-pantheon/config.h delete mode 100644 arch/arm/include/asm/arch-pantheon/cpu.h delete mode 100644 arch/arm/include/asm/arch-pantheon/gpio.h delete mode 100644 arch/arm/include/asm/arch-pantheon/mfp.h delete mode 100644 arch/arm/include/asm/arch-pantheon/pantheon.h delete mode 100644 board/Marvell/dkb/Kconfig delete mode 100644 board/Marvell/dkb/MAINTAINERS delete mode 100644 board/Marvell/dkb/Makefile delete mode 100644 board/Marvell/dkb/dkb.c delete mode 100644 configs/dkb_defconfig delete mode 100644 include/configs/dkb.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 089bef22e8..0bed390f0d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -223,10 +223,6 @@ config ORION5X bool "Marvell Orion" select CPU_ARM926EJS -config TARGET_DKB - bool "Support dkb" - select CPU_ARM926EJS - config TARGET_SPEAR300 bool "Support spear300" select CPU_ARM926EJS @@ -757,7 +753,6 @@ source "board/BuR/tseries/Kconfig" source "board/CarMediaLab/flea3/Kconfig" source "board/Marvell/aspenite/Kconfig" source "board/Marvell/db-mv784mp-gp/Kconfig" -source "board/Marvell/dkb/Kconfig" source "board/Marvell/gplugd/Kconfig" source "board/altera/socfpga/Kconfig" source "board/armadeus/apf27/Kconfig" diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index ac23116955..63fa159db6 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -19,5 +19,4 @@ obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/ obj-$(CONFIG_MX25) += mx25/ obj-$(CONFIG_MX27) += mx27/ obj-$(if $(filter mxs,$(SOC)),y) += mxs/ -obj-$(CONFIG_PANTHEON) += pantheon/ obj-$(if $(filter spear,$(SOC)),y) += spear/ diff --git a/arch/arm/cpu/arm926ejs/pantheon/Makefile b/arch/arm/cpu/arm926ejs/pantheon/Makefile deleted file mode 100644 index 988341f8fb..0000000000 --- a/arch/arm/cpu/arm926ejs/pantheon/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2011 -# Marvell Semiconductor -# Written-by: Lei Wen -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = cpu.o timer.o dram.o diff --git a/arch/arm/cpu/arm926ejs/pantheon/cpu.c b/arch/arm/cpu/arm926ejs/pantheon/cpu.c deleted file mode 100644 index 4e2a177c0d..0000000000 --- a/arch/arm/cpu/arm926ejs/pantheon/cpu.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#define UARTCLK14745KHZ (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1)) -#define SET_MRVL_ID (1<<8) -#define L2C_RAM_SEL (1<<4) - -int arch_cpu_init(void) -{ - u32 val; - struct panthcpu_registers *cpuregs = - (struct panthcpu_registers*) PANTHEON_CPU_BASE; - - struct panthapb_registers *apbclkres = - (struct panthapb_registers*) PANTHEON_APBC_BASE; - - struct panthmpmu_registers *mpmu = - (struct panthmpmu_registers*) PANTHEON_MPMU_BASE; - - struct panthapmu_registers *apmu = - (struct panthapmu_registers *) PANTHEON_APMU_BASE; - - /* set SEL_MRVL_ID bit in PANTHEON_CPU_CONF register */ - val = readl(&cpuregs->cpu_conf); - val = val | SET_MRVL_ID; - writel(val, &cpuregs->cpu_conf); - - /* Turn on clock gating (PMUM_CCGR) */ - writel(0xFFFFFFFF, &mpmu->ccgr); - - /* Turn on clock gating (PMUM_ACGR) */ - writel(0xFFFFFFFF, &mpmu->acgr); - - /* Turn on uart2 clock */ - writel(UARTCLK14745KHZ, &apbclkres->uart0); - - /* Enable GPIO clock */ - writel(APBC_APBCLK, &apbclkres->gpio); - -#ifdef CONFIG_I2C_MV - /* Enable I2C clock */ - writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apbclkres->twsi); - writel(APBC_FNCLK | APBC_APBCLK, &apbclkres->twsi); -#endif - -#ifdef CONFIG_MV_SDHCI - /* Enable mmc clock */ - writel(APMU_PERI_CLK | APMU_AXI_CLK | APMU_PERI_RST | APMU_AXI_RST, - &apmu->sd1); - writel(APMU_PERI_CLK | APMU_AXI_CLK | APMU_PERI_RST | APMU_AXI_RST, - &apmu->sd3); -#endif - - icache_enable(); - - return 0; -} - -#if defined(CONFIG_DISPLAY_CPUINFO) -int print_cpuinfo(void) -{ - u32 id; - struct panthcpu_registers *cpuregs = - (struct panthcpu_registers*) PANTHEON_CPU_BASE; - - id = readl(&cpuregs->chip_id); - printf("SoC: PANTHEON 88AP%X-%X\n", (id & 0xFFF), (id >> 0x10)); - return 0; -} -#endif - -#ifdef CONFIG_I2C_MV -void i2c_clk_enable(void) -{ -} -#endif diff --git a/arch/arm/cpu/arm926ejs/pantheon/dram.c b/arch/arm/cpu/arm926ejs/pantheon/dram.c deleted file mode 100644 index f77e3d0ab5..0000000000 --- a/arch/arm/cpu/arm926ejs/pantheon/dram.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen , - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Pantheon DRAM controller supports upto 8 banks - * for chip select 0 and 1 - */ - -/* - * DDR Memory Control Registers - * Refer Datasheet 4.4 - */ -struct panthddr_map_registers { - u32 cs; /* Memory Address Map Register -CS */ - u32 pad[3]; -}; - -struct panthddr_registers { - u8 pad[0x100 - 0x000]; - struct panthddr_map_registers mmap[2]; -}; - -/* - * panth_sdram_base - reads SDRAM Base Address Register - */ -u32 panth_sdram_base(int chip_sel) -{ - struct panthddr_registers *ddr_regs = - (struct panthddr_registers *)PANTHEON_DRAM_BASE; - u32 result = 0; - u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs); - - if (!CS_valid) - return 0; - - result = readl(&ddr_regs->mmap[chip_sel].cs) & 0xFF800000; - return result; -} - -/* - * panth_sdram_size - reads SDRAM size - */ -u32 panth_sdram_size(int chip_sel) -{ - struct panthddr_registers *ddr_regs = - (struct panthddr_registers *)PANTHEON_DRAM_BASE; - u32 result = 0; - u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs); - - if (!CS_valid) - return 0; - - result = readl(&ddr_regs->mmap[chip_sel].cs); - result = (result >> 16) & 0xF; - if (result < 0x7) { - printf("Unknown DRAM Size\n"); - return -1; - } else { - return ((0x8 << (result - 0x7)) * 1024 * 1024); - } -} - -#ifndef CONFIG_SYS_BOARD_DRAM_INIT -int dram_init(void) -{ - int i; - - gd->ram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - gd->bd->bi_dram[i].start = panth_sdram_base(i); - gd->bd->bi_dram[i].size = panth_sdram_size(i); - /* - * It is assumed that all memory banks are consecutive - * and without gaps. - * If the gap is found, ram_size will be reported for - * consecutive memory only - */ - if (gd->bd->bi_dram[i].start != gd->ram_size) - break; - - gd->ram_size += gd->bd->bi_dram[i].size; - - } - - for (; i < CONFIG_NR_DRAM_BANKS; i++) { - /* - * If above loop terminated prematurely, we need to set - * remaining banks' start address & size as 0. Otherwise other - * u-boot functions and Linux kernel gets wrong values which - * could result in crash - */ - gd->bd->bi_dram[i].start = 0; - gd->bd->bi_dram[i].size = 0; - } - return 0; -} - -/* - * If this function is not defined here, - * board.c alters dram bank zero configuration defined above. - */ -void dram_init_banksize(void) -{ - dram_init(); -} -#endif /* CONFIG_SYS_BOARD_DRAM_INIT */ diff --git a/arch/arm/cpu/arm926ejs/pantheon/timer.c b/arch/arm/cpu/arm926ejs/pantheon/timer.c deleted file mode 100644 index 6382d3b0cf..0000000000 --- a/arch/arm/cpu/arm926ejs/pantheon/timer.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -/* - * Timer registers - * Refer 6.2.9 in Datasheet - */ -struct panthtmr_registers { - u32 clk_ctrl; /* Timer clk control reg */ - u32 match[9]; /* Timer match registers */ - u32 count[3]; /* Timer count registers */ - u32 status[3]; - u32 ie[3]; - u32 preload[3]; /* Timer preload value */ - u32 preload_ctrl[3]; - u32 wdt_match_en; - u32 wdt_match_r; - u32 wdt_val; - u32 wdt_sts; - u32 icr[3]; - u32 wdt_icr; - u32 cer; /* Timer count enable reg */ - u32 cmr; - u32 ilr[3]; - u32 wcr; - u32 wfar; - u32 wsar; - u32 cvwr[3]; -}; - -#define TIMER 0 /* Use TIMER 0 */ -/* Each timer has 3 match registers */ -#define MATCH_CMP(x) ((3 * TIMER) + x) -#define TIMER_LOAD_VAL 0xffffffff -#define COUNT_RD_REQ 0x1 - -DECLARE_GLOBAL_DATA_PTR; -/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */ - -/* - * For preventing risk of instability in reading counter value, - * first set read request to register cvwr and then read same - * register after it captures counter value. - */ -ulong read_timer(void) -{ - struct panthtmr_registers *panthtimers = - (struct panthtmr_registers *) PANTHEON_TIMER_BASE; - volatile int loop=100; - ulong val; - - writel(COUNT_RD_REQ, &panthtimers->cvwr); - while (loop--) - val = readl(&panthtimers->cvwr); - - /* - * This stop gcc complain and prevent loop mistake init to 0 - */ - val = readl(&panthtimers->cvwr); - - return val; -} - -ulong get_timer_masked(void) -{ - ulong now = read_timer(); - - if (now >= gd->arch.tbl) { - /* normal mode */ - gd->arch.tbu += now - gd->arch.tbl; - } else { - /* we have an overflow ... */ - gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl; - } - gd->arch.tbl = now; - - return gd->arch.tbu; -} - -ulong get_timer(ulong base) -{ - return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) - - base); -} - -void __udelay(unsigned long usec) -{ - ulong delayticks; - ulong endtime; - - delayticks = (usec * (CONFIG_SYS_HZ_CLOCK / 1000000)); - endtime = get_timer_masked() + delayticks; - - while (get_timer_masked() < endtime) - ; -} - -/* - * init the Timer - */ -int timer_init(void) -{ - struct panthapb_registers *apb1clkres = - (struct panthapb_registers *) PANTHEON_APBC_BASE; - struct panthtmr_registers *panthtimers = - (struct panthtmr_registers *) PANTHEON_TIMER_BASE; - - /* Enable Timer clock at 3.25 MHZ */ - writel(APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3), &apb1clkres->timers); - - /* load value into timer */ - writel(0x0, &panthtimers->clk_ctrl); - /* Use Timer 0 Match Resiger 0 */ - writel(TIMER_LOAD_VAL, &panthtimers->match[MATCH_CMP(0)]); - /* Preload value is 0 */ - writel(0x0, &panthtimers->preload[TIMER]); - /* Enable match comparator 0 for Timer 0 */ - writel(0x1, &panthtimers->preload_ctrl[TIMER]); - - /* Enable timer 0 */ - writel(0x1, &panthtimers->cer); - /* init the gd->arch.tbu and gd->arch.tbl value */ - gd->arch.tbl = read_timer(); - gd->arch.tbu = 0; - - return 0; -} - -#define MPMU_APRR_WDTR (1<<4) -#define TMR_WFAR 0xbaba /* WDT Register First key */ -#define TMP_WSAR 0xeb10 /* WDT Register Second key */ - -/* - * This function uses internal Watchdog Timer - * based reset mechanism. - * Steps to write watchdog registers (protected access) - * 1. Write key value to TMR_WFAR reg. - * 2. Write key value to TMP_WSAR reg. - * 3. Perform write operation. - */ -void reset_cpu (unsigned long ignored) -{ - struct panthmpmu_registers *mpmu = - (struct panthmpmu_registers *) PANTHEON_MPMU_BASE; - struct panthtmr_registers *panthtimers = - (struct panthtmr_registers *) PANTHEON_WD_TIMER_BASE; - u32 val; - - /* negate hardware reset to the WDT after system reset */ - val = readl(&mpmu->aprr); - val = val | MPMU_APRR_WDTR; - writel(val, &mpmu->aprr); - - /* reset/enable WDT clock */ - writel(APBC_APBCLK, &mpmu->wdtpcr); - - /* clear previous WDT status */ - writel(TMR_WFAR, &panthtimers->wfar); - writel(TMP_WSAR, &panthtimers->wsar); - writel(0, &panthtimers->wdt_sts); - - /* set match counter */ - writel(TMR_WFAR, &panthtimers->wfar); - writel(TMP_WSAR, &panthtimers->wsar); - writel(0xf, &panthtimers->wdt_match_r); - - /* enable WDT reset */ - writel(TMR_WFAR, &panthtimers->wfar); - writel(TMP_WSAR, &panthtimers->wsar); - writel(0x3, &panthtimers->wdt_match_en); - - /*enable functional WDT clock */ - writel(APBC_APBCLK | APBC_FNCLK, &mpmu->wdtpcr); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk (void) -{ - return (ulong)CONFIG_SYS_HZ; -} diff --git a/arch/arm/include/asm/arch-pantheon/config.h b/arch/arm/include/asm/arch-pantheon/config.h deleted file mode 100644 index 1eed7b1d56..0000000000 --- a/arch/arm/include/asm/arch-pantheon/config.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _PANTHEON_CONFIG_H -#define _PANTHEON_CONFIG_H - -#include - -/* default Dcache Line length for pantheon */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -#define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ -#define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */ -#define CONFIG_MARVELL_MFP /* Enable mvmfp driver */ -#define MV_MFPR_BASE PANTHEON_MFPR_BASE -#define MV_UART_CONSOLE_BASE PANTHEON_UART1_BASE -#define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register - represents UART Unit Enable */ -/* - * I2C definition - */ -#ifdef CONFIG_CMD_I2C -#define CONFIG_I2C_MV 1 -#define CONFIG_MV_I2C_REG 0xd4011000 -#define CONFIG_HARD_I2C 1 -#define CONFIG_SYS_I2C_SPEED 0 -#define CONFIG_SYS_I2C_SLAVE 0xfe -#endif - -/* - * MMC definition - */ -#ifdef CONFIG_CMD_MMC -#define CONFIG_CMD_FAT 1 -#define CONFIG_MMC 1 -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_SDHCI 1 -#define CONFIG_MMC_SDHCI_IO_ACCESSORS 1 -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000 -#define CONFIG_MMC_SDMA 1 -#define CONFIG_MV_SDHCI 1 -#define CONFIG_DOS_PARTITION 1 -#define CONFIG_EFI_PARTITION 1 -#define CONFIG_SYS_MMC_NUM 2 -#define CONFIG_SYS_MMC_BASE {0xD4280000, 0xd4281000} -#endif - -#endif /* _PANTHEON_CONFIG_H */ diff --git a/arch/arm/include/asm/arch-pantheon/cpu.h b/arch/arm/include/asm/arch-pantheon/cpu.h deleted file mode 100644 index 3ccdf8a359..0000000000 --- a/arch/arm/include/asm/arch-pantheon/cpu.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _PANTHEON_CPU_H -#define _PANTHEON_CPU_H - -#include -#include - -/* - * Main Power Management (MPMU) Registers - * Refer Register Datasheet 9.1 - */ -struct panthmpmu_registers { - u8 pad0[0x0024]; - u32 ccgr; /*0x0024*/ - u8 pad1[0x0200 - 0x024 - 4]; - u32 wdtpcr; /*0x0200*/ - u8 pad2[0x1020 - 0x200 - 4]; - u32 aprr; /*0x1020*/ - u32 acgr; /*0x1024*/ -}; - -/* - * Application Power Management (APMU) Registers - * Refer Register Datasheet 9.2 - */ -struct panthapmu_registers { - u8 pad0[0x0054]; - u32 sd1; /*0x0054*/ - u8 pad1[0x00e0 - 0x054 - 4]; - u32 sd3; /*0x00e0*/ -}; - -/* - * APB Clock Reset/Control Registers - * Refer Register Datasheet 6.14 - */ -struct panthapb_registers { - u32 uart0; /*0x000*/ - u32 uart1; /*0x004*/ - u32 gpio; /*0x008*/ - u8 pad0[0x02c - 0x08 - 4]; - u32 twsi; /*0x02c*/ - u8 pad1[0x034 - 0x2c - 4]; - u32 timers; /*0x034*/ -}; - -/* - * CPU Interface Registers - * Refer Register Datasheet 4.3 - */ -struct panthcpu_registers { - u32 chip_id; /* Chip Id Reg */ - u32 pad; - u32 cpu_conf; /* CPU Conf Reg */ - u32 pad1; - u32 cpu_sram_spd; /* CPU SRAM Speed Reg */ - u32 pad2; - u32 cpu_l2c_spd; /* CPU L2cache Speed Conf */ - u32 mcb_conf; /* MCB Conf Reg */ - u32 sys_boot_ctl; /* Sytem Boot Control */ -}; - -/* - * Functions - */ -u32 panth_sdram_base(int); -u32 panth_sdram_size(int); -int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks); - -#endif /* _PANTHEON_CPU_H */ diff --git a/arch/arm/include/asm/arch-pantheon/gpio.h b/arch/arm/include/asm/arch-pantheon/gpio.h deleted file mode 100644 index e69de29bb2..0000000000 diff --git a/arch/arm/include/asm/arch-pantheon/mfp.h b/arch/arm/include/asm/arch-pantheon/mfp.h deleted file mode 100644 index 7909d53d46..0000000000 --- a/arch/arm/include/asm/arch-pantheon/mfp.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Based on arch/arm/include/asm/arch-armada100/mfp.h - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __PANTHEON_MFP_H -#define __PANTHEON_MFP_H - -/* - * Frequently used MFP Configuration macros for all PANTHEON family of SoCs - * - * offset, pull,pF, drv,dF, edge,eF ,afn,aF - */ -/* UART2 */ -#define MFP47_UART2_RXD (MFP_REG(0x198) | MFP_AF6 | MFP_DRIVE_MEDIUM) -#define MFP48_UART2_TXD (MFP_REG(0x19c) | MFP_AF6 | MFP_DRIVE_MEDIUM) -#define MFP53_CI2C_SCL (MFP_REG(0x1b0) | MFP_AF2 | MFP_DRIVE_MEDIUM) -#define MFP54_CI2C_SDA (MFP_REG(0x1b4) | MFP_AF2 | MFP_DRIVE_MEDIUM) - -/* More macros can be defined here... */ -#define MFP_MMC1_DAT7 (MFP_REG(0x84) | MFP_AF0 | MFP_DRIVE_MEDIUM) -#define MFP_MMC1_DAT6 (MFP_REG(0x88) | MFP_AF0 | MFP_DRIVE_MEDIUM) -#define MFP_MMC1_DAT5 (MFP_REG(0x8c) | MFP_AF0 | MFP_DRIVE_MEDIUM) -#define MFP_MMC1_DAT4 (MFP_REG(0x90) | MFP_AF0 | MFP_DRIVE_MEDIUM) -#define MFP_MMC1_DAT3 (MFP_REG(0x94) | MFP_AF0 | MFP_DRIVE_FAST) -#define MFP_MMC1_DAT2 (MFP_REG(0x98) | MFP_AF0 | MFP_DRIVE_FAST) -#define MFP_MMC1_DAT1 (MFP_REG(0x9c) | MFP_AF0 | MFP_DRIVE_FAST) -#define MFP_MMC1_DAT0 (MFP_REG(0xa0) | MFP_AF0 | MFP_DRIVE_FAST) -#define MFP_MMC1_CMD (MFP_REG(0xa4) | MFP_AF0 | MFP_DRIVE_FAST) -#define MFP_MMC1_CLK (MFP_REG(0xa8) | MFP_AF0 | MFP_DRIVE_FAST) -#define MFP_MMC1_CD (MFP_REG(0xac) | MFP_AF0 | MFP_DRIVE_MEDIUM) -#define MFP_MMC1_WP (MFP_REG(0xb0) | MFP_AF0 | MFP_DRIVE_MEDIUM) - -#define MFP_PIN_MAX 117 -#endif diff --git a/arch/arm/include/asm/arch-pantheon/pantheon.h b/arch/arm/include/asm/arch-pantheon/pantheon.h deleted file mode 100644 index c3a71bfce4..0000000000 --- a/arch/arm/include/asm/arch-pantheon/pantheon.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _PANTHEON_H -#define _PANTHEON_H - -/* Common APB clock register bit definitions */ -#define APBC_APBCLK (1<<0) /* APB Bus Clock Enable */ -#define APBC_FNCLK (1<<1) /* Functional Clock Enable */ -#define APBC_RST (1<<2) /* Reset Generation */ -/* Functional Clock Selection Mask */ -#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) - -/* Common APMU register bit definitions */ -#define APMU_PERI_CLK (1<<4) /* Peripheral Clock Enable */ -#define APMU_AXI_CLK (1<<3) /* AXI Clock Enable*/ -#define APMU_PERI_RST (1<<1) /* Peripheral Reset */ -#define APMU_AXI_RST (1<<0) /* AXI Reset */ - -/* Register Base Addresses */ -#define PANTHEON_DRAM_BASE 0xB0000000 -#define PANTHEON_TIMER_BASE 0xD4014000 -#define PANTHEON_WD_TIMER_BASE 0xD4080000 -#define PANTHEON_APBC_BASE 0xD4015000 -#define PANTHEON_UART1_BASE 0xD4017000 -#define PANTHEON_UART2_BASE 0xD4018000 -#define PANTHEON_GPIO_BASE 0xD4019000 -#define PANTHEON_MFPR_BASE 0xD401E000 -#define PANTHEON_MPMU_BASE 0xD4050000 -#define PANTHEON_APMU_BASE 0xD4282800 -#define PANTHEON_CPU_BASE 0xD4282C00 - -#endif /* _PANTHEON_H */ diff --git a/board/Marvell/dkb/Kconfig b/board/Marvell/dkb/Kconfig deleted file mode 100644 index f6748941c6..0000000000 --- a/board/Marvell/dkb/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_DKB - -config SYS_BOARD - default "dkb" - -config SYS_VENDOR - default "Marvell" - -config SYS_SOC - default "pantheon" - -config SYS_CONFIG_NAME - default "dkb" - -endif diff --git a/board/Marvell/dkb/MAINTAINERS b/board/Marvell/dkb/MAINTAINERS deleted file mode 100644 index c272b7ae74..0000000000 --- a/board/Marvell/dkb/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -DKB BOARD -M: Lei Wen -S: Maintained -F: board/Marvell/dkb/ -F: include/configs/dkb.h -F: configs/dkb_defconfig diff --git a/board/Marvell/dkb/Makefile b/board/Marvell/dkb/Makefile deleted file mode 100644 index 9d88579120..0000000000 --- a/board/Marvell/dkb/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2011 -# Marvell Semiconductor -# Written-by: Lei Wen -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := dkb.o diff --git a/board/Marvell/dkb/dkb.c b/board/Marvell/dkb/dkb.c deleted file mode 100644 index c0c31259a3..0000000000 --- a/board/Marvell/dkb/dkb.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#ifdef CONFIG_GENERIC_MMC -#include -#endif - -DECLARE_GLOBAL_DATA_PTR; - -int board_early_init_f(void) -{ - u32 mfp_cfg[] = { - /* Enable Console on UART2 */ - MFP47_UART2_RXD, - MFP48_UART2_TXD, - - /* I2C */ - MFP53_CI2C_SCL, - MFP54_CI2C_SDA, - - /* MMC1 */ - MFP_MMC1_DAT7, - MFP_MMC1_DAT6, - MFP_MMC1_DAT5, - MFP_MMC1_DAT4, - MFP_MMC1_DAT3, - MFP_MMC1_DAT2, - MFP_MMC1_DAT1, - MFP_MMC1_DAT0, - MFP_MMC1_CMD, - MFP_MMC1_CLK, - MFP_MMC1_CD, - MFP_MMC1_WP, - - MFP_EOC /*End of configureation*/ - }; - /* configure MFP's */ - mfp_config(mfp_cfg); - - return 0; -} - -int board_init(void) -{ - /* arch number of Board */ - gd->bd->bi_arch_number = MACH_TYPE_TTC_DKB; - /* adress of boot parameters */ - gd->bd->bi_boot_params = panth_sdram_base(0) + 0x100; - return 0; -} - -#ifdef CONFIG_GENERIC_MMC -#define I2C_SLAVE_ADDR 0x34 -#define LDO13_REG 0x28 -#define LDO_V30 0x6 -#define LDO_VOLTAGE(x) ((x & 0x7) << 1) -#define LDO_EN 0x1 -int board_mmc_init(bd_t *bd) -{ - ulong mmc_base_address[CONFIG_SYS_MMC_NUM] = CONFIG_SYS_MMC_BASE; - u8 i, data; - - /* set LDO 13 to 3.0v */ - data = LDO_VOLTAGE(LDO_V30) | LDO_EN; - i2c_write(I2C_SLAVE_ADDR, LDO13_REG, 1, &data, 1); - - for (i = 0; i < CONFIG_SYS_MMC_NUM; i++) { - if (mv_sdh_init(mmc_base_address[i], 0, 0, - SDHCI_QUIRK_32BIT_DMA_ADDR)) - return 1; - } - - return 0; -} -#endif diff --git a/configs/dkb_defconfig b/configs/dkb_defconfig deleted file mode 100644 index 0be9578f4f..0000000000 --- a/configs/dkb_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_DKB=y diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 0fc6ac7fda..d206251d7f 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +dkb arm arm926ejs - - Lei Wen jadecpu arm arm926ejs - - Matthias Weisser icecube_5200 powerpc mpc5xxx 37b608a5 2015-01-23 Wolfgang Denk Lite5200 powerpc mpc5xxx 37b608a5 2015-01-23 diff --git a/include/configs/dkb.h b/include/configs/dkb.h deleted file mode 100644 index 7ffbb14e30..0000000000 --- a/include/configs/dkb.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor - * Written-by: Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_DKB_H -#define __CONFIG_DKB_H - -/* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nMarvell-TTC DKB" - -/* - * High Level Configuration Options - */ -#define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */ -#define CONFIG_PANTHEON 1 /* SOC Family Name */ -#define CONFIG_MACH_TTC_DKB 1 /* Machine type */ -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000) -#define CONFIG_NR_DRAM_BANKS_MAX 2 - -/* - * Commands configuration - */ -#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#include -#define CONFIG_CMD_I2C -#define CONFIG_CMD_MMC -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-common.h" - -#undef CONFIG_ARCH_MISC_INIT - -/* - * Environment variables configurations - */ -#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ -#define CONFIG_ENV_SIZE 0x20000 /* 64k */ - -#endif /* __CONFIG_DKB_H */ From a2f39e830e509cb63aad2c752573d1c871a1d4bf Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 11:45:07 +0900 Subject: [PATCH 214/222] ARM: remove cm4008 and cm41xx board support These are still non-generic boards. Signed-off-by: Masahiro Yamada Cc: Greg Ungerer Acked-by: Marek Vasut --- arch/arm/Kconfig | 10 - arch/arm/cpu/arm920t/Makefile | 1 - arch/arm/cpu/arm920t/ks8695/Makefile | 9 - arch/arm/cpu/arm920t/ks8695/lowlevel_init.S | 189 ---------- arch/arm/cpu/arm920t/ks8695/timer.c | 77 ---- arch/arm/include/asm/arch-ks8695/platform.h | 294 --------------- board/cm4008/Kconfig | 12 - board/cm4008/MAINTAINERS | 6 - board/cm4008/Makefile | 8 - board/cm4008/cm4008.c | 88 ----- board/cm4008/config.mk | 1 - board/cm4008/flash.c | 395 -------------------- board/cm41xx/Kconfig | 12 - board/cm41xx/MAINTAINERS | 6 - board/cm41xx/Makefile | 8 - board/cm41xx/cm41xx.c | 88 ----- board/cm41xx/config.mk | 1 - board/cm41xx/flash.c | 395 -------------------- configs/cm4008_defconfig | 2 - configs/cm41xx_defconfig | 2 - doc/README.scrapyard | 2 + drivers/net/Makefile | 1 - drivers/net/ks8695eth.c | 229 ------------ drivers/serial/Makefile | 1 - drivers/serial/serial.c | 2 - drivers/serial/serial_ks8695.c | 121 ------ include/configs/cm4008.h | 104 ------ include/configs/cm41xx.h | 104 ------ include/netdev.h | 1 - include/serial.h | 1 - 30 files changed, 2 insertions(+), 2168 deletions(-) delete mode 100644 arch/arm/cpu/arm920t/ks8695/Makefile delete mode 100644 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S delete mode 100644 arch/arm/cpu/arm920t/ks8695/timer.c delete mode 100644 arch/arm/include/asm/arch-ks8695/platform.h delete mode 100644 board/cm4008/Kconfig delete mode 100644 board/cm4008/MAINTAINERS delete mode 100644 board/cm4008/Makefile delete mode 100644 board/cm4008/cm4008.c delete mode 100644 board/cm4008/config.mk delete mode 100644 board/cm4008/flash.c delete mode 100644 board/cm41xx/Kconfig delete mode 100644 board/cm41xx/MAINTAINERS delete mode 100644 board/cm41xx/Makefile delete mode 100644 board/cm41xx/cm41xx.c delete mode 100644 board/cm41xx/config.mk delete mode 100644 board/cm41xx/flash.c delete mode 100644 configs/cm4008_defconfig delete mode 100644 configs/cm41xx_defconfig delete mode 100644 drivers/net/ks8695eth.c delete mode 100644 drivers/serial/serial_ks8695.c delete mode 100644 include/configs/cm4008.h delete mode 100644 include/configs/cm41xx.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 0bed390f0d..db31be9217 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -88,14 +88,6 @@ config TARGET_SCB9328 bool "Support scb9328" select CPU_ARM920T -config TARGET_CM4008 - bool "Support cm4008" - select CPU_ARM920T - -config TARGET_CM41XX - bool "Support cm41xx" - select CPU_ARM920T - config TARGET_VCMA9 bool "Support VCMA9" select CPU_ARM920T @@ -769,8 +761,6 @@ source "board/broadcom/bcm28155_ap/Kconfig" source "board/broadcom/bcmcygnus/Kconfig" source "board/broadcom/bcmnsp/Kconfig" source "board/cirrus/edb93xx/Kconfig" -source "board/cm4008/Kconfig" -source "board/cm41xx/Kconfig" source "board/compulab/cm_t335/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/arch/arm/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile index a16838b479..29a350c9a6 100644 --- a/arch/arm/cpu/arm920t/Makefile +++ b/arch/arm/cpu/arm920t/Makefile @@ -13,5 +13,4 @@ obj-$(CONFIG_USE_IRQ) += interrupts.o obj-$(if $(filter a320,$(SOC)),y) += a320/ obj-$(CONFIG_EP93XX) += ep93xx/ obj-$(CONFIG_IMX) += imx/ -obj-$(CONFIG_KS8695) += ks8695/ obj-$(CONFIG_S3C24X0) += s3c24x0/ diff --git a/arch/arm/cpu/arm920t/ks8695/Makefile b/arch/arm/cpu/arm920t/ks8695/Makefile deleted file mode 100644 index 400aa89e99..0000000000 --- a/arch/arm/cpu/arm920t/ks8695/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = lowlevel_init.o -obj-y += timer.o diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S deleted file mode 100644 index a2a07f2f23..0000000000 --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +++ /dev/null @@ -1,189 +0,0 @@ -/* - * lowlevel_init.S - basic hardware initialization for the KS8695 CPU - * - * Copyright (c) 2004-2005, Greg Ungerer - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - -/* - ************************************************************************* - * - * Handy dandy macros - * - ************************************************************************* - */ - -/* Delay a bit */ -.macro DELAY_FOR cycles, reg0 - ldr \reg0, =\cycles - subs \reg0, \reg0, #1 - subne pc, pc, #0xc -.endm - -/* - ************************************************************************* - * - * Some local storage. - * - ************************************************************************* - */ - -/* Should we boot with an interactive console or not */ -.globl serial_console - -/* - ************************************************************************* - * - * Raw hardware initialization code. The important thing is to get - * SDRAM setup and running. We do some other basic things here too, - * like getting the PLL set for high speed, and init the LEDs. - * - ************************************************************************* - */ - -.globl lowlevel_init -lowlevel_init: - -#if DEBUG - /* - * enable UART for early debug trace - */ - ldr r1, =(KS8695_IO_BASE+KS8695_UART_DIVISOR) - mov r2, #((25000000+CONFIG_BAUDRATE/2) / CONFIG_BAUDRATE) - str r2, [r1] - ldr r1, =(KS8695_IO_BASE+KS8695_UART_LINE_CTRL) - mov r2, #KS8695_UART_LINEC_WLEN8 - str r2, [r1] /* 8 data bits, no parity, 1 stop */ - ldr r1, =(KS8695_IO_BASE+KS8695_UART_TX_HOLDING) - mov r2, #0x41 - str r2, [r1] /* write 'A' */ -#endif -#if DEBUG - ldr r1, =(KS8695_IO_BASE+KS8695_UART_TX_HOLDING) - mov r2, #0x42 - str r2, [r1] -#endif - - /* - * remap the memory and flash regions. we want to end up with - * ram from address 0, and flash at 32MB. - */ - ldr r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0) - ldr r2, =0xbfc00040 - str r2, [r1] /* large flash map */ - ldr pc, =(highflash+0x02000000-0x00f00000) /* jump to high flash address */ -highflash: - ldr r2, =0x8fe00040 - str r2, [r1] /* remap flash range */ - - /* - * remap the second select region to the 4MB immediately after - * the first region. This way if you have a larger flash (say 8Mb) - * then you can have it all mapped nicely. Has no effect if you - * only have a 4Mb or smaller flash. - */ - ldr r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL1) - ldr r2, =0x9fe40040 - str r2, [r1] /* remap flash2 region, contiguous */ - ldr r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL) - ldr r2, =0x30000005 - str r2, [r1] /* enable both flash selects */ - -#ifdef CONFIG_CM41xx - /* - * map the second flash chip, using the external IO lines. - */ - ldr r1, =(KS8695_IO_BASE+KS8695_IO_CTRL0) - ldr r2, =0xafe80b6d - str r2, [r1] /* remap io0 region, contiguous */ - ldr r1, =(KS8695_IO_BASE+KS8695_IO_CTRL1) - ldr r2, =0xbfec0b6d - str r2, [r1] /* remap io1 region, contiguous */ - ldr r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL) - ldr r2, =0x30050005 - str r2, [r1] /* enable second flash */ -#endif - - /* - * before relocating, we have to setup RAM timing - */ - ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL0) -#if (PHYS_SDRAM_1_SIZE == 0x02000000) - ldr r2, =0x7fc0000e /* 32MB */ -#else - ldr r2, =0x3fc0000e /* 16MB */ -#endif - str r2, [r1] /* configure sdram bank0 setup */ - ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL1) - mov r2, #0 - str r2, [r1] /* configure sdram bank1 setup */ - - ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_GENERAL) - ldr r2, =0x0000000a - str r2, [r1] /* set RAS/CAS timing */ - - ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_BUFFER) - ldr r2, =0x00030000 - str r2, [r1] /* send NOP command */ - DELAY_FOR 0x100, r0 - ldr r2, =0x00010000 - str r2, [r1] /* send PRECHARGE-ALL */ - DELAY_FOR 0x100, r0 - - ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_REFRESH) - ldr r2, =0x00000020 - str r2, [r1] /* set for fast refresh */ - DELAY_FOR 0x100, r0 - ldr r2, =0x00000190 - str r2, [r1] /* set normal refresh timing */ - - ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_BUFFER) - ldr r2, =0x00020033 - str r2, [r1] /* send mode command */ - DELAY_FOR 0x100, r0 - ldr r2, =0x01f00000 - str r2, [r1] /* enable sdram fifos */ - - /* - * set pll to top speed - */ - ldr r1, =(KS8695_IO_BASE+KS8695_SYSTEN_BUS_CLOCK) - mov r2, #0 - str r2, [r1] /* set pll clock to 166MHz */ - - ldr r1, =(KS8695_IO_BASE+KS8695_SWITCH_CTRL0) - ldr r2, [r1] /* Get switch ctrl0 register */ - and r2, r2, #0x0fc00000 /* Mask out LED control bits */ - orr r2, r2, #0x01800000 /* Set Link/activity/speed actions */ - str r2, [r1] - -#ifdef CONFIG_CM4008 - ldr r1, =(KS8695_IO_BASE+KS8695_GPIO_MODE) - ldr r2, =0x0000fe30 - str r2, [r1] /* enable LED's as outputs */ - ldr r1, =(KS8695_IO_BASE+KS8695_GPIO_DATA) - ldr r2, =0x0000fe20 - str r2, [r1] /* turn on power LED */ -#endif -#if defined(CONFIG_CM4008) || defined(CONFIG_CM41xx) - ldr r2, [r1] /* get current GPIO input data */ - tst r2, #0x8 /* check if "erase" depressed */ - beq nobutton - mov r2, #0 /* be quiet on boot, no console */ - ldr r1, =serial_console - str r2, [r1] -nobutton: -#endif - - add lr, lr, #0x02000000 /* flash is now mapped high */ - add ip, ip, #0x02000000 /* this is a hack */ - mov pc, lr /* all done, return */ - -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/arch/arm/cpu/arm920t/ks8695/timer.c b/arch/arm/cpu/arm920t/ks8695/timer.c deleted file mode 100644 index 23db5572de..0000000000 --- a/arch/arm/cpu/arm920t/ks8695/timer.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * (C) Copyright 2004-2005, Greg Ungerer - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -/* - * Initial timer set constants. Nothing complicated, just set for a 1ms - * tick. - */ -#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1) -#define TIMER_COUNT (TIMER_INTERVAL / 2) -#define TIMER_PULSE TIMER_COUNT - -/* - * Handy KS8695 register access functions. - */ -#define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a))) -#define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v) - -ulong timer_ticks; - -int timer_init (void) -{ - /* Set the hadware timer for 1ms */ - ks8695_write(KS8695_TIMER1, TIMER_COUNT); - ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); - ks8695_write(KS8695_TIMER_CTRL, 0x2); - timer_ticks = 0; - - return 0; -} - -ulong get_timer_masked(void) -{ - /* Check for timer wrap */ - if (ks8695_read(KS8695_INT_STATUS) & KS8695_INTMASK_TIMERINT1) { - /* Clear interrupt condition */ - ks8695_write(KS8695_INT_STATUS, KS8695_INTMASK_TIMERINT1); - timer_ticks++; - } - return timer_ticks; -} - -ulong get_timer(ulong base) -{ - return (get_timer_masked() - base); -} - -void __udelay(ulong usec) -{ - ulong start = get_timer_masked(); - ulong end; - - /* Only 1ms resolution :-( */ - end = usec / 1000; - while (get_timer(start) < end) - ; -} - -void reset_cpu (ulong ignored) -{ - ulong tc; - - /* Set timer0 to watchdog, and let it timeout */ - tc = ks8695_read(KS8695_TIMER_CTRL) & 0x2; - ks8695_write(KS8695_TIMER_CTRL, tc); - ks8695_write(KS8695_TIMER0, ((10 << 8) | 0xff)); - ks8695_write(KS8695_TIMER_CTRL, (tc | 0x1)); - - /* Should only wait here till watchdog resets */ - for (;;) - ; -} diff --git a/arch/arm/include/asm/arch-ks8695/platform.h b/arch/arm/include/asm/arch-ks8695/platform.h deleted file mode 100644 index 02f6049263..0000000000 --- a/arch/arm/include/asm/arch-ks8695/platform.h +++ /dev/null @@ -1,294 +0,0 @@ -/* - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __address_h -#define __address_h 1 - -#define KS8695_SDRAM_START 0x00000000 -#define KS8695_SDRAM_SIZE 0x01000000 -#define KS8695_MEM_SIZE KS8695_SDRAM_SIZE -#define KS8695_MEM_START KS8695_SDRAM_START - -#define KS8695_PCMCIA_IO_BASE 0x03800000 -#define KS8695_PCMCIA_IO_SIZE 0x00040000 - -#define KS8695_IO_BASE 0x03FF0000 -#define KS8695_IO_SIZE 0x00010000 - -#define KS8695_SYSTEN_CONFIG 0x00 -#define KS8695_SYSTEN_BUS_CLOCK 0x04 - -#define KS8695_FLASH_START 0x02800000 -#define KS8695_FLASH_SIZE 0x00400000 - -/*i/o control registers offset difinitions*/ -#define KS8695_IO_CTRL0 0x4000 -#define KS8695_IO_CTRL1 0x4004 -#define KS8695_IO_CTRL2 0x4008 -#define KS8695_IO_CTRL3 0x400C - -/*memory control registers offset difinitions*/ -#define KS8695_MEM_CTRL0 0x4010 -#define KS8695_MEM_CTRL1 0x4014 -#define KS8695_MEM_CTRL2 0x4018 -#define KS8695_MEM_CTRL3 0x401C -#define KS8695_MEM_GENERAL 0x4020 -#define KS8695_SDRAM_CTRL0 0x4030 -#define KS8695_SDRAM_CTRL1 0x4034 -#define KS8695_SDRAM_GENERAL 0x4038 -#define KS8695_SDRAM_BUFFER 0x403C -#define KS8695_SDRAM_REFRESH 0x4040 - -/*WAN control registers offset difinitions*/ -#define KS8695_WAN_DMA_TX 0x6000 -#define KS8695_WAN_DMA_RX 0x6004 -#define KS8695_WAN_DMA_TX_START 0x6008 -#define KS8695_WAN_DMA_RX_START 0x600C -#define KS8695_WAN_TX_LIST 0x6010 -#define KS8695_WAN_RX_LIST 0x6014 -#define KS8695_WAN_MAC_LOW 0x6018 -#define KS8695_WAN_MAC_HIGH 0x601C -#define KS8695_WAN_MAC_ELOW 0x6080 -#define KS8695_WAN_MAC_EHIGH 0x6084 - -/*LAN control registers offset difinitions*/ -#define KS8695_LAN_DMA_TX 0x8000 -#define KS8695_LAN_DMA_RX 0x8004 -#define KS8695_LAN_DMA_TX_START 0x8008 -#define KS8695_LAN_DMA_RX_START 0x800C -#define KS8695_LAN_TX_LIST 0x8010 -#define KS8695_LAN_RX_LIST 0x8014 -#define KS8695_LAN_MAC_LOW 0x8018 -#define KS8695_LAN_MAC_HIGH 0x801C -#define KS8695_LAN_MAC_ELOW 0X8080 -#define KS8695_LAN_MAC_EHIGH 0X8084 - -/*HPNA control registers offset difinitions*/ -#define KS8695_HPNA_DMA_TX 0xA000 -#define KS8695_HPNA_DMA_RX 0xA004 -#define KS8695_HPNA_DMA_TX_START 0xA008 -#define KS8695_HPNA_DMA_RX_START 0xA00C -#define KS8695_HPNA_TX_LIST 0xA010 -#define KS8695_HPNA_RX_LIST 0xA014 -#define KS8695_HPNA_MAC_LOW 0xA018 -#define KS8695_HPNA_MAC_HIGH 0xA01C -#define KS8695_HPNA_MAC_ELOW 0xA080 -#define KS8695_HPNA_MAC_EHIGH 0xA084 - -/*UART control registers offset difinitions*/ -#define KS8695_UART_RX_BUFFER 0xE000 -#define KS8695_UART_TX_HOLDING 0xE004 - -#define KS8695_UART_FIFO_CTRL 0xE008 -#define KS8695_UART_FIFO_TRIG01 0x00 -#define KS8695_UART_FIFO_TRIG04 0x80 -#define KS8695_UART_FIFO_TXRST 0x03 -#define KS8695_UART_FIFO_RXRST 0x02 -#define KS8695_UART_FIFO_FEN 0x01 - -#define KS8695_UART_LINE_CTRL 0xE00C -#define KS8695_UART_LINEC_BRK 0x40 -#define KS8695_UART_LINEC_EPS 0x10 -#define KS8695_UART_LINEC_PEN 0x08 -#define KS8695_UART_LINEC_STP2 0x04 -#define KS8695_UART_LINEC_WLEN8 0x03 -#define KS8695_UART_LINEC_WLEN7 0x02 -#define KS8695_UART_LINEC_WLEN6 0x01 -#define KS8695_UART_LINEC_WLEN5 0x00 - -#define KS8695_UART_MODEM_CTRL 0xE010 -#define KS8695_UART_MODEMC_RTS 0x02 -#define KS8695_UART_MODEMC_DTR 0x01 - -#define KS8695_UART_LINE_STATUS 0xE014 -#define KS8695_UART_LINES_TXFE 0x20 -#define KS8695_UART_LINES_BE 0x10 -#define KS8695_UART_LINES_FE 0x08 -#define KS8695_UART_LINES_PE 0x04 -#define KS8695_UART_LINES_OE 0x02 -#define KS8695_UART_LINES_RXFE 0x01 -#define KS8695_UART_LINES_ANY (KS8695_UART_LINES_OE|KS8695_UART_LINES_BE|KS8695_UART_LINES_PE|KS8695_UART_LINES_FE) - -#define KS8695_UART_MODEM_STATUS 0xE018 -#define KS8695_UART_MODEM_DCD 0x80 -#define KS8695_UART_MODEM_DSR 0x20 -#define KS8695_UART_MODEM_CTS 0x10 -#define KS8695_UART_MODEM_DDCD 0x08 -#define KS8695_UART_MODEM_DDSR 0x02 -#define KS8695_UART_MODEM_DCTS 0x01 -#define UART8695_MODEM_ANY 0xFF - -#define KS8695_UART_DIVISOR 0xE01C -#define KS8695_UART_STATUS 0xE020 - -/*Interrupt controlller registers offset difinitions*/ -#define KS8695_INT_CONTL 0xE200 -#define KS8695_INT_ENABLE 0xE204 -#define KS8695_INT_ENABLE_MODEM 0x0800 -#define KS8695_INT_ENABLE_ERR 0x0400 -#define KS8695_INT_ENABLE_RX 0x0200 -#define KS8695_INT_ENABLE_TX 0x0100 - -#define KS8695_INT_STATUS 0xE208 -#define KS8695_INT_WAN_PRIORITY 0xE20C -#define KS8695_INT_HPNA_PRIORITY 0xE210 -#define KS8695_INT_LAN_PRIORITY 0xE214 -#define KS8695_INT_TIMER_PRIORITY 0xE218 -#define KS8695_INT_UART_PRIORITY 0xE21C -#define KS8695_INT_EXT_PRIORITY 0xE220 -#define KS8695_INT_CHAN_PRIORITY 0xE224 -#define KS8695_INT_BUSERROR_PRO 0xE228 -#define KS8695_INT_MASK_STATUS 0xE22C -#define KS8695_FIQ_PEND_PRIORITY 0xE230 -#define KS8695_IRQ_PEND_PRIORITY 0xE234 - -/*timer registers offset difinitions*/ -#define KS8695_TIMER_CTRL 0xE400 -#define KS8695_TIMER1 0xE404 -#define KS8695_TIMER0 0xE408 -#define KS8695_TIMER1_PCOUNT 0xE40C -#define KS8695_TIMER0_PCOUNT 0xE410 - -/*GPIO registers offset difinitions*/ -#define KS8695_GPIO_MODE 0xE600 -#define KS8695_GPIO_CTRL 0xE604 -#define KS8695_GPIO_DATA 0xE608 - -/*SWITCH registers offset difinitions*/ -#define KS8695_SWITCH_CTRL0 0xE800 -#define KS8695_SWITCH_CTRL1 0xE804 -#define KS8695_SWITCH_PORT1 0xE808 -#define KS8695_SWITCH_PORT2 0xE80C -#define KS8695_SWITCH_PORT3 0xE810 -#define KS8695_SWITCH_PORT4 0xE814 -#define KS8695_SWITCH_PORT5 0xE818 -#define KS8695_SWITCH_AUTO0 0xE81C -#define KS8695_SWITCH_AUTO1 0xE820 -#define KS8695_SWITCH_LUE_CTRL 0xE824 -#define KS8695_SWITCH_LUE_HIGH 0xE828 -#define KS8695_SWITCH_LUE_LOW 0xE82C -#define KS8695_SWITCH_ADVANCED 0xE830 - -#define KS8695_SWITCH_LPPM12 0xE874 -#define KS8695_SWITCH_LPPM34 0xE878 - -/*host communication registers difinitions*/ -#define KS8695_DSCP_HIGH 0xE834 -#define KS8695_DSCP_LOW 0xE838 -#define KS8695_SWITCH_MAC_HIGH 0xE83C -#define KS8695_SWITCH_MAC_LOW 0xE840 - -/*miscellaneours registers difinitions*/ -#define KS8695_MANAGE_COUNTER 0xE844 -#define KS8695_MANAGE_DATA 0xE848 -#define KS8695_LAN12_POWERMAGR 0xE84C -#define KS8695_LAN34_POWERMAGR 0xE850 - -#define KS8695_DEVICE_ID 0xEA00 -#define KS8695_REVISION_ID 0xEA04 - -#define KS8695_MISC_CONTROL 0xEA08 -#define KS8695_WAN_CONTROL 0xEA0C -#define KS8695_WAN_POWERMAGR 0xEA10 -#define KS8695_WAN_PHY_CONTROL 0xEA14 -#define KS8695_WAN_PHY_STATUS 0xEA18 - -/* bus clock definitions*/ -#define KS8695_BUS_CLOCK_125MHZ 0x0 -#define KS8695_BUS_CLOCK_100MHZ 0x1 -#define KS8695_BUS_CLOCK_62MHZ 0x2 -#define KS8695_BUS_CLOCK_50MHZ 0x3 -#define KS8695_BUS_CLOCK_41MHZ 0x4 -#define KS8695_BUS_CLOCK_33MHZ 0x5 -#define KS8695_BUS_CLOCK_31MHZ 0x6 -#define KS8695_BUS_CLOCK_25MHZ 0x7 - -/* ------------------------------------------------------------------------------- - * definations for IRQ - * -------------------------------------------------------------------------------*/ - -#define KS8695_INT_EXT_INT0 2 -#define KS8695_INT_EXT_INT1 3 -#define KS8695_INT_EXT_INT2 4 -#define KS8695_INT_EXT_INT3 5 -#define KS8695_INT_TIMERINT0 6 -#define KS8695_INT_TIMERINT1 7 -#define KS8695_INT_UART_TX 8 -#define KS8695_INT_UART_RX 9 -#define KS8695_INT_UART_LINE_ERR 10 -#define KS8695_INT_UART_MODEMS 11 -#define KS8695_INT_LAN_STOP_RX 12 -#define KS8695_INT_LAN_STOP_TX 13 -#define KS8695_INT_LAN_BUF_RX_STATUS 14 -#define KS8695_INT_LAN_BUF_TX_STATUS 15 -#define KS8695_INT_LAN_RX_STATUS 16 -#define KS8695_INT_LAN_TX_STATUS 17 -#define KS8695_INT_HPAN_STOP_RX 18 -#define KS8695_INT_HPNA_STOP_TX 19 -#define KS8695_INT_HPNA_BUF_RX_STATUS 20 -#define KS8695_INT_HPNA_BUF_TX_STATUS 21 -#define KS8695_INT_HPNA_RX_STATUS 22 -#define KS8695_INT_HPNA_TX_STATUS 23 -#define KS8695_INT_BUS_ERROR 24 -#define KS8695_INT_WAN_STOP_RX 25 -#define KS8695_INT_WAN_STOP_TX 26 -#define KS8695_INT_WAN_BUF_RX_STATUS 27 -#define KS8695_INT_WAN_BUF_TX_STATUS 28 -#define KS8695_INT_WAN_RX_STATUS 29 -#define KS8695_INT_WAN_TX_STATUS 30 - -#define KS8695_INT_UART KS8695_INT_UART_TX - -/* ------------------------------------------------------------------------------- - * Interrupt bit positions - * - * ------------------------------------------------------------------------------- - */ - -#define KS8695_INTMASK_EXT_INT0 ( 1 << KS8695_INT_EXT_INT0 ) -#define KS8695_INTMASK_EXT_INT1 ( 1 << KS8695_INT_EXT_INT1 ) -#define KS8695_INTMASK_EXT_INT2 ( 1 << KS8695_INT_EXT_INT2 ) -#define KS8695_INTMASK_EXT_INT3 ( 1 << KS8695_INT_EXT_INT3 ) -#define KS8695_INTMASK_TIMERINT0 ( 1 << KS8695_INT_TIMERINT0 ) -#define KS8695_INTMASK_TIMERINT1 ( 1 << KS8695_INT_TIMERINT1 ) -#define KS8695_INTMASK_UART_TX ( 1 << KS8695_INT_UART_TX ) -#define KS8695_INTMASK_UART_RX ( 1 << KS8695_INT_UART_RX ) -#define KS8695_INTMASK_UART_LINE_ERR ( 1 << KS8695_INT_UART_LINE_ERR ) -#define KS8695_INTMASK_UART_MODEMS ( 1 << KS8695_INT_UART_MODEMS ) -#define KS8695_INTMASK_LAN_STOP_RX ( 1 << KS8695_INT_LAN_STOP_RX ) -#define KS8695_INTMASK_LAN_STOP_TX ( 1 << KS8695_INT_LAN_STOP_TX ) -#define KS8695_INTMASK_LAN_BUF_RX_STATUS ( 1 << KS8695_INT_LAN_BUF_RX_STATUS ) -#define KS8695_INTMASK_LAN_BUF_TX_STATUS ( 1 << KS8695_INT_LAN_BUF_TX_STATUS ) -#define KS8695_INTMASK_LAN_RX_STATUS ( 1 << KS8695_INT_LAN_RX_STATUS ) -#define KS8695_INTMASK_LAN_TX_STATUS ( 1 << KS8695_INT_LAN_RX_STATUS ) -#define KS8695_INTMASK_HPAN_STOP_RX ( 1 << KS8695_INT_HPAN_STOP_RX ) -#define KS8695_INTMASK_HPNA_STOP_TX ( 1 << KS8695_INT_HPNA_STOP_TX ) -#define KS8695_INTMASK_HPNA_BUF_RX_STATUS ( 1 << KS8695_INT_HPNA_BUF_RX_STATUS ) -#define KS8695_INTMAKS_HPNA_BUF_TX_STATUS ( 1 << KS8695_INT_HPNA_BUF_TX_STATUS -#define KS8695_INTMASK_HPNA_RX_STATUS ( 1 << KS8695_INT_HPNA_RX_STATUS ) -#define KS8695_INTMASK_HPNA_TX_STATUS ( 1 << KS8695_INT_HPNA_TX_STATUS ) -#define KS8695_INTMASK_BUS_ERROR ( 1 << KS8695_INT_BUS_ERROR ) -#define KS8695_INTMASK_WAN_STOP_RX ( 1 << KS8695_INT_WAN_STOP_RX ) -#define KS8695_INTMASK_WAN_STOP_TX ( 1 << KS8695_INT_WAN_STOP_TX ) -#define KS8695_INTMASK_WAN_BUF_RX_STATUS ( 1 << KS8695_INT_WAN_BUF_RX_STATUS ) -#define KS8695_INTMASK_WAN_BUF_TX_STATUS ( 1 << KS8695_INT_WAN_BUF_TX_STATUS ) -#define KS8695_INTMASK_WAN_RX_STATUS ( 1 << KS8695_INT_WAN_RX_STATUS ) -#define KS8695_INTMASK_WAN_TX_STATUS ( 1 << KS8695_INT_WAN_TX_STATUS ) - -#define KS8695_SC_VALID_INT 0xFFFFFFFF -#define MAXIRQNUM 31 - -/* - * Timer definitions - * - * Use timer 1 & 2 - * (both run at 25MHz). - * - */ -#define TICKS_PER_uSEC 25 -#define mSEC_1 1000 -#define mSEC_10 (mSEC_1 * 10) - -#endif - -/* END */ diff --git a/board/cm4008/Kconfig b/board/cm4008/Kconfig deleted file mode 100644 index de87d5bc12..0000000000 --- a/board/cm4008/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_CM4008 - -config SYS_BOARD - default "cm4008" - -config SYS_SOC - default "ks8695" - -config SYS_CONFIG_NAME - default "cm4008" - -endif diff --git a/board/cm4008/MAINTAINERS b/board/cm4008/MAINTAINERS deleted file mode 100644 index 5f08bc3b5c..0000000000 --- a/board/cm4008/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM4008 BOARD -M: Greg Ungerer -S: Maintained -F: board/cm4008/ -F: include/configs/cm4008.h -F: configs/cm4008_defconfig diff --git a/board/cm4008/Makefile b/board/cm4008/Makefile deleted file mode 100644 index 04b152917b..0000000000 --- a/board/cm4008/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm4008.o flash.o diff --git a/board/cm4008/cm4008.c b/board/cm4008/cm4008.c deleted file mode 100644 index 740e16443e..0000000000 --- a/board/cm4008/cm4008.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * (C) Copyright 2005 - * Greg Ungerer, OpenGear Inc, - * - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ - -#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) -#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b) - -/* ------------------------------------------------------------------------- */ - - -/* - * Miscelaneous platform dependent initialisations - */ -int env_flash_cmdline (void) -{ - char *sp = (char *) 0x0201c020; - char *ep; - int len; - - /* Check if "erase" push button is depressed */ - if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) { - printf("### Entering network recovery mode...\n"); - setenv("bootargs", "console=ttyAM0,115200 mem=16M initrd=0x400000,6M root=/dev/ram0"); - setenv("bootcmd", "bootp 0x400000; gofsk 0x400000"); - setenv("bootdelay", "2"); - return 0; - } - - /* Check for flash based kernel boot args to use as default */ - for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++) - ; - - if ((len > 0) && (len <1024)) - setenv("bootargs", sp); - - return 0; -} - -int board_late_init (void) -{ - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return ks8695_eth_initialize(); -} - -int board_init (void) -{ - /* arch number of CM4008 */ - gd->bd->bi_arch_number = 624; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x00000100; - - /* power down all but port 0 on the switch */ - ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005); - ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005); - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return (0); -} diff --git a/board/cm4008/config.mk b/board/cm4008/config.mk deleted file mode 100644 index 0d5923b941..0000000000 --- a/board/cm4008/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x00f00000 diff --git a/board/cm4008/flash.c b/board/cm4008/flash.c deleted file mode 100644 index 8315a57ed9..0000000000 --- a/board/cm4008/flash.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * (C) Copyright 2005 - * Greg Ungerer, OpenGear Inc, greg.ungerer@opengear.com - * - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -#define mb() __asm__ __volatile__ ("" : : : "memory") - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size (unsigned char * addr, flash_info_t * info); -static int write_data (flash_info_t * info, ulong dest, unsigned char data); -static void flash_get_offsets (ulong base, flash_info_t * info); -void inline spin_wheel (void); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); - break; - case 1: - /* ignore for now */ - flash_info[i].flash_id = FLASH_UNKNOWN; - break; - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + (__bss_end - __bss_start), - &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) - return; - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F128J3A: - printf ("28F128J3A\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (unsigned char * addr, flash_info_t * info) -{ - volatile unsigned char value; - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = 0xAA; - addr[0x2AAA] = 0x55; - addr[0x5555] = 0x90; - - mb (); - value = addr[0]; - - switch (value) { - - case (unsigned char)INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = 0xFF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb (); - value = addr[2]; /* device ID */ - - switch (value) { - - case (unsigned char)INTEL_ID_28F640J3A: - info->flash_id += FLASH_28F640J3A; - info->sector_count = 64; - info->size = 0x00800000; - break; /* => 8 MB */ - - case (unsigned char)INTEL_ID_28F128J3A: - info->flash_id += FLASH_28F128J3A; - info->sector_count = 128; - info->size = 0x01000000; - break; /* => 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = 0xFF; /* restore read mode */ - - return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int prot, sect; - ulong type; - int rcode = 0; - ulong start; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) - printf ("- Warning: %d protected sectors will not be erased!\n", prot); - else - printf ("\n"); - - /* Disable interrupts which might cause a timeout here */ - disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - volatile unsigned char *addr; - unsigned char status; - - printf ("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - addr = (volatile unsigned char *) (info->start[sect]); - *addr = 0x50; /* clear status register */ - *addr = 0x20; /* erase setup */ - *addr = 0xD0; /* erase confirm */ - - while (((status = *addr) & 0x80) != 0x80) { - if (get_timer(start) > - CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - *addr = 0xB0; /* suspend erase */ - *addr = 0xFF; /* reset to read mode */ - rcode = 1; - break; - } - } - - *addr = 0x50; /* clear status register cmd */ - *addr = 0xFF; /* resest to read mode */ - - printf (" done\n"); - } - } - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - unsigned char data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) - return 4; - - wp = addr; - port_width = 1; - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, data)) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, data)) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data (info, wp, data)); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t * info, ulong dest, unsigned char data) -{ - volatile unsigned char *addr = (volatile unsigned char *) dest; - ulong status; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf ("not erased at %08lx (%lx)\n", (ulong) addr, - (ulong) * addr); - return (2); - } - /* Disable interrupts which might cause a timeout here */ - disable_interrupts(); - - *addr = 0x40; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & 0x80) != 0x80) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = 0xFF; /* restore read mode */ - return (1); - } - } - - *addr = 0xFF; /* restore read mode */ - - return (0); -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/cm41xx/Kconfig b/board/cm41xx/Kconfig deleted file mode 100644 index 99e675b12d..0000000000 --- a/board/cm41xx/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_CM41XX - -config SYS_BOARD - default "cm41xx" - -config SYS_SOC - default "ks8695" - -config SYS_CONFIG_NAME - default "cm41xx" - -endif diff --git a/board/cm41xx/MAINTAINERS b/board/cm41xx/MAINTAINERS deleted file mode 100644 index f10eeb58f3..0000000000 --- a/board/cm41xx/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM41XX BOARD -#M: - -S: Maintained -F: board/cm41xx/ -F: include/configs/cm41xx.h -F: configs/cm41xx_defconfig diff --git a/board/cm41xx/Makefile b/board/cm41xx/Makefile deleted file mode 100644 index b71ea05566..0000000000 --- a/board/cm41xx/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm41xx.o flash.o diff --git a/board/cm41xx/cm41xx.c b/board/cm41xx/cm41xx.c deleted file mode 100644 index eabad48a3c..0000000000 --- a/board/cm41xx/cm41xx.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * (C) Copyright 2005 - * Greg Ungerer, OpenGear Inc, - * - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ - -#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) -#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b) - -/* ------------------------------------------------------------------------- */ - - -/* - * Miscelaneous platform dependent initialisations - */ -int env_flash_cmdline (void) -{ - char *sp = (char *) 0x0201c020; - char *ep; - int len; - - /* Check if "erase" push button is depressed */ - if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) { - printf("### Entering network recovery mode...\n"); - setenv("bootargs", "console=ttyAM0,115200 mem=32M initrd=0x400000,8M root=/dev/ram0"); - setenv("bootcmd", "bootp 0x400000; gofsk 0x400000"); - setenv("bootdelay", "2"); - return 0; - } - - /* Check for flash based kernel boot args to use as default */ - for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++) - ; - - if ((len > 0) && (len <1024)) - setenv("bootargs", sp); - - return 0; -} - -int board_late_init (void) -{ - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return ks8695_eth_initialize(); -} - -int board_init (void) -{ - /* arch number of CM41xx */ - gd->bd->bi_arch_number = 672; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x00000100; - - /* power down all but port 0 on the switch */ - ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005); - ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005); - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return (0); -} diff --git a/board/cm41xx/config.mk b/board/cm41xx/config.mk deleted file mode 100644 index 0d5923b941..0000000000 --- a/board/cm41xx/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x00f00000 diff --git a/board/cm41xx/flash.c b/board/cm41xx/flash.c deleted file mode 100644 index 8315a57ed9..0000000000 --- a/board/cm41xx/flash.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * (C) Copyright 2005 - * Greg Ungerer, OpenGear Inc, greg.ungerer@opengear.com - * - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -#define mb() __asm__ __volatile__ ("" : : : "memory") - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size (unsigned char * addr, flash_info_t * info); -static int write_data (flash_info_t * info, ulong dest, unsigned char data); -static void flash_get_offsets (ulong base, flash_info_t * info); -void inline spin_wheel (void); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); - break; - case 1: - /* ignore for now */ - flash_info[i].flash_id = FLASH_UNKNOWN; - break; - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + (__bss_end - __bss_start), - &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) - return; - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F128J3A: - printf ("28F128J3A\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (unsigned char * addr, flash_info_t * info) -{ - volatile unsigned char value; - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = 0xAA; - addr[0x2AAA] = 0x55; - addr[0x5555] = 0x90; - - mb (); - value = addr[0]; - - switch (value) { - - case (unsigned char)INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = 0xFF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb (); - value = addr[2]; /* device ID */ - - switch (value) { - - case (unsigned char)INTEL_ID_28F640J3A: - info->flash_id += FLASH_28F640J3A; - info->sector_count = 64; - info->size = 0x00800000; - break; /* => 8 MB */ - - case (unsigned char)INTEL_ID_28F128J3A: - info->flash_id += FLASH_28F128J3A; - info->sector_count = 128; - info->size = 0x01000000; - break; /* => 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = 0xFF; /* restore read mode */ - - return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int prot, sect; - ulong type; - int rcode = 0; - ulong start; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) - printf ("- Warning: %d protected sectors will not be erased!\n", prot); - else - printf ("\n"); - - /* Disable interrupts which might cause a timeout here */ - disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - volatile unsigned char *addr; - unsigned char status; - - printf ("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - addr = (volatile unsigned char *) (info->start[sect]); - *addr = 0x50; /* clear status register */ - *addr = 0x20; /* erase setup */ - *addr = 0xD0; /* erase confirm */ - - while (((status = *addr) & 0x80) != 0x80) { - if (get_timer(start) > - CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - *addr = 0xB0; /* suspend erase */ - *addr = 0xFF; /* reset to read mode */ - rcode = 1; - break; - } - } - - *addr = 0x50; /* clear status register cmd */ - *addr = 0xFF; /* resest to read mode */ - - printf (" done\n"); - } - } - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - unsigned char data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) - return 4; - - wp = addr; - port_width = 1; - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, data)) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, data)) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data (info, wp, data)); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t * info, ulong dest, unsigned char data) -{ - volatile unsigned char *addr = (volatile unsigned char *) dest; - ulong status; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf ("not erased at %08lx (%lx)\n", (ulong) addr, - (ulong) * addr); - return (2); - } - /* Disable interrupts which might cause a timeout here */ - disable_interrupts(); - - *addr = 0x40; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & 0x80) != 0x80) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = 0xFF; /* restore read mode */ - return (1); - } - } - - *addr = 0xFF; /* restore read mode */ - - return (0); -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/configs/cm4008_defconfig b/configs/cm4008_defconfig deleted file mode 100644 index 487589d4a3..0000000000 --- a/configs/cm4008_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_CM4008=y diff --git a/configs/cm41xx_defconfig b/configs/cm41xx_defconfig deleted file mode 100644 index 15e9362397..0000000000 --- a/configs/cm41xx_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_CM41XX=y diff --git a/doc/README.scrapyard b/doc/README.scrapyard index d206251d7f..aa9ed41db5 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,6 +12,8 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +cm4008 arm arm920t - - Greg Ungerer +cm41xx arm arm920t - - dkb arm arm926ejs - - Lei Wen jadecpu arm arm926ejs - - Matthias Weisser icecube_5200 powerpc mpc5xxx 37b608a5 2015-01-23 Wolfgang Denk diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 46c4ac697d..da5e2bc3ab 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -33,7 +33,6 @@ obj-$(CONFIG_FTMAC110) += ftmac110.o obj-$(CONFIG_FTMAC100) += ftmac100.o obj-$(CONFIG_GRETH) += greth.o obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o -obj-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o obj-$(CONFIG_LAN91C96) += lan91c96.o obj-$(CONFIG_MACB) += macb.o diff --git a/drivers/net/ks8695eth.c b/drivers/net/ks8695eth.c deleted file mode 100644 index b4822e9504..0000000000 --- a/drivers/net/ks8695eth.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * ks8695eth.c -- KS8695 ethernet driver - * - * (C) Copyright 2004-2005, Greg Ungerer - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/****************************************************************************/ - -#include -#include -#include -#include -#include - -/****************************************************************************/ - -/* - * Hardware register access to the KS8695 LAN ethernet port - * (well, it is the 4 port switch really). - */ -#define ks8695_read(a) *((volatile unsigned long *) (KS8695_IO_BASE + (a))) -#define ks8695_write(a,v) *((volatile unsigned long *) (KS8695_IO_BASE + (a))) = (v) - -/****************************************************************************/ - -/* - * Define the descriptor in-memory data structures. - */ -struct ks8695_txdesc { - uint32_t owner; - uint32_t ctrl; - uint32_t addr; - uint32_t next; -}; - -struct ks8695_rxdesc { - uint32_t status; - uint32_t ctrl; - uint32_t addr; - uint32_t next; -}; - -/****************************************************************************/ - -/* - * Allocate local data structures to use for receiving and sending - * packets. Just to keep it all nice and simple. - */ - -#define TXDESCS 4 -#define RXDESCS 4 -#define BUFSIZE 2048 - -volatile struct ks8695_txdesc ks8695_tx[TXDESCS] __attribute__((aligned(256))); -volatile struct ks8695_rxdesc ks8695_rx[RXDESCS] __attribute__((aligned(256))); -volatile uint8_t ks8695_bufs[BUFSIZE*(TXDESCS+RXDESCS)] __attribute__((aligned(2048)));; - -/****************************************************************************/ - -/* - * Ideally we want to use the MAC address stored in flash. - * But we do some sanity checks in case they are not present - * first. - */ -unsigned char eth_mac[] = { - 0x00, 0x13, 0xc6, 0x00, 0x00, 0x00 -}; - -void ks8695_getmac(void) -{ - unsigned char *fp; - int i; - - /* Check if flash MAC is valid */ - fp = (unsigned char *) 0x0201c000; - for (i = 0; (i < 6); i++) { - if ((fp[i] != 0) && (fp[i] != 0xff)) - break; - } - - /* If we found a valid looking MAC address then use it */ - if (i < 6) - memcpy(ð_mac[0], fp, 6); -} - -/****************************************************************************/ - -static int ks8695_eth_init(struct eth_device *dev, bd_t *bd) -{ - int i; - - debug ("%s(%d): eth_reset()\n", __FILE__, __LINE__); - - /* Reset the ethernet engines first */ - ks8695_write(KS8695_LAN_DMA_TX, 0x80000000); - ks8695_write(KS8695_LAN_DMA_RX, 0x80000000); - - ks8695_getmac(); - - /* Set MAC address */ - ks8695_write(KS8695_LAN_MAC_LOW, (eth_mac[5] | (eth_mac[4] << 8) | - (eth_mac[3] << 16) | (eth_mac[2] << 24))); - ks8695_write(KS8695_LAN_MAC_HIGH, (eth_mac[1] | (eth_mac[0] << 8))); - - /* Turn the 4 port switch on */ - i = ks8695_read(KS8695_SWITCH_CTRL0); - ks8695_write(KS8695_SWITCH_CTRL0, (i | 0x1)); - /* ks8695_write(KS8695_WAN_CONTROL, 0x3f000066); */ - - /* Initialize descriptor rings */ - for (i = 0; (i < TXDESCS); i++) { - ks8695_tx[i].owner = 0; - ks8695_tx[i].ctrl = 0; - ks8695_tx[i].addr = (uint32_t) &ks8695_bufs[i*BUFSIZE]; - ks8695_tx[i].next = (uint32_t) &ks8695_tx[i+1]; - } - ks8695_tx[TXDESCS-1].ctrl = 0x02000000; - ks8695_tx[TXDESCS-1].next = (uint32_t) &ks8695_tx[0]; - - for (i = 0; (i < RXDESCS); i++) { - ks8695_rx[i].status = 0x80000000; - ks8695_rx[i].ctrl = BUFSIZE - 4; - ks8695_rx[i].addr = (uint32_t) &ks8695_bufs[(i+TXDESCS)*BUFSIZE]; - ks8695_rx[i].next = (uint32_t) &ks8695_rx[i+1]; - } - ks8695_rx[RXDESCS-1].ctrl |= 0x00080000; - ks8695_rx[RXDESCS-1].next = (uint32_t) &ks8695_rx[0]; - - /* The KS8695 is pretty slow reseting the ethernets... */ - udelay(2000000); - - /* Enable the ethernet engine */ - ks8695_write(KS8695_LAN_TX_LIST, (uint32_t) &ks8695_tx[0]); - ks8695_write(KS8695_LAN_RX_LIST, (uint32_t) &ks8695_rx[0]); - ks8695_write(KS8695_LAN_DMA_TX, 0x3); - ks8695_write(KS8695_LAN_DMA_RX, 0x71); - ks8695_write(KS8695_LAN_DMA_RX_START, 0x1); - - printf("KS8695 ETHERNET: %pM\n", eth_mac); - return 0; -} - -/****************************************************************************/ - -static void ks8695_eth_halt(struct eth_device *dev) -{ - debug ("%s(%d): eth_halt()\n", __FILE__, __LINE__); - - /* Reset the ethernet engines */ - ks8695_write(KS8695_LAN_DMA_TX, 0x80000000); - ks8695_write(KS8695_LAN_DMA_RX, 0x80000000); -} - -/****************************************************************************/ - -static int ks8695_eth_recv(struct eth_device *dev) -{ - volatile struct ks8695_rxdesc *dp; - int i, len = 0; - - debug ("%s(%d): eth_rx()\n", __FILE__, __LINE__); - - for (i = 0; (i < RXDESCS); i++) { - dp= &ks8695_rx[i]; - if ((dp->status & 0x80000000) == 0) { - len = (dp->status & 0x7ff) - 4; - NetReceive((void *) dp->addr, len); - dp->status = 0x80000000; - ks8695_write(KS8695_LAN_DMA_RX_START, 0x1); - break; - } - } - - return len; -} - -/****************************************************************************/ - -static int ks8695_eth_send(struct eth_device *dev, void *packet, int len) -{ - volatile struct ks8695_txdesc *dp; - static int next = 0; - - debug ("%s(%d): eth_send(packet=%p,len=%d)\n", __FILE__, __LINE__, - packet, len); - - dp = &ks8695_tx[next]; - memcpy((void *) dp->addr, (void *) packet, len); - - if (len < 64) { - memset((void *) (dp->addr + len), 0, 64-len); - len = 64; - } - - dp->ctrl = len | 0xe0000000; - dp->owner = 0x80000000; - - ks8695_write(KS8695_LAN_DMA_TX, 0x3); - ks8695_write(KS8695_LAN_DMA_TX_START, 0x1); - - if (++next >= TXDESCS) - next = 0; - - return 0; -} - -/****************************************************************************/ - -int ks8695_eth_initialize(void) -{ - struct eth_device *dev; - - dev = malloc(sizeof(*dev)); - if (dev == NULL) - return -1; - memset(dev, 0, sizeof(*dev)); - - dev->iobase = KS8695_IO_BASE + KS8695_LAN_DMA_TX; - dev->init = ks8695_eth_init; - dev->halt = ks8695_eth_halt; - dev->send = ks8695_eth_send; - dev->recv = ks8695_eth_recv; - strcpy(dev->name, "ks8695eth"); - - eth_register(dev); - return 0; -} diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 63b0cbf5da..b385852eee 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_S5P) += serial_s5p.o obj-$(CONFIG_IMX_SERIAL) += serial_imx.o -obj-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o obj-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o obj-$(CONFIG_MXC_UART) += serial_mxc.o obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 95c992a5a3..9f78492298 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -127,7 +127,6 @@ serial_initfunc(evb64260_serial_initialize); serial_initfunc(imx_serial_initialize); serial_initfunc(iop480_serial_initialize); serial_initfunc(jz_serial_initialize); -serial_initfunc(ks8695_serial_initialize); serial_initfunc(leon2_serial_initialize); serial_initfunc(leon3_serial_initialize); serial_initfunc(lh7a40x_serial_initialize); @@ -220,7 +219,6 @@ void serial_initialize(void) imx_serial_initialize(); iop480_serial_initialize(); jz_serial_initialize(); - ks8695_serial_initialize(); leon2_serial_initialize(); leon3_serial_initialize(); lh7a40x_serial_initialize(); diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c deleted file mode 100644 index 13adabd112..0000000000 --- a/drivers/serial/serial_ks8695.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * serial.c -- KS8695 serial driver - * - * (C) Copyright 2004, Greg Ungerer - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#ifndef CONFIG_SERIAL1 -#error "Bad: you didn't configure serial ..." -#endif - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Define the UART hardware register access structure. - */ -struct ks8695uart { - unsigned int RX; /* 0x00 - Receive data (r) */ - unsigned int TX; /* 0x04 - Transmit data (w) */ - unsigned int FCR; /* 0x08 - Fifo Control (r/w) */ - unsigned int LCR; /* 0x0c - Line Control (r/w) */ - unsigned int MCR; /* 0x10 - Modem Control (r/w) */ - unsigned int LSR; /* 0x14 - Line Status (r/w) */ - unsigned int MSR; /* 0x18 - Modem Status (r/w) */ - unsigned int BD; /* 0x1c - Baud Rate (r/w) */ - unsigned int SR; /* 0x20 - Status (r/w) */ -}; - -#define KS8695_UART_ADDR ((void *) (KS8695_IO_BASE + KS8695_UART_RX_BUFFER)) -#define KS8695_UART_CLK 25000000 - - -/* - * Under some circumstances we want to be "quiet" and not issue any - * serial output - though we want u-boot to otherwise work and behave - * the same. By default be noisy. - */ -int serial_console = 1; - - -static void ks8695_serial_setbrg(void) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - - /* Set to global baud rate and 8 data bits, no parity, 1 stop bit*/ - uartp->BD = KS8695_UART_CLK / gd->baudrate; - uartp->LCR = KS8695_UART_LINEC_WLEN8; -} - -static int ks8695_serial_init(void) -{ - serial_console = 1; - serial_setbrg(); - return 0; -} - -static void ks8695_serial_raw_putc(const char c) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - int i; - - for (i = 0; (i < 0x100000); i++) { - if (uartp->LSR & KS8695_UART_LINES_TXFE) - break; - } - - uartp->TX = c; -} - -static void ks8695_serial_putc(const char c) -{ - if (serial_console) { - ks8695_serial_raw_putc(c); - if (c == '\n') - ks8695_serial_raw_putc('\r'); - } -} - -static int ks8695_serial_tstc(void) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - if (serial_console) - return ((uartp->LSR & KS8695_UART_LINES_RXFE) ? 1 : 0); - return 0; -} - -static int ks8695_serial_getc(void) -{ - volatile struct ks8695uart *uartp = KS8695_UART_ADDR; - - while ((uartp->LSR & KS8695_UART_LINES_RXFE) == 0) - ; - return (uartp->RX); -} - -static struct serial_device ks8695_serial_drv = { - .name = "ks8695_serial", - .start = ks8695_serial_init, - .stop = NULL, - .setbrg = ks8695_serial_setbrg, - .putc = ks8695_serial_putc, - .puts = default_serial_puts, - .getc = ks8695_serial_getc, - .tstc = ks8695_serial_tstc, -}; - -void ks8695_serial_initialize(void) -{ - serial_register(&ks8695_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &ks8695_serial_drv; -} diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h deleted file mode 100644 index 1cb54b3225..0000000000 --- a/include/configs/cm4008.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * (C) Copyright 2004 - * Greg Ungerer . - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_KS8695 1 /* it is a KS8695 CPU */ -#define CONFIG_CM4008 1 /* it is an OpenGear CM4008 boad */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_KS8695_SERIAL -#define CONFIG_SERIAL1 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#undef CONFIG_CMD_SAVEENV - - -#define CONFIG_BOOTDELAY 0 -#define CONFIG_BOOTARGS "mem=16M console=ttyAM0,115200" -#define CONFIG_BOOTCOMMAND "gofsk 0x02200000" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */ - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 - -#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */ - -#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ -#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h deleted file mode 100644 index adebd4b7b0..0000000000 --- a/include/configs/cm41xx.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * (C) Copyright 2005 - * Greg Ungerer . - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_KS8695 1 /* it is a KS8695 CPU */ -#define CONFIG_CM41xx 1 /* it is an OpenGear CM41xx boad */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_KS8695_SERIAL -#define CONFIG_SERIAL1 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#undef CONFIG_CMD_SAVEENV - - -#define CONFIG_BOOTDELAY 0 -#define CONFIG_BOOTARGS "mem=32M console=ttyAM0,115200" -#define CONFIG_BOOTCOMMAND "gofsk 0x02200000" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */ - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 - -#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */ - -#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ -#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment */ - -#endif /* __CONFIG_H */ diff --git a/include/netdev.h b/include/netdev.h index daffc1222d..90140bd9bb 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -55,7 +55,6 @@ int ftmac100_initialize(bd_t *bits); int ftmac110_initialize(bd_t *bits); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); -int ks8695_eth_initialize(void); int ks8851_mll_initialize(u8 dev_num, int base_addr); int lan91c96_initialize(u8 dev_num, int base_addr); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); diff --git a/include/serial.h b/include/serial.h index 3d2e5697f4..de40e9406f 100644 --- a/include/serial.h +++ b/include/serial.h @@ -182,7 +182,6 @@ void evb64260_serial_initialize(void); void imx_serial_initialize(void); void iop480_serial_initialize(void); void jz_serial_initialize(void); -void ks8695_serial_initialize(void); void leon2_serial_initialize(void); void leon3_serial_initialize(void); void lh7a40x_serial_initialize(void); From 29fc6f24926e2c9d37dbbc37a2e2df2eced4c678 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 11:45:08 +0900 Subject: [PATCH 215/222] ARM: remove a320evb board support This is still a non-generic board. Signed-off-by: Masahiro Yamada Cc: Po-Yu Chuang Acked-by: Marek Vasut --- arch/arm/Kconfig | 5 - arch/arm/cpu/arm920t/Makefile | 1 - arch/arm/cpu/arm920t/a320/Makefile | 9 -- arch/arm/cpu/arm920t/a320/reset.S | 10 -- arch/arm/cpu/arm920t/a320/timer.c | 118 -------------- arch/arm/include/asm/arch-a320/a320.h | 22 --- board/faraday/a320evb/Kconfig | 15 -- board/faraday/a320evb/MAINTAINERS | 6 - board/faraday/a320evb/Makefile | 9 -- board/faraday/a320evb/a320evb.c | 59 ------- board/faraday/a320evb/lowlevel_init.S | 106 ------------- configs/a320evb_defconfig | 2 - doc/README.scrapyard | 1 + include/configs/a320evb.h | 211 -------------------------- 14 files changed, 1 insertion(+), 573 deletions(-) delete mode 100644 arch/arm/cpu/arm920t/a320/Makefile delete mode 100644 arch/arm/cpu/arm920t/a320/reset.S delete mode 100644 arch/arm/cpu/arm920t/a320/timer.c delete mode 100644 arch/arm/include/asm/arch-a320/a320.h delete mode 100644 board/faraday/a320evb/Kconfig delete mode 100644 board/faraday/a320evb/MAINTAINERS delete mode 100644 board/faraday/a320evb/Makefile delete mode 100644 board/faraday/a320evb/a320evb.c delete mode 100644 board/faraday/a320evb/lowlevel_init.S delete mode 100644 configs/a320evb_defconfig delete mode 100644 include/configs/a320evb.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index db31be9217..f6a17207a9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -73,10 +73,6 @@ config TARGET_INTEGRATORCP_CM920T bool "Support integratorcp_cm920t" select CPU_ARM920T -config TARGET_A320EVB - bool "Support a320evb" - select CPU_ARM920T - config ARCH_AT91 bool "Atmel AT91" @@ -770,7 +766,6 @@ source "board/denx/m28evk/Kconfig" source "board/denx/m53evk/Kconfig" source "board/embest/mx6boards/Kconfig" source "board/esg/ima3-mx53/Kconfig" -source "board/faraday/a320evb/Kconfig" source "board/freescale/ls2085a/Kconfig" source "board/freescale/ls1021aqds/Kconfig" source "board/freescale/ls1021atwr/Kconfig" diff --git a/arch/arm/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile index 29a350c9a6..6582938db0 100644 --- a/arch/arm/cpu/arm920t/Makefile +++ b/arch/arm/cpu/arm920t/Makefile @@ -10,7 +10,6 @@ extra-y = start.o obj-y += cpu.o obj-$(CONFIG_USE_IRQ) += interrupts.o -obj-$(if $(filter a320,$(SOC)),y) += a320/ obj-$(CONFIG_EP93XX) += ep93xx/ obj-$(CONFIG_IMX) += imx/ obj-$(CONFIG_S3C24X0) += s3c24x0/ diff --git a/arch/arm/cpu/arm920t/a320/Makefile b/arch/arm/cpu/arm920t/a320/Makefile deleted file mode 100644 index bbdab588c5..0000000000 --- a/arch/arm/cpu/arm920t/a320/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += reset.o -obj-y += timer.o diff --git a/arch/arm/cpu/arm920t/a320/reset.S b/arch/arm/cpu/arm920t/a320/reset.S deleted file mode 100644 index 81f9dc983f..0000000000 --- a/arch/arm/cpu/arm920t/a320/reset.S +++ /dev/null @@ -1,10 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -.global reset_cpu -reset_cpu: - b reset_cpu diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c deleted file mode 100644 index 1ac5b60129..0000000000 --- a/arch/arm/cpu/arm920t/a320/timer.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -#define TIMER_CLOCK 32768 -#define TIMER_LOAD_VAL 0xffffffff - -static inline unsigned long long tick_to_time(unsigned long long tick) -{ - tick *= CONFIG_SYS_HZ; - do_div(tick, gd->arch.timer_rate_hz); - - return tick; -} - -static inline unsigned long long usec_to_tick(unsigned long long usec) -{ - usec *= gd->arch.timer_rate_hz; - do_div(usec, 1000000); - - return usec; -} - -int timer_init(void) -{ - struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; - unsigned int cr; - - debug("%s()\n", __func__); - - /* disable timers */ - writel(0, &tmr->cr); - - /* use 32768Hz oscillator for RTC, WDT, TIMER */ - ftpmu010_32768osc_enable(); - - /* setup timer */ - writel(TIMER_LOAD_VAL, &tmr->timer3_load); - writel(TIMER_LOAD_VAL, &tmr->timer3_counter); - writel(0, &tmr->timer3_match1); - writel(0, &tmr->timer3_match2); - - /* we don't want timer to issue interrupts */ - writel(FTTMR010_TM3_MATCH1 | - FTTMR010_TM3_MATCH2 | - FTTMR010_TM3_OVERFLOW, - &tmr->interrupt_mask); - - cr = readl(&tmr->cr); - cr |= FTTMR010_TM3_CLOCK; /* use external clock */ - cr |= FTTMR010_TM3_ENABLE; - writel(cr, &tmr->cr); - - gd->arch.timer_rate_hz = TIMER_CLOCK; - gd->arch.tbu = gd->arch.tbl = 0; - - return 0; -} - -/* - * Get the current 64 bit timer tick count - */ -unsigned long long get_ticks(void) -{ - struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; - ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter); - - /* increment tbu if tbl has rolled over */ - if (now < gd->arch.tbl) - gd->arch.tbu++; - gd->arch.tbl = now; - return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; -} - -void __udelay(unsigned long usec) -{ - unsigned long long start; - ulong tmo; - - start = get_ticks(); /* get current timestamp */ - tmo = usec_to_tick(usec); /* convert usecs to ticks */ - while ((get_ticks() - start) < tmo) - ; /* loop till time has passed */ -} - -/* - * get_timer(base) can be used to check for timeouts or - * to measure elasped time relative to an event: - * - * ulong start_time = get_timer(0) sets start_time to the current - * time value. - * get_timer(start_time) returns the time elapsed since then. - * - * The time is used in CONFIG_SYS_HZ units! - */ -ulong get_timer(ulong base) -{ - return tick_to_time(get_ticks()) - base; -} - -/* - * Return the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - return gd->arch.timer_rate_hz; -} diff --git a/arch/arm/include/asm/arch-a320/a320.h b/arch/arm/include/asm/arch-a320/a320.h deleted file mode 100644 index f2db8e1061..0000000000 --- a/arch/arm/include/asm/arch-a320/a320.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __A320_H -#define __A320_H - -/* - * Hardware register bases - */ -#define CONFIG_FTSMC020_BASE 0x90200000 /* Static Memory Controller */ -#define CONFIG_DEBUG_LED 0x902ffffc /* Debug LED */ -#define CONFIG_FTSDMC020_BASE 0x90300000 /* SDRAM Controller */ -#define CONFIG_FTMAC100_BASE 0x90900000 /* Ethernet */ -#define CONFIG_FTPMU010_BASE 0x98100000 /* Power Management Unit */ -#define CONFIG_FTTMR010_BASE 0x98400000 /* Timer */ -#define CONFIG_FTRTC010_BASE 0x98600000 /* Real Time Clock*/ - -#endif /* __A320_H */ diff --git a/board/faraday/a320evb/Kconfig b/board/faraday/a320evb/Kconfig deleted file mode 100644 index 02c42cb0a2..0000000000 --- a/board/faraday/a320evb/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_A320EVB - -config SYS_BOARD - default "a320evb" - -config SYS_VENDOR - default "faraday" - -config SYS_SOC - default "a320" - -config SYS_CONFIG_NAME - default "a320evb" - -endif diff --git a/board/faraday/a320evb/MAINTAINERS b/board/faraday/a320evb/MAINTAINERS deleted file mode 100644 index f13b015bb4..0000000000 --- a/board/faraday/a320evb/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -A320EVB BOARD -M: Po-Yu Chuang -S: Maintained -F: board/faraday/a320evb/ -F: include/configs/a320evb.h -F: configs/a320evb_defconfig diff --git a/board/faraday/a320evb/Makefile b/board/faraday/a320evb/Makefile deleted file mode 100644 index 518ce3fcb4..0000000000 --- a/board/faraday/a320evb/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := a320evb.o -obj-y += lowlevel_init.o diff --git a/board/faraday/a320evb/a320evb.c b/board/faraday/a320evb/a320evb.c deleted file mode 100644 index c42635b705..0000000000 --- a/board/faraday/a320evb/a320evb.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscellaneous platform dependent initialisations - */ - -int board_init(void) -{ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - ftsmc020_init(); /* initialize Flash */ - return 0; -} - -int dram_init(void) -{ - unsigned long sdram_base = PHYS_SDRAM_1; - unsigned long expected_size = PHYS_SDRAM_1_SIZE; - unsigned long actual_size; - - actual_size = get_ram_size((void *)sdram_base, expected_size); - - gd->ram_size = actual_size; - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return 0; -} - -int board_eth_init(bd_t *bd) -{ - return ftmac100_initialize(bd); -} - -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) -{ - if (banknum == 0) { /* non-CFI boot flash */ - info->portwidth = FLASH_CFI_8BIT; - info->chipwidth = FLASH_CFI_BY8; - info->interface = FLASH_CFI_X8; - return 1; - } else - return 0; -} diff --git a/board/faraday/a320evb/lowlevel_init.S b/board/faraday/a320evb/lowlevel_init.S deleted file mode 100644 index d366260a80..0000000000 --- a/board/faraday/a320evb/lowlevel_init.S +++ /dev/null @@ -1,106 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#include -#include - -/* - * parameters for the SDRAM controller - */ -#define TP0_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_TP0) -#define TP1_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_TP1) -#define CR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_CR) -#define B0_BSR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_BANK0_BSR) -#define ACR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_ACR) - -#define TP0_D CONFIG_SYS_FTSDMC020_TP0 -#define TP1_D CONFIG_SYS_FTSDMC020_TP1 -#define CR_D1 FTSDMC020_CR_IPREC -#define CR_D2 FTSDMC020_CR_ISMR -#define CR_D3 FTSDMC020_CR_IREF - -#define B0_BSR_D (CONFIG_SYS_FTSDMC020_BANK0_BSR | \ - FTSDMC020_BANK_BASE(PHYS_SDRAM_1)) -#define ACR_D FTSDMC020_ACR_TOC(0x18) - -/* - * numeric 7 segment display - */ -.macro led, num - write32 CONFIG_DEBUG_LED, \num -.endm - -/* - * Waiting for SDRAM to set up - */ -.macro wait_sdram - ldr r0, =CONFIG_FTSDMC020_BASE -1: - ldr r1, [r0, #FTSDMC020_OFFSET_CR] - cmp r1, #0 - bne 1b -.endm - -.globl lowlevel_init -lowlevel_init: - mov r11, lr - - led 0x0 - - bl init_sdmc - - led 0x1 - - /* everything is fine now */ - mov lr, r11 - mov pc, lr - -/* - * memory initialization - */ -init_sdmc: - led 0x10 - - /* set SDRAM register */ - - write32 TP0_A, TP0_D - led 0x11 - - write32 TP1_A, TP1_D - led 0x12 - - /* set to precharge */ - write32 CR_A, CR_D1 - led 0x13 - - wait_sdram - led 0x14 - - /* set mode register */ - write32 CR_A, CR_D2 - led 0x15 - - wait_sdram - led 0x16 - - /* set to refresh */ - write32 CR_A, CR_D3 - led 0x17 - - wait_sdram - led 0x18 - - write32 B0_BSR_A, B0_BSR_D - led 0x19 - - write32 ACR_A, ACR_D - led 0x1a - - mov pc, lr diff --git a/configs/a320evb_defconfig b/configs/a320evb_defconfig deleted file mode 100644 index 5ebf5e6a71..0000000000 --- a/configs/a320evb_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_A320EVB=y diff --git a/doc/README.scrapyard b/doc/README.scrapyard index aa9ed41db5..1528b9b928 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +a320evb arm arm920t - - Po-Yu Chuang cm4008 arm arm920t - - Greg Ungerer cm41xx arm arm920t - - dkb arm arm926ejs - - Lei Wen diff --git a/include/configs/a320evb.h b/include/configs/a320evb.h deleted file mode 100644 index 0d3cf369b6..0000000000 --- a/include/configs/a320evb.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * Configuation settings for the Faraday A320 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -/* - * mach-type definition - */ -#define MACH_TYPE_FARADAY 758 -#define CONFIG_MACH_TYPE MACH_TYPE_FARADAY - -/* - * Linux kernel tagged list - */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS - -/* - * CPU and Board Configuration Options - */ -#undef CONFIG_SKIP_LOWLEVEL_INIT - -/* - * Power Management Unit - */ -#define CONFIG_FTPMU010_POWER - -/* - * Timer - */ - -/* - * Real Time Clock - */ -#define CONFIG_RTC_FTRTC010 - -/* - * Serial console configuration - */ - -/* FTUART is a high speed NS 16C550A compatible UART */ -#define CONFIG_BAUDRATE 38400 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_COM1 0x98200000 -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_CLK 18432000 - -/* - * Ethernet - */ -#define CONFIG_FTMAC100 - -#define CONFIG_BOOTDELAY 3 - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DATE -#define CONFIG_CMD_PING - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "A320 # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ - -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) - -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 - -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) - -/* - * SDRAM controller configuration - */ -#define CONFIG_SYS_FTSDMC020_TP0 (FTSDMC020_TP0_TRAS(2) | \ - FTSDMC020_TP0_TRP(1) | \ - FTSDMC020_TP0_TRCD(1) | \ - FTSDMC020_TP0_TRF(3) | \ - FTSDMC020_TP0_TWR(1) | \ - FTSDMC020_TP0_TCL(2)) - -#define CONFIG_SYS_FTSDMC020_TP1 (FTSDMC020_TP1_INI_PREC(4) | \ - FTSDMC020_TP1_INI_REFT(8) | \ - FTSDMC020_TP1_REF_INTV(0x180)) - -#define CONFIG_SYS_FTSDMC020_BANK0_BSR (FTSDMC020_BANK_ENABLE | \ - FTSDMC020_BANK_DDW_X16 | \ - FTSDMC020_BANK_DSZ_256M | \ - FTSDMC020_BANK_MBW_32 | \ - FTSDMC020_BANK_SIZE_64M) - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ - GENERATED_GBL_DATA_SIZE) - -/* - * Load address and memory test area should agree with - * board/faraday/a320/config.mk. Be careful not to overwrite U-boot itself. - */ -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x2000000) - -/* memtest works on 63 MB in DRAM */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x3F00000) - -#define CONFIG_SYS_TEXT_BASE 0 - -/* - * Static memory controller configuration - */ - -#define CONFIG_FTSMC020 -#include - -#define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \ - FTSMC020_BANK_BASE(PHYS_FLASH_1) | \ - FTSMC020_BANK_SIZE_1M | \ - FTSMC020_BANK_MBW_8) - -#define FTSMC020_BANK0_TIMING (FTSMC020_TPR_RBE | \ - FTSMC020_TPR_AST(3) | \ - FTSMC020_TPR_CTW(3) | \ - FTSMC020_TPR_ATI(0xf) | \ - FTSMC020_TPR_AT2(3) | \ - FTSMC020_TPR_WTC(3) | \ - FTSMC020_TPR_AHT(3) | \ - FTSMC020_TPR_TRNA(0xf)) - -#define FTSMC020_BANK1_CONFIG (FTSMC020_BANK_ENABLE | \ - FTSMC020_BANK_BASE(PHYS_FLASH_2) | \ - FTSMC020_BANK_SIZE_32M | \ - FTSMC020_BANK_MBW_32) - -#define FTSMC020_BANK1_TIMING (FTSMC020_TPR_AST(3) | \ - FTSMC020_TPR_CTW(3) | \ - FTSMC020_TPR_ATI(0xf) | \ - FTSMC020_TPR_AT2(3) | \ - FTSMC020_TPR_WTC(3) | \ - FTSMC020_TPR_AHT(3) | \ - FTSMC020_TPR_TRNA(0xf)) - -#define CONFIG_SYS_FTSMC020_CONFIGS { \ - { FTSMC020_BANK0_CONFIG, FTSMC020_BANK0_TIMING, }, \ - { FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \ -} - -/* - * FLASH and environment organization - */ - -/* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -/* support JEDEC */ -#define CONFIG_FLASH_CFI_LEGACY -#define CONFIG_SYS_FLASH_LEGACY_512Kx8 - -#define PHYS_FLASH_1 0x00000000 -#define PHYS_FLASH_2 0x00400000 -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2, } - -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 - -/* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 - -/* max number of sectors on one chip */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 - -#undef CONFIG_SYS_FLASH_EMPTY_INFO - -/* environments */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) -#define CONFIG_ENV_SIZE 0x20000 - -#endif /* __CONFIG_H */ From 50b82c4b702c59599c567fa82decb20d60f5110d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 11:45:09 +0900 Subject: [PATCH 216/222] ARM: remove tnetv107x board support This is still a non-generic board. Signed-off-by: Masahiro Yamada Cc: Chan-Taek Park Acked-by: Marek Vasut --- arch/arm/Kconfig | 5 - arch/arm/cpu/arm1176/Makefile | 1 - arch/arm/cpu/arm1176/start.S | 22 - arch/arm/cpu/arm1176/tnetv107x/Makefile | 6 - arch/arm/cpu/arm1176/tnetv107x/aemif.c | 78 ---- arch/arm/cpu/arm1176/tnetv107x/clock.c | 432 ------------------ arch/arm/cpu/arm1176/tnetv107x/init.c | 22 - .../arm/cpu/arm1176/tnetv107x/lowlevel_init.S | 10 - arch/arm/cpu/arm1176/tnetv107x/mux.c | 319 ------------- arch/arm/cpu/arm1176/tnetv107x/timer.c | 93 ---- arch/arm/include/asm/arch-tnetv107x/clock.h | 53 --- .../arm/include/asm/arch-tnetv107x/hardware.h | 160 ------- arch/arm/include/asm/arch-tnetv107x/mux.h | 291 ------------ board/ti/tnetv107xevm/Kconfig | 15 - board/ti/tnetv107xevm/MAINTAINERS | 6 - board/ti/tnetv107xevm/Makefile | 5 - board/ti/tnetv107xevm/config.mk | 5 - board/ti/tnetv107xevm/sdb_board.c | 134 ------ configs/tnetv107x_evm_defconfig | 2 - doc/README.scrapyard | 1 + drivers/watchdog/Makefile | 1 - drivers/watchdog/tnetv107x_wdt.c | 165 ------- include/configs/tnetv107x_evm.h | 139 ------ 23 files changed, 1 insertion(+), 1964 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/Makefile delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/aemif.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/clock.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/init.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/mux.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/timer.c delete mode 100644 arch/arm/include/asm/arch-tnetv107x/clock.h delete mode 100644 arch/arm/include/asm/arch-tnetv107x/hardware.h delete mode 100644 arch/arm/include/asm/arch-tnetv107x/mux.h delete mode 100644 board/ti/tnetv107xevm/Kconfig delete mode 100644 board/ti/tnetv107xevm/MAINTAINERS delete mode 100644 board/ti/tnetv107xevm/Makefile delete mode 100644 board/ti/tnetv107xevm/config.mk delete mode 100644 board/ti/tnetv107xevm/sdb_board.c delete mode 100644 configs/tnetv107x_evm_defconfig delete mode 100644 drivers/watchdog/tnetv107x_wdt.c delete mode 100644 include/configs/tnetv107x_evm.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f6a17207a9..7a2f91c48e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -294,10 +294,6 @@ config TARGET_RPI_2 bool "Support rpi_2" select CPU_V7 -config TARGET_TNETV107X_EVM - bool "Support tnetv107x_evm" - select CPU_ARM1176 - config TARGET_INTEGRATORAP_CM946ES bool "Support integratorap_cm946es" select CPU_ARM946ES @@ -834,7 +830,6 @@ source "board/ti/am335x/Kconfig" source "board/ti/am43xx/Kconfig" source "board/ti/ti814x/Kconfig" source "board/ti/ti816x/Kconfig" -source "board/ti/tnetv107xevm/Kconfig" source "board/timll/devkit3250/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" source "board/tqc/tqma6/Kconfig" diff --git a/arch/arm/cpu/arm1176/Makefile b/arch/arm/cpu/arm1176/Makefile index ead2303373..480e130489 100644 --- a/arch/arm/cpu/arm1176/Makefile +++ b/arch/arm/cpu/arm1176/Makefile @@ -12,4 +12,3 @@ extra-y = start.o obj-y = cpu.o obj-$(CONFIG_BCM2835) += bcm2835/ -obj-$(CONFIG_TNETV107X) += tnetv107x/ diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 0704bdde27..ac937bf5b0 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -96,28 +96,6 @@ mmu_disable: mov pc, r2 mmu_disable_phys: -#ifdef CONFIG_DISABLE_TCM - /* - * Disable the TCMs - */ - mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */ - cmp r0, #0 - beq skip_tcmdisable - mov r1, #0 - mov r2, #1 - tst r0, r2 - mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/ - tst r0, r2, LSL #16 - mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/ -skip_tcmdisable: -#endif -#endif - -#ifdef CONFIG_PERIPORT_REMAP - /* Peri port setup */ - ldr r0, =CONFIG_PERIPORT_BASE - orr r0, r0, #CONFIG_PERIPORT_SIZE - mcr p15,0,r0,c15,c2,4 #endif /* diff --git a/arch/arm/cpu/arm1176/tnetv107x/Makefile b/arch/arm/cpu/arm1176/tnetv107x/Makefile deleted file mode 100644 index a4c1edfc71..0000000000 --- a/arch/arm/cpu/arm1176/tnetv107x/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += aemif.o clock.o init.o mux.o timer.o -obj-y += lowlevel_init.o diff --git a/arch/arm/cpu/arm1176/tnetv107x/aemif.c b/arch/arm/cpu/arm1176/tnetv107x/aemif.c deleted file mode 100644 index a0f57289e9..0000000000 --- a/arch/arm/cpu/arm1176/tnetv107x/aemif.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * TNETV107X: Asynchronous EMIF Configuration - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#define ASYNC_EMIF_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE -#define ASYNC_EMIF_CONFIG(cs) (ASYNC_EMIF_BASE+0x10+(cs)*4) -#define ASYNC_EMIF_ONENAND_CONTROL (ASYNC_EMIF_BASE+0x5c) -#define ASYNC_EMIF_NAND_CONTROL (ASYNC_EMIF_BASE+0x60) -#define ASYNC_EMIF_WAITCYCLE_CONFIG (ASYNC_EMIF_BASE+0x4) - -#define CONFIG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0) -#define CONFIG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0) -#define CONFIG_WR_SETUP(v) (((v) & 0x0f) << 26) -#define CONFIG_WR_STROBE(v) (((v) & 0x3f) << 20) -#define CONFIG_WR_HOLD(v) (((v) & 0x07) << 17) -#define CONFIG_RD_SETUP(v) (((v) & 0x0f) << 13) -#define CONFIG_RD_STROBE(v) (((v) & 0x3f) << 7) -#define CONFIG_RD_HOLD(v) (((v) & 0x07) << 4) -#define CONFIG_TURN_AROUND(v) (((v) & 0x03) << 2) -#define CONFIG_WIDTH(v) (((v) & 0x03) << 0) - -#define NUM_CS 4 - -#define set_config_field(reg, field, val) \ - do { \ - if (val != -1) { \ - reg &= ~CONFIG_##field(0xffffffff); \ - reg |= CONFIG_##field(val); \ - } \ - } while (0) - -void configure_async_emif(int cs, struct async_emif_config *cfg) -{ - unsigned long tmp; - - if (cfg->mode == ASYNC_EMIF_MODE_NAND) { - tmp = __raw_readl(ASYNC_EMIF_NAND_CONTROL); - tmp |= (1 << cs); - __raw_writel(tmp, ASYNC_EMIF_NAND_CONTROL); - - } else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) { - tmp = __raw_readl(ASYNC_EMIF_ONENAND_CONTROL); - tmp |= (1 << cs); - __raw_writel(tmp, ASYNC_EMIF_ONENAND_CONTROL); - } - - tmp = __raw_readl(ASYNC_EMIF_CONFIG(cs)); - - set_config_field(tmp, SELECT_STROBE, cfg->select_strobe); - set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait); - set_config_field(tmp, WR_SETUP, cfg->wr_setup); - set_config_field(tmp, WR_STROBE, cfg->wr_strobe); - set_config_field(tmp, WR_HOLD, cfg->wr_hold); - set_config_field(tmp, RD_SETUP, cfg->rd_setup); - set_config_field(tmp, RD_STROBE, cfg->rd_strobe); - set_config_field(tmp, RD_HOLD, cfg->rd_hold); - set_config_field(tmp, TURN_AROUND, cfg->turn_around); - set_config_field(tmp, WIDTH, cfg->width); - - __raw_writel(tmp, ASYNC_EMIF_CONFIG(cs)); -} - -void init_async_emif(int num_cs, struct async_emif_config *config) -{ - int cs; - - clk_enable(TNETV107X_LPSC_AEMIF); - - for (cs = 0; cs < num_cs; cs++) - configure_async_emif(cs, config + cs); -} diff --git a/arch/arm/cpu/arm1176/tnetv107x/clock.c b/arch/arm/cpu/arm1176/tnetv107x/clock.c deleted file mode 100644 index 7ba28d329f..0000000000 --- a/arch/arm/cpu/arm1176/tnetv107x/clock.c +++ /dev/null @@ -1,432 +0,0 @@ -/* - * TNETV107X: Clock management APIs - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include - -#define CLOCK_BASE TNETV107X_CLOCK_CONTROL_BASE -#define PSC_BASE TNETV107X_PSC_BASE - -#define BIT(x) (1 << (x)) - -#define MAX_PREDIV 64 -#define MAX_POSTDIV 8UL -#define MAX_MULT 512 -#define MAX_DIV (MAX_PREDIV * MAX_POSTDIV) - -/* LPSC registers */ -#define PSC_PTCMD 0x120 -#define PSC_PTSTAT 0x128 -#define PSC_MDSTAT(n) (0x800 + (n) * 4) -#define PSC_MDCTL(n) (0xA00 + (n) * 4) - -#define PSC_MDCTL_LRSTZ BIT(8) - -#define psc_reg_read(reg) __raw_readl((u32 *)(PSC_BASE + (reg))) -#define psc_reg_write(reg, val) __raw_writel(val, (u32 *)(PSC_BASE + (reg))) - -/* SSPLL registers */ -struct sspll_regs { - u32 modes; - u32 postdiv; - u32 prediv; - u32 mult_factor; - u32 divider_range; - u32 bw_divider; - u32 spr_amount; - u32 spr_rate_div; - u32 diag; -}; - -/* SSPLL base addresses */ -static struct sspll_regs *sspll_regs[] = { - (struct sspll_regs *)(CLOCK_BASE + 0x040), - (struct sspll_regs *)(CLOCK_BASE + 0x080), - (struct sspll_regs *)(CLOCK_BASE + 0x0c0), -}; - -#define sspll_reg(pll, reg) (&(sspll_regs[pll]->reg)) -#define sspll_reg_read(pll, reg) __raw_readl(sspll_reg(pll, reg)) -#define sspll_reg_write(pll, reg, val) __raw_writel(val, sspll_reg(pll, reg)) - - -/* PLL Control Registers */ -struct pllctl_regs { - u32 ctl; /* 00 */ - u32 ocsel; /* 04 */ - u32 secctl; /* 08 */ - u32 __pad0; - u32 mult; /* 10 */ - u32 prediv; /* 14 */ - u32 div1; /* 18 */ - u32 div2; /* 1c */ - u32 div3; /* 20 */ - u32 oscdiv1; /* 24 */ - u32 postdiv; /* 28 */ - u32 bpdiv; /* 2c */ - u32 wakeup; /* 30 */ - u32 __pad1; - u32 cmd; /* 38 */ - u32 stat; /* 3c */ - u32 alnctl; /* 40 */ - u32 dchange; /* 44 */ - u32 cken; /* 48 */ - u32 ckstat; /* 4c */ - u32 systat; /* 50 */ - u32 ckctl; /* 54 */ - u32 __pad2[2]; - u32 div4; /* 60 */ - u32 div5; /* 64 */ - u32 div6; /* 68 */ - u32 div7; /* 6c */ - u32 div8; /* 70 */ -}; - -struct lpsc_map { - int pll, div; -}; - -static struct pllctl_regs *pllctl_regs[] = { - (struct pllctl_regs *)(CLOCK_BASE + 0x700), - (struct pllctl_regs *)(CLOCK_BASE + 0x300), - (struct pllctl_regs *)(CLOCK_BASE + 0x500), -}; - -#define pllctl_reg(pll, reg) (&(pllctl_regs[pll]->reg)) -#define pllctl_reg_read(pll, reg) __raw_readl(pllctl_reg(pll, reg)) -#define pllctl_reg_write(pll, reg, val) __raw_writel(val, pllctl_reg(pll, reg)) - -#define pllctl_reg_rmw(pll, reg, mask, val) \ - pllctl_reg_write(pll, reg, \ - (pllctl_reg_read(pll, reg) & ~(mask)) | val) - -#define pllctl_reg_setbits(pll, reg, mask) \ - pllctl_reg_rmw(pll, reg, 0, mask) - -#define pllctl_reg_clrbits(pll, reg, mask) \ - pllctl_reg_rmw(pll, reg, mask, 0) - -/* PLLCTL Bits */ -#define PLLCTL_CLKMODE BIT(8) -#define PLLCTL_PLLSELB BIT(7) -#define PLLCTL_PLLENSRC BIT(5) -#define PLLCTL_PLLDIS BIT(4) -#define PLLCTL_PLLRST BIT(3) -#define PLLCTL_PLLPWRDN BIT(1) -#define PLLCTL_PLLEN BIT(0) - -#define PLLDIV_ENABLE BIT(15) - -static int pll_div_offset[] = { -#define div_offset(reg) offsetof(struct pllctl_regs, reg) - div_offset(div1), div_offset(div2), div_offset(div3), - div_offset(div4), div_offset(div5), div_offset(div6), - div_offset(div7), div_offset(div8), -}; - -static unsigned long pll_bypass_mask[] = { 1, 4, 2 }; -static unsigned long pll_div_mask[] = { 0x01ff, 0x00ff, 0x00ff }; - -/* Mappings from PLL+DIV to subsystem clocks */ -#define sys_arm1176_clk {SYS_PLL, 0} -#define sys_dsp_clk {SYS_PLL, 1} -#define sys_ddr_clk {SYS_PLL, 2} -#define sys_full_clk {SYS_PLL, 3} -#define sys_lcd_clk {SYS_PLL, 4} -#define sys_vlynq_ref_clk {SYS_PLL, 5} -#define sys_tsc_clk {SYS_PLL, 6} -#define sys_half_clk {SYS_PLL, 7} - -#define eth_clk_5 {ETH_PLL, 0} -#define eth_clk_50 {ETH_PLL, 1} -#define eth_clk_125 {ETH_PLL, 2} -#define eth_clk_250 {ETH_PLL, 3} -#define eth_clk_25 {ETH_PLL, 4} - -#define tdm_clk {TDM_PLL, 0} -#define tdm_extra_clk {TDM_PLL, 1} -#define tdm1_clk {TDM_PLL, 2} - -static const struct lpsc_map lpsc_clk_map[] = { - [TNETV107X_LPSC_ARM] = sys_arm1176_clk, - [TNETV107X_LPSC_GEM] = sys_dsp_clk, - [TNETV107X_LPSC_DDR2_PHY] = sys_ddr_clk, - [TNETV107X_LPSC_TPCC] = sys_full_clk, - [TNETV107X_LPSC_TPTC0] = sys_full_clk, - [TNETV107X_LPSC_TPTC1] = sys_full_clk, - [TNETV107X_LPSC_RAM] = sys_full_clk, - [TNETV107X_LPSC_MBX_LITE] = sys_arm1176_clk, - [TNETV107X_LPSC_LCD] = sys_lcd_clk, - [TNETV107X_LPSC_ETHSS] = eth_clk_125, - [TNETV107X_LPSC_AEMIF] = sys_full_clk, - [TNETV107X_LPSC_CHIP_CFG] = sys_half_clk, - [TNETV107X_LPSC_TSC] = sys_tsc_clk, - [TNETV107X_LPSC_ROM] = sys_half_clk, - [TNETV107X_LPSC_UART2] = sys_half_clk, - [TNETV107X_LPSC_PKTSEC] = sys_half_clk, - [TNETV107X_LPSC_SECCTL] = sys_half_clk, - [TNETV107X_LPSC_KEYMGR] = sys_half_clk, - [TNETV107X_LPSC_KEYPAD] = sys_half_clk, - [TNETV107X_LPSC_GPIO] = sys_half_clk, - [TNETV107X_LPSC_MDIO] = sys_half_clk, - [TNETV107X_LPSC_SDIO0] = sys_half_clk, - [TNETV107X_LPSC_UART0] = sys_half_clk, - [TNETV107X_LPSC_UART1] = sys_half_clk, - [TNETV107X_LPSC_TIMER0] = sys_half_clk, - [TNETV107X_LPSC_TIMER1] = sys_half_clk, - [TNETV107X_LPSC_WDT_ARM] = sys_half_clk, - [TNETV107X_LPSC_WDT_DSP] = sys_half_clk, - [TNETV107X_LPSC_SSP] = sys_half_clk, - [TNETV107X_LPSC_TDM0] = tdm_clk, - [TNETV107X_LPSC_VLYNQ] = sys_vlynq_ref_clk, - [TNETV107X_LPSC_MCDMA] = sys_half_clk, - [TNETV107X_LPSC_USB0] = sys_half_clk, - [TNETV107X_LPSC_TDM1] = tdm1_clk, - [TNETV107X_LPSC_DEBUGSS] = sys_half_clk, - [TNETV107X_LPSC_ETHSS_RGMII] = eth_clk_250, - [TNETV107X_LPSC_SYSTEM] = sys_half_clk, - [TNETV107X_LPSC_IMCOP] = sys_dsp_clk, - [TNETV107X_LPSC_SPARE] = sys_half_clk, - [TNETV107X_LPSC_SDIO1] = sys_half_clk, - [TNETV107X_LPSC_USB1] = sys_half_clk, - [TNETV107X_LPSC_USBSS] = sys_half_clk, - [TNETV107X_LPSC_DDR2_EMIF1_VRST] = sys_ddr_clk, - [TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST] = sys_ddr_clk, -}; - -static const unsigned long pll_ext_freq[] = { - [SYS_PLL] = CONFIG_PLL_SYS_EXT_FREQ, - [ETH_PLL] = CONFIG_PLL_ETH_EXT_FREQ, - [TDM_PLL] = CONFIG_PLL_TDM_EXT_FREQ, -}; - -static unsigned long pll_freq_get(int pll) -{ - unsigned long mult = 1, prediv = 1, postdiv = 1; - unsigned long ref = CONFIG_SYS_INT_OSC_FREQ; - unsigned long ret; - u32 bypass; - - bypass = __raw_readl((u32 *)(CLOCK_BASE)); - if (!(bypass & pll_bypass_mask[pll])) { - mult = sspll_reg_read(pll, mult_factor); - prediv = sspll_reg_read(pll, prediv) + 1; - postdiv = sspll_reg_read(pll, postdiv) + 1; - } - - if (pllctl_reg_read(pll, ctl) & PLLCTL_CLKMODE) - ref = pll_ext_freq[pll]; - - if (!(pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN)) - return ref; - - ret = (unsigned long)(ref + ((unsigned long long)ref * mult) / 256); - ret /= (prediv * postdiv); - - return ret; -} - -static unsigned long __pll_div_freq_get(int pll, unsigned int fpll, - int div) -{ - int divider = 1; - unsigned long divreg; - - divreg = __raw_readl((void *)pllctl_regs[pll] + pll_div_offset[div]); - - if (divreg & PLLDIV_ENABLE) - divider = (divreg & pll_div_mask[pll]) + 1; - - return fpll / divider; -} - -static unsigned long pll_div_freq_get(int pll, int div) -{ - unsigned int fpll = pll_freq_get(pll); - - return __pll_div_freq_get(pll, fpll, div); -} - -static void __pll_div_freq_set(int pll, unsigned int fpll, int div, - unsigned long hz) -{ - int divider = (fpll / hz - 1); - - divider &= pll_div_mask[pll]; - divider |= PLLDIV_ENABLE; - - __raw_writel(divider, (void *)pllctl_regs[pll] + pll_div_offset[div]); - pllctl_reg_setbits(pll, alnctl, (1 << div)); - pllctl_reg_setbits(pll, dchange, (1 << div)); -} - -static unsigned long pll_div_freq_set(int pll, int div, unsigned long hz) -{ - unsigned int fpll = pll_freq_get(pll); - - __pll_div_freq_set(pll, fpll, div, hz); - - pllctl_reg_write(pll, cmd, 1); - - /* Wait until new divider takes effect */ - while (pllctl_reg_read(pll, stat) & 0x01); - - return __pll_div_freq_get(pll, fpll, div); -} - -unsigned long clk_get_rate(unsigned int clk) -{ - return pll_div_freq_get(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div); -} - -unsigned long clk_round_rate(unsigned int clk, unsigned long hz) -{ - unsigned long fpll, divider, pll; - - pll = lpsc_clk_map[clk].pll; - fpll = pll_freq_get(pll); - divider = (fpll / hz - 1); - divider &= pll_div_mask[pll]; - - return fpll / (divider + 1); -} - -int clk_set_rate(unsigned int clk, unsigned long _hz) -{ - unsigned long hz; - - hz = clk_round_rate(clk, _hz); - if (hz != _hz) - return -EINVAL; /* Cannot set to target freq */ - - pll_div_freq_set(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div, hz); - return 0; -} - -void lpsc_control(int mod, unsigned long state, int lrstz) -{ - u32 mdctl; - - mdctl = psc_reg_read(PSC_MDCTL(mod)); - mdctl &= ~0x1f; - mdctl |= state; - - if (lrstz == 0) - mdctl &= ~PSC_MDCTL_LRSTZ; - else if (lrstz == 1) - mdctl |= PSC_MDCTL_LRSTZ; - - psc_reg_write(PSC_MDCTL(mod), mdctl); - - psc_reg_write(PSC_PTCMD, 1); - - /* wait for power domain transition to end */ - while (psc_reg_read(PSC_PTSTAT) & 1); - - /* Wait for module state change */ - while ((psc_reg_read(PSC_MDSTAT(mod)) & 0x1f) != state); -} - -int lpsc_status(unsigned int id) -{ - return psc_reg_read(PSC_MDSTAT(id)) & 0x1f; -} - -static void init_pll(const struct pll_init_data *data) -{ - unsigned long fpll; - unsigned long best_pre = 0, best_post = 0, best_mult = 0; - unsigned long div, prediv, postdiv, mult; - unsigned long delta, actual; - long best_delta = -1; - int i; - u32 tmp; - - if (data->pll == SYS_PLL) - return; /* cannot reconfigure system pll on the fly */ - - tmp = pllctl_reg_read(data->pll, ctl); - if (data->internal_osc) { - tmp &= ~PLLCTL_CLKMODE; - fpll = CONFIG_SYS_INT_OSC_FREQ; - } else { - tmp |= PLLCTL_CLKMODE; - fpll = pll_ext_freq[data->pll]; - } - pllctl_reg_write(data->pll, ctl, tmp); - - mult = data->pll_freq / fpll; - for (mult = max(mult, 1UL); mult <= MAX_MULT; mult++) { - div = (fpll * mult) / data->pll_freq; - if (div < 1 || div > MAX_DIV) - continue; - - for (postdiv = 1; postdiv <= min(div, MAX_POSTDIV); postdiv++) { - prediv = div / postdiv; - if (prediv < 1 || prediv > MAX_PREDIV) - continue; - - actual = (fpll / prediv) * (mult / postdiv); - delta = (actual - data->pll_freq); - if (delta < 0) - delta = -delta; - if ((delta < best_delta) || (best_delta == -1)) { - best_delta = delta; - best_mult = mult; - best_pre = prediv; - best_post = postdiv; - if (delta == 0) - goto done; - } - } - } -done: - - if (best_delta == -1) { - printf("pll cannot derive %lu from %lu\n", - data->pll_freq, fpll); - return; - } - - fpll = fpll * best_mult; - fpll /= best_pre * best_post; - - pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLENSRC); - pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLEN); - - pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLRST); - - pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLPWRDN); - pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLDIS); - - sspll_reg_write(data->pll, mult_factor, (best_mult - 1) << 8); - sspll_reg_write(data->pll, prediv, best_pre - 1); - sspll_reg_write(data->pll, postdiv, best_post - 1); - - for (i = 0; i < 10; i++) - if (data->div_freq[i]) - __pll_div_freq_set(data->pll, fpll, i, - data->div_freq[i]); - - pllctl_reg_write(data->pll, cmd, 1); - - /* Wait until pll "go" operation completes */ - while (pllctl_reg_read(data->pll, stat) & 0x01); - - pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLRST); - pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLEN); -} - -void init_plls(int num_pll, struct pll_init_data *config) -{ - int i; - - for (i = 0; i < num_pll; i++) - init_pll(&config[i]); -} diff --git a/arch/arm/cpu/arm1176/tnetv107x/init.c b/arch/arm/cpu/arm1176/tnetv107x/init.c deleted file mode 100644 index d8708267d7..0000000000 --- a/arch/arm/cpu/arm1176/tnetv107x/init.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * TNETV107X: Architecture initialization - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -void chip_configuration_unlock(void) -{ - __raw_writel(TNETV107X_KICK0_MAGIC, TNETV107X_KICK0); - __raw_writel(TNETV107X_KICK1_MAGIC, TNETV107X_KICK1); -} - -int arch_cpu_init(void) -{ - icache_enable(); - chip_configuration_unlock(); - - return 0; -} diff --git a/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S b/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S deleted file mode 100644 index a8bce4784c..0000000000 --- a/arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S +++ /dev/null @@ -1,10 +0,0 @@ -/* - * TNETV107X: Low-level pre-relocation initialization - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -.globl lowlevel_init -lowlevel_init: - /* nothing for now, maybe needed for more exotic boot modes */ - mov pc, lr diff --git a/arch/arm/cpu/arm1176/tnetv107x/mux.c b/arch/arm/cpu/arm1176/tnetv107x/mux.c deleted file mode 100644 index 310d84dfb4..0000000000 --- a/arch/arm/cpu/arm1176/tnetv107x/mux.c +++ /dev/null @@ -1,319 +0,0 @@ -/* - * TNETV107X: Pinmux configuration - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#define MUX_MODE_1 0x00 -#define MUX_MODE_2 0x04 -#define MUX_MODE_3 0x0c -#define MUX_MODE_4 0x1c - -#define MUX_DEBUG 0 - -static const struct pin_config pin_table[] = { - /* reg shift mode */ - TNETV107X_MUX_CFG(0, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(0, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(0, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(0, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(0, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(0, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(0, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(0, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(0, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(0, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(0, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(0, 25, MUX_MODE_2), - TNETV107X_MUX_CFG(1, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(1, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(1, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(1, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(1, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(1, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(1, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(1, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(1, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(1, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(1, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(1, 25, MUX_MODE_2), - TNETV107X_MUX_CFG(2, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(2, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(2, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(2, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(2, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(2, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(2, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(2, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(2, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(2, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(2, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(2, 25, MUX_MODE_2), - TNETV107X_MUX_CFG(3, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(3, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(3, 0, MUX_MODE_4), - TNETV107X_MUX_CFG(3, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(3, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(3, 5, MUX_MODE_4), - TNETV107X_MUX_CFG(3, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(3, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(3, 10, MUX_MODE_4), - TNETV107X_MUX_CFG(3, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(3, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(3, 15, MUX_MODE_4), - TNETV107X_MUX_CFG(3, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(3, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(3, 20, MUX_MODE_4), - TNETV107X_MUX_CFG(3, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(3, 25, MUX_MODE_2), - TNETV107X_MUX_CFG(3, 25, MUX_MODE_4), - TNETV107X_MUX_CFG(4, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(4, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(4, 0, MUX_MODE_4), - TNETV107X_MUX_CFG(4, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(4, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(4, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(4, 15, MUX_MODE_4), - TNETV107X_MUX_CFG(4, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(4, 20, MUX_MODE_3), - TNETV107X_MUX_CFG(4, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(4, 25, MUX_MODE_4), - TNETV107X_MUX_CFG(5, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(5, 0, MUX_MODE_4), - TNETV107X_MUX_CFG(5, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(5, 5, MUX_MODE_4), - TNETV107X_MUX_CFG(5, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(5, 10, MUX_MODE_4), - TNETV107X_MUX_CFG(5, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(5, 15, MUX_MODE_4), - TNETV107X_MUX_CFG(5, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(5, 20, MUX_MODE_4), - TNETV107X_MUX_CFG(5, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(5, 25, MUX_MODE_4), - TNETV107X_MUX_CFG(6, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(6, 0, MUX_MODE_4), - TNETV107X_MUX_CFG(6, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(6, 5, MUX_MODE_4), - TNETV107X_MUX_CFG(6, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(6, 10, MUX_MODE_4), - TNETV107X_MUX_CFG(6, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(6, 15, MUX_MODE_4), - TNETV107X_MUX_CFG(6, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(6, 20, MUX_MODE_4), - TNETV107X_MUX_CFG(6, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(6, 25, MUX_MODE_4), - TNETV107X_MUX_CFG(7, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(7, 0, MUX_MODE_4), - TNETV107X_MUX_CFG(7, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(7, 5, MUX_MODE_4), - TNETV107X_MUX_CFG(7, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(7, 10, MUX_MODE_4), - TNETV107X_MUX_CFG(7, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(7, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(7, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(7, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(7, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(7, 25, MUX_MODE_2), - TNETV107X_MUX_CFG(8, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(8, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(8, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(8, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(8, 5, MUX_MODE_4), - TNETV107X_MUX_CFG(8, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(8, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(9, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(9, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(9, 0, MUX_MODE_4), - TNETV107X_MUX_CFG(9, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(9, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(9, 5, MUX_MODE_4), - TNETV107X_MUX_CFG(9, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(9, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(9, 10, MUX_MODE_4), - TNETV107X_MUX_CFG(9, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(9, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(9, 15, MUX_MODE_4), - TNETV107X_MUX_CFG(9, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(9, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(9, 20, MUX_MODE_4), - TNETV107X_MUX_CFG(10, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(10, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(10, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(10, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(10, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(10, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(10, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(10, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(10, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(10, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(10, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(10, 25, MUX_MODE_2), - TNETV107X_MUX_CFG(11, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(11, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(12, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(12, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(12, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(12, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(12, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(12, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(13, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(13, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(13, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(13, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(14, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(14, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(14, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(14, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(14, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(14, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(15, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(15, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(15, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(15, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(15, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(15, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(15, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(15, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(16, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(16, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(16, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(16, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(16, 10, MUX_MODE_3), - TNETV107X_MUX_CFG(16, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(16, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(17, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(17, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(17, 0, MUX_MODE_3), - TNETV107X_MUX_CFG(17, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(17, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(17, 5, MUX_MODE_3), - TNETV107X_MUX_CFG(17, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(17, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(17, 10, MUX_MODE_3), - TNETV107X_MUX_CFG(17, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(17, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(17, 15, MUX_MODE_3), - TNETV107X_MUX_CFG(18, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(18, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(18, 0, MUX_MODE_3), - TNETV107X_MUX_CFG(18, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(18, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(18, 5, MUX_MODE_3), - TNETV107X_MUX_CFG(18, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(18, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(18, 10, MUX_MODE_3), - TNETV107X_MUX_CFG(18, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(18, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(18, 15, MUX_MODE_3), - TNETV107X_MUX_CFG(19, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(19, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(19, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(19, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(19, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(19, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(20, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(20, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(20, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(20, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(20, 15, MUX_MODE_3), - TNETV107X_MUX_CFG(20, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(20, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(21, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(21, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(21, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(21, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(21, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(21, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(22, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(22, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(22, 5, MUX_MODE_3), - TNETV107X_MUX_CFG(22, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(22, 10, MUX_MODE_3), - TNETV107X_MUX_CFG(22, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(22, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(22, 15, MUX_MODE_3), - TNETV107X_MUX_CFG(22, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(22, 20, MUX_MODE_3), - TNETV107X_MUX_CFG(22, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(22, 25, MUX_MODE_3), - TNETV107X_MUX_CFG(23, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(23, 0, MUX_MODE_3), - TNETV107X_MUX_CFG(23, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(23, 5, MUX_MODE_3), - TNETV107X_MUX_CFG(23, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(23, 10, MUX_MODE_3), - TNETV107X_MUX_CFG(24, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(24, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(24, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(24, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(24, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(24, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(24, 10, MUX_MODE_3), - TNETV107X_MUX_CFG(24, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(24, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(24, 15, MUX_MODE_3), - TNETV107X_MUX_CFG(24, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(24, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(24, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(24, 25, MUX_MODE_2), - TNETV107X_MUX_CFG(25, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(25, 0, MUX_MODE_2), - TNETV107X_MUX_CFG(25, 0, MUX_MODE_3), - TNETV107X_MUX_CFG(25, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(25, 5, MUX_MODE_2), - TNETV107X_MUX_CFG(25, 5, MUX_MODE_3), - TNETV107X_MUX_CFG(25, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(25, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(25, 10, MUX_MODE_3), - TNETV107X_MUX_CFG(25, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(25, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(25, 15, MUX_MODE_3), - TNETV107X_MUX_CFG(25, 15, MUX_MODE_4), - TNETV107X_MUX_CFG(26, 0, MUX_MODE_1), - TNETV107X_MUX_CFG(26, 5, MUX_MODE_1), - TNETV107X_MUX_CFG(26, 10, MUX_MODE_1), - TNETV107X_MUX_CFG(26, 10, MUX_MODE_2), - TNETV107X_MUX_CFG(26, 15, MUX_MODE_1), - TNETV107X_MUX_CFG(26, 15, MUX_MODE_2), - TNETV107X_MUX_CFG(26, 20, MUX_MODE_1), - TNETV107X_MUX_CFG(26, 20, MUX_MODE_2), - TNETV107X_MUX_CFG(26, 25, MUX_MODE_1), - TNETV107X_MUX_CFG(26, 25, MUX_MODE_2), -}; - -const int pin_table_size = sizeof(pin_table) / sizeof(pin_table[0]); - -int mux_select_pin(short index) -{ - const struct pin_config *cfg; - unsigned long mask, mode, reg; - - if (index >= pin_table_size) - return 0; - - cfg = &pin_table[index]; - - mask = 0x1f << cfg->mask_offset; - mode = cfg->mode << cfg->mask_offset; - - reg = __raw_readl(TNETV107X_PINMUX(cfg->reg_index)); - reg = (reg & ~mask) | mode; - __raw_writel(reg, TNETV107X_PINMUX(cfg->reg_index)); - - return 1; -} - -int mux_select_pins(const short *pins) -{ - int i, ret = 1; - - for (i = 0; pins[i] >= 0; i++) - ret &= mux_select_pin(pins[i]); - - return ret; -} diff --git a/arch/arm/cpu/arm1176/tnetv107x/timer.c b/arch/arm/cpu/arm1176/tnetv107x/timer.c deleted file mode 100644 index 6e0dd0d2bd..0000000000 --- a/arch/arm/cpu/arm1176/tnetv107x/timer.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * TNETV107X: Timer implementation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -struct timer_regs { - u_int32_t pid12; - u_int32_t pad[3]; - u_int32_t tim12; - u_int32_t tim34; - u_int32_t prd12; - u_int32_t prd34; - u_int32_t tcr; - u_int32_t tgcr; - u_int32_t wdtcr; -}; - -#define regs ((struct timer_regs *)CONFIG_SYS_TIMERBASE) - -#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) -#define TIM_CLK_DIV 16 - -static ulong timestamp; -static ulong lastinc; - -int timer_init(void) -{ - clk_enable(TNETV107X_LPSC_TIMER0); - - lastinc = timestamp = 0; - - /* We are using timer34 in unchained 32-bit mode, full speed */ - __raw_writel(0x0, ®s->tcr); - __raw_writel(0x0, ®s->tgcr); - __raw_writel(0x06 | ((TIM_CLK_DIV - 1) << 8), ®s->tgcr); - __raw_writel(0x0, ®s->tim34); - __raw_writel(TIMER_LOAD_VAL, ®s->prd34); - __raw_writel(2 << 22, ®s->tcr); - - return 0; -} - -static ulong get_timer_raw(void) -{ - ulong now = __raw_readl(®s->tim34); - - if (now >= lastinc) - timestamp += now - lastinc; - else - timestamp += now + TIMER_LOAD_VAL - lastinc; - - lastinc = now; - - return timestamp; -} - -ulong get_timer(ulong base) -{ - return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base; -} - -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -void __udelay(unsigned long usec) -{ - ulong tmo; - ulong endtime; - signed long diff; - - tmo = CONFIG_SYS_HZ_CLOCK / 1000; - tmo *= usec; - tmo /= (1000 * TIM_CLK_DIV); - - endtime = get_timer_raw() + tmo; - - do { - ulong now = get_timer_raw(); - diff = endtime - now; - } while (diff >= 0); -} - -ulong get_tbclk(void) -{ - return CONFIG_SYS_HZ; -} diff --git a/arch/arm/include/asm/arch-tnetv107x/clock.h b/arch/arm/include/asm/arch-tnetv107x/clock.h deleted file mode 100644 index dfc3b1bfa5..0000000000 --- a/arch/arm/include/asm/arch-tnetv107x/clock.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * TNETV107X: Clock APIs - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H - -#define PSC_MDCTL_NEXT_SWRSTDISABLE 0x0 -#define PSC_MDCTL_NEXT_SYNCRST 0x1 -#define PSC_MDCTL_NEXT_DISABLE 0x2 -#define PSC_MDCTL_NEXT_ENABLE 0x3 - -#define CONFIG_SYS_INT_OSC_FREQ 24000000 - -#ifndef __ASSEMBLY__ - -/* PLL identifiers */ -enum pll_type_e { - SYS_PLL, - TDM_PLL, - ETH_PLL -}; - -/* PLL configuration data */ -struct pll_init_data { - int pll; - int internal_osc; - unsigned long pll_freq; - unsigned long div_freq[10]; -}; - -void init_plls(int num_pll, struct pll_init_data *config); -int lpsc_status(unsigned int mod); -void lpsc_control(int mod, unsigned long state, int lrstz); -unsigned long clk_get_rate(unsigned int clk); -unsigned long clk_round_rate(unsigned int clk, unsigned long hz); -int clk_set_rate(unsigned int clk, unsigned long hz); - -static inline void clk_enable(unsigned int mod) -{ - lpsc_control(mod, PSC_MDCTL_NEXT_ENABLE, -1); -} - -static inline void clk_disable(unsigned int mod) -{ - lpsc_control(mod, PSC_MDCTL_NEXT_DISABLE, -1); -} - -#endif - -#endif diff --git a/arch/arm/include/asm/arch-tnetv107x/hardware.h b/arch/arm/include/asm/arch-tnetv107x/hardware.h deleted file mode 100644 index d458e0bdf0..0000000000 --- a/arch/arm/include/asm/arch-tnetv107x/hardware.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * TNETV107X: Hardware information - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#ifndef __ASSEMBLY__ - -#include - -#define ASYNC_EMIF_NUM_CS 4 -#define ASYNC_EMIF_MODE_NOR 0 -#define ASYNC_EMIF_MODE_NAND 1 -#define ASYNC_EMIF_MODE_ONENAND 2 -#define ASYNC_EMIF_PRESERVE -1 - -struct async_emif_config { - unsigned mode; - unsigned select_strobe; - unsigned extend_wait; - unsigned wr_setup; - unsigned wr_strobe; - unsigned wr_hold; - unsigned rd_setup; - unsigned rd_strobe; - unsigned rd_hold; - unsigned turn_around; - enum { - ASYNC_EMIF_8 = 0, - ASYNC_EMIF_16 = 1, - ASYNC_EMIF_32 = 2, - } width; -}; - -void init_async_emif(int num_cs, struct async_emif_config *config); - -int wdt_start(unsigned long msecs); -int wdt_stop(void); -int wdt_kick(void); - -#endif - -/* Chip configuration unlock codes and registers */ -#define TNETV107X_KICK0 (TNETV107X_CHIP_CONFIG_SYS_BASE+0x38) -#define TNETV107X_KICK1 (TNETV107X_CHIP_CONFIG_SYS_BASE+0x3c) -#define TNETV107X_PINMUX(n) (TNETV107X_CHIP_CONFIG_SYS_BASE+0x150+(n)*4) -#define TNETV107X_KICK0_MAGIC 0x83e70b13 -#define TNETV107X_KICK1_MAGIC 0x95a4f1e0 - -/* Module base addresses */ -#define TNETV107X_TPCC_BASE 0x01C00000 -#define TNETV107X_TPTC0_BASE 0x01C10000 -#define TNETV107X_TPTC1_BASE 0x01C10400 -#define TNETV107X_INTC_BASE 0x03000000 -#define TNETV107X_LCD_CONTROLLER_BASE 0x08030000 -#define TNETV107X_INTD_BASE 0x08038000 -#define TNETV107X_INTD_IPC_BASE 0x08038000 -#define TNETV107X_INTD_FAST_BASE 0x08039000 -#define TNETV107X_INTD_ASYNC_BASE 0x0803A000 -#define TNETV107X_INTD_SLOW_BASE 0x0803B000 -#define TNETV107X_PKA_BASE 0x08040000 -#define TNETV107X_RNG_BASE 0x08044000 -#define TNETV107X_TIMER0_BASE 0x08086500 -#define TNETV107X_TIMER1_BASE 0x08086600 -#define TNETV107X_WDT0_ARM_BASE 0x08086700 -#define TNETV107X_WDT1_DSP_BASE 0x08086800 -#define TNETV107X_CHIP_CONFIG_SYS_BASE 0x08087000 -#define TNETV107X_GPIO_BASE 0x08088000 -#define TNETV107X_UART1_BASE 0x08088400 -#define TNETV107X_TOUCHSCREEN_BASE 0x08088500 -#define TNETV107X_SDIO0_BASE 0x08088700 -#define TNETV107X_SDIO1_BASE 0x08088800 -#define TNETV107X_MDIO_BASE 0x08088900 -#define TNETV107X_KEYPAD_BASE 0x08088A00 -#define TNETV107X_SSP_BASE 0x08088C00 -#define TNETV107X_CLOCK_CONTROL_BASE 0x0808A000 -#define TNETV107X_PSC_BASE 0x0808B000 -#define TNETV107X_TDM0_BASE 0x08100000 -#define TNETV107X_TDM1_BASE 0x08100100 -#define TNETV107X_MCDMA_BASE 0x08108000 -#define TNETV107X_UART0_DMA_BASE 0x08108200 -#define TNETV107X_USBSS_BASE 0x08120000 -#define TNETV107X_VLYNQ_CONTROL_BASE 0x0810D000 -#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000 -#define TNETV107X_VLYNQ_MEM_MAP_BASE 0x0C000000 -#define TNETV107X_IMCOP_BASE 0x01CC0000 -#define TNETV107X_MBX_LITE_BASE 0x07000000 -#define TNETV107X_ETHSS_BASE 0x0803C000 -#define TNETV107X_CPSW_BASE 0x0803C000 -#define TNETV107X_SPF_BASE 0x0803C800 -#define TNETV107X_IOPU_ETHSS_BASE 0x0803D000 -#define TNETV107X_VTP_CNTRL_0 0x0803D800 -#define TNETV107X_VTP_CNTRL_1 0x0803D900 -#define TNETV107X_UART2_DMA_BASE 0x08108400 -#define TNETV107X_INTERNAL_MEMORY 0x20000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000 -#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000 -#define TNETV107X_DDR_EMIF_DATA_BASE 0x80000000 -#define TNETV107X_DDR_EMIF_CONTROL_BASE 0x90000000 - -/* LPSC module definitions */ -#define TNETV107X_LPSC_ARM 0 -#define TNETV107X_LPSC_GEM 1 -#define TNETV107X_LPSC_DDR2_PHY 2 -#define TNETV107X_LPSC_TPCC 3 -#define TNETV107X_LPSC_TPTC0 4 -#define TNETV107X_LPSC_TPTC1 5 -#define TNETV107X_LPSC_RAM 6 -#define TNETV107X_LPSC_MBX_LITE 7 -#define TNETV107X_LPSC_LCD 8 -#define TNETV107X_LPSC_ETHSS 9 -#define TNETV107X_LPSC_AEMIF 10 -#define TNETV107X_LPSC_CHIP_CFG 11 -#define TNETV107X_LPSC_TSC 12 -#define TNETV107X_LPSC_ROM 13 -#define TNETV107X_LPSC_UART2 14 -#define TNETV107X_LPSC_PKTSEC 15 -#define TNETV107X_LPSC_SECCTL 16 -#define TNETV107X_LPSC_KEYMGR 17 -#define TNETV107X_LPSC_KEYPAD 18 -#define TNETV107X_LPSC_GPIO 19 -#define TNETV107X_LPSC_MDIO 20 -#define TNETV107X_LPSC_SDIO0 21 -#define TNETV107X_LPSC_UART0 22 -#define TNETV107X_LPSC_UART1 23 -#define TNETV107X_LPSC_TIMER0 24 -#define TNETV107X_LPSC_TIMER1 25 -#define TNETV107X_LPSC_WDT_ARM 26 -#define TNETV107X_LPSC_WDT_DSP 27 -#define TNETV107X_LPSC_SSP 28 -#define TNETV107X_LPSC_TDM0 29 -#define TNETV107X_LPSC_VLYNQ 30 -#define TNETV107X_LPSC_MCDMA 31 -#define TNETV107X_LPSC_USB0 32 -#define TNETV107X_LPSC_TDM1 33 -#define TNETV107X_LPSC_DEBUGSS 34 -#define TNETV107X_LPSC_ETHSS_RGMII 35 -#define TNETV107X_LPSC_SYSTEM 36 -#define TNETV107X_LPSC_IMCOP 37 -#define TNETV107X_LPSC_SPARE 38 -#define TNETV107X_LPSC_SDIO1 39 -#define TNETV107X_LPSC_USB1 40 -#define TNETV107X_LPSC_USBSS 41 -#define TNETV107X_LPSC_DDR2_EMIF1_VRST 42 -#define TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST 43 -#define TNETV107X_LPSC_MAX 44 - -/* Interrupt controller */ -#define INTC_GLB_EN (TNETV107X_INTC_BASE + 0x10) -#define INTC_HINT_EN (TNETV107X_INTC_BASE + 0x1500) -#define INTC_EN_CLR0 (TNETV107X_INTC_BASE + 0x380) - -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-tnetv107x/mux.h b/arch/arm/include/asm/arch-tnetv107x/mux.h deleted file mode 100644 index 3f832c4147..0000000000 --- a/arch/arm/include/asm/arch-tnetv107x/mux.h +++ /dev/null @@ -1,291 +0,0 @@ -/* - * TNETV107X: Pinmux APIs - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __ASM_ARCH_MUX_H -#define __ASM_ARCH_MUX_H - -struct pin_config { - unsigned char reg_index; - unsigned char mask_offset; - unsigned char mode; -}; - -#define TNETV107X_MUX_CFG(reg, offset, mux_mode) \ - { reg, offset, mux_mode } - -int mux_select_pin(short index); -int mux_select_pins(const short *pins); - -enum tnetv107x_pin_mux_index { - TNETV107X_PIN_ASR_A00, - TNETV107X_PIN_GPIO32, - TNETV107X_PIN_ASR_A01, - TNETV107X_PIN_GPIO33, - TNETV107X_PIN_ASR_A02, - TNETV107X_PIN_GPIO34, - TNETV107X_PIN_ASR_A03, - TNETV107X_PIN_GPIO35, - TNETV107X_PIN_ASR_A04, - TNETV107X_PIN_GPIO36, - TNETV107X_PIN_ASR_A05, - TNETV107X_PIN_GPIO37, - TNETV107X_PIN_ASR_A06, - TNETV107X_PIN_GPIO38, - TNETV107X_PIN_ASR_A07, - TNETV107X_PIN_GPIO39, - TNETV107X_PIN_ASR_A08, - TNETV107X_PIN_GPIO40, - TNETV107X_PIN_ASR_A09, - TNETV107X_PIN_GPIO41, - TNETV107X_PIN_ASR_A10, - TNETV107X_PIN_GPIO42, - TNETV107X_PIN_ASR_A11, - TNETV107X_PIN_BOOT_STRP_0, - TNETV107X_PIN_ASR_A12, - TNETV107X_PIN_BOOT_STRP_1, - TNETV107X_PIN_ASR_A13, - TNETV107X_PIN_GPIO43, - TNETV107X_PIN_ASR_A14, - TNETV107X_PIN_GPIO44, - TNETV107X_PIN_ASR_A15, - TNETV107X_PIN_GPIO45, - TNETV107X_PIN_ASR_A16, - TNETV107X_PIN_GPIO46, - TNETV107X_PIN_ASR_A17, - TNETV107X_PIN_GPIO47, - TNETV107X_PIN_ASR_A18, - TNETV107X_PIN_GPIO48, - TNETV107X_PIN_SDIO1_DATA3_0, - TNETV107X_PIN_ASR_A19, - TNETV107X_PIN_GPIO49, - TNETV107X_PIN_SDIO1_DATA2_0, - TNETV107X_PIN_ASR_A20, - TNETV107X_PIN_GPIO50, - TNETV107X_PIN_SDIO1_DATA1_0, - TNETV107X_PIN_ASR_A21, - TNETV107X_PIN_GPIO51, - TNETV107X_PIN_SDIO1_DATA0_0, - TNETV107X_PIN_ASR_A22, - TNETV107X_PIN_GPIO52, - TNETV107X_PIN_SDIO1_CMD_0, - TNETV107X_PIN_ASR_A23, - TNETV107X_PIN_GPIO53, - TNETV107X_PIN_SDIO1_CLK_0, - TNETV107X_PIN_ASR_BA_1, - TNETV107X_PIN_GPIO54, - TNETV107X_PIN_SYS_PLL_CLK, - TNETV107X_PIN_ASR_CS0, - TNETV107X_PIN_ASR_CS1, - TNETV107X_PIN_ASR_CS2, - TNETV107X_PIN_TDM_PLL_CLK, - TNETV107X_PIN_ASR_CS3, - TNETV107X_PIN_ETH_PHY_CLK, - TNETV107X_PIN_ASR_D00, - TNETV107X_PIN_GPIO55, - TNETV107X_PIN_ASR_D01, - TNETV107X_PIN_GPIO56, - TNETV107X_PIN_ASR_D02, - TNETV107X_PIN_GPIO57, - TNETV107X_PIN_ASR_D03, - TNETV107X_PIN_GPIO58, - TNETV107X_PIN_ASR_D04, - TNETV107X_PIN_GPIO59_0, - TNETV107X_PIN_ASR_D05, - TNETV107X_PIN_GPIO60_0, - TNETV107X_PIN_ASR_D06, - TNETV107X_PIN_GPIO61_0, - TNETV107X_PIN_ASR_D07, - TNETV107X_PIN_GPIO62_0, - TNETV107X_PIN_ASR_D08, - TNETV107X_PIN_GPIO63_0, - TNETV107X_PIN_ASR_D09, - TNETV107X_PIN_GPIO64_0, - TNETV107X_PIN_ASR_D10, - TNETV107X_PIN_SDIO1_DATA3_1, - TNETV107X_PIN_ASR_D11, - TNETV107X_PIN_SDIO1_DATA2_1, - TNETV107X_PIN_ASR_D12, - TNETV107X_PIN_SDIO1_DATA1_1, - TNETV107X_PIN_ASR_D13, - TNETV107X_PIN_SDIO1_DATA0_1, - TNETV107X_PIN_ASR_D14, - TNETV107X_PIN_SDIO1_CMD_1, - TNETV107X_PIN_ASR_D15, - TNETV107X_PIN_SDIO1_CLK_1, - TNETV107X_PIN_ASR_OE, - TNETV107X_PIN_BOOT_STRP_2, - TNETV107X_PIN_ASR_RNW, - TNETV107X_PIN_GPIO29_0, - TNETV107X_PIN_ASR_WAIT, - TNETV107X_PIN_GPIO30_0, - TNETV107X_PIN_ASR_WE, - TNETV107X_PIN_BOOT_STRP_3, - TNETV107X_PIN_ASR_WE_DQM0, - TNETV107X_PIN_GPIO31, - TNETV107X_PIN_LCD_PD17_0, - TNETV107X_PIN_ASR_WE_DQM1, - TNETV107X_PIN_ASR_BA0_0, - TNETV107X_PIN_VLYNQ_CLK, - TNETV107X_PIN_GPIO14, - TNETV107X_PIN_LCD_PD19_0, - TNETV107X_PIN_VLYNQ_RXD0, - TNETV107X_PIN_GPIO15, - TNETV107X_PIN_LCD_PD20_0, - TNETV107X_PIN_VLYNQ_RXD1, - TNETV107X_PIN_GPIO16, - TNETV107X_PIN_LCD_PD21_0, - TNETV107X_PIN_VLYNQ_TXD0, - TNETV107X_PIN_GPIO17, - TNETV107X_PIN_LCD_PD22_0, - TNETV107X_PIN_VLYNQ_TXD1, - TNETV107X_PIN_GPIO18, - TNETV107X_PIN_LCD_PD23_0, - TNETV107X_PIN_SDIO0_CLK, - TNETV107X_PIN_GPIO19, - TNETV107X_PIN_SDIO0_CMD, - TNETV107X_PIN_GPIO20, - TNETV107X_PIN_SDIO0_DATA0, - TNETV107X_PIN_GPIO21, - TNETV107X_PIN_SDIO0_DATA1, - TNETV107X_PIN_GPIO22, - TNETV107X_PIN_SDIO0_DATA2, - TNETV107X_PIN_GPIO23, - TNETV107X_PIN_SDIO0_DATA3, - TNETV107X_PIN_GPIO24, - TNETV107X_PIN_EMU0, - TNETV107X_PIN_EMU1, - TNETV107X_PIN_RTCK, - TNETV107X_PIN_TRST_N, - TNETV107X_PIN_TCK, - TNETV107X_PIN_TDI, - TNETV107X_PIN_TDO, - TNETV107X_PIN_TMS, - TNETV107X_PIN_TDM1_CLK, - TNETV107X_PIN_TDM1_RX, - TNETV107X_PIN_TDM1_TX, - TNETV107X_PIN_TDM1_FS, - TNETV107X_PIN_KEYPAD_R0, - TNETV107X_PIN_KEYPAD_R1, - TNETV107X_PIN_KEYPAD_R2, - TNETV107X_PIN_KEYPAD_R3, - TNETV107X_PIN_KEYPAD_R4, - TNETV107X_PIN_KEYPAD_R5, - TNETV107X_PIN_KEYPAD_R6, - TNETV107X_PIN_GPIO12, - TNETV107X_PIN_KEYPAD_R7, - TNETV107X_PIN_GPIO10, - TNETV107X_PIN_KEYPAD_C0, - TNETV107X_PIN_KEYPAD_C1, - TNETV107X_PIN_KEYPAD_C2, - TNETV107X_PIN_KEYPAD_C3, - TNETV107X_PIN_KEYPAD_C4, - TNETV107X_PIN_KEYPAD_C5, - TNETV107X_PIN_KEYPAD_C6, - TNETV107X_PIN_GPIO13, - TNETV107X_PIN_TEST_CLK_IN, - TNETV107X_PIN_KEYPAD_C7, - TNETV107X_PIN_GPIO11, - TNETV107X_PIN_SSP0_0, - TNETV107X_PIN_SCC_DCLK, - TNETV107X_PIN_LCD_PD20_1, - TNETV107X_PIN_SSP0_1, - TNETV107X_PIN_SCC_CS_N, - TNETV107X_PIN_LCD_PD21_1, - TNETV107X_PIN_SSP0_2, - TNETV107X_PIN_SCC_D, - TNETV107X_PIN_LCD_PD22_1, - TNETV107X_PIN_SSP0_3, - TNETV107X_PIN_SCC_RESETN, - TNETV107X_PIN_LCD_PD23_1, - TNETV107X_PIN_SSP1_0, - TNETV107X_PIN_GPIO25, - TNETV107X_PIN_UART2_CTS, - TNETV107X_PIN_SSP1_1, - TNETV107X_PIN_GPIO26, - TNETV107X_PIN_UART2_RD, - TNETV107X_PIN_SSP1_2, - TNETV107X_PIN_GPIO27, - TNETV107X_PIN_UART2_RTS, - TNETV107X_PIN_SSP1_3, - TNETV107X_PIN_GPIO28, - TNETV107X_PIN_UART2_TD, - TNETV107X_PIN_UART0_CTS, - TNETV107X_PIN_UART0_RD, - TNETV107X_PIN_UART0_RTS, - TNETV107X_PIN_UART0_TD, - TNETV107X_PIN_UART1_RD, - TNETV107X_PIN_UART1_TD, - TNETV107X_PIN_LCD_AC_NCS, - TNETV107X_PIN_LCD_HSYNC_RNW, - TNETV107X_PIN_LCD_VSYNC_A0, - TNETV107X_PIN_LCD_MCLK, - TNETV107X_PIN_LCD_PD16_0, - TNETV107X_PIN_LCD_PCLK_E, - TNETV107X_PIN_LCD_PD00, - TNETV107X_PIN_LCD_PD01, - TNETV107X_PIN_LCD_PD02, - TNETV107X_PIN_LCD_PD03, - TNETV107X_PIN_LCD_PD04, - TNETV107X_PIN_LCD_PD05, - TNETV107X_PIN_LCD_PD06, - TNETV107X_PIN_LCD_PD07, - TNETV107X_PIN_LCD_PD08, - TNETV107X_PIN_GPIO59_1, - TNETV107X_PIN_LCD_PD09, - TNETV107X_PIN_GPIO60_1, - TNETV107X_PIN_LCD_PD10, - TNETV107X_PIN_ASR_BA0_1, - TNETV107X_PIN_GPIO61_1, - TNETV107X_PIN_LCD_PD11, - TNETV107X_PIN_GPIO62_1, - TNETV107X_PIN_LCD_PD12, - TNETV107X_PIN_GPIO63_1, - TNETV107X_PIN_LCD_PD13, - TNETV107X_PIN_GPIO64_1, - TNETV107X_PIN_LCD_PD14, - TNETV107X_PIN_GPIO29_1, - TNETV107X_PIN_LCD_PD15, - TNETV107X_PIN_GPIO30_1, - TNETV107X_PIN_EINT0, - TNETV107X_PIN_GPIO08, - TNETV107X_PIN_EINT1, - TNETV107X_PIN_GPIO09, - TNETV107X_PIN_GPIO00, - TNETV107X_PIN_LCD_PD20_2, - TNETV107X_PIN_TDM_CLK_IN_2, - TNETV107X_PIN_GPIO01, - TNETV107X_PIN_LCD_PD21_2, - TNETV107X_PIN_24M_CLK_OUT_1, - TNETV107X_PIN_GPIO02, - TNETV107X_PIN_LCD_PD22_2, - TNETV107X_PIN_GPIO03, - TNETV107X_PIN_LCD_PD23_2, - TNETV107X_PIN_GPIO04, - TNETV107X_PIN_LCD_PD16_1, - TNETV107X_PIN_USB0_RXERR, - TNETV107X_PIN_GPIO05, - TNETV107X_PIN_LCD_PD17_1, - TNETV107X_PIN_TDM_CLK_IN_1, - TNETV107X_PIN_GPIO06, - TNETV107X_PIN_LCD_PD18, - TNETV107X_PIN_24M_CLK_OUT_2, - TNETV107X_PIN_GPIO07, - TNETV107X_PIN_LCD_PD19_1, - TNETV107X_PIN_USB1_RXERR, - TNETV107X_PIN_ETH_PLL_CLK, - TNETV107X_PIN_MDIO, - TNETV107X_PIN_MDC, - TNETV107X_PIN_AIC_MUTE_STAT_N, - TNETV107X_PIN_TDM0_CLK, - TNETV107X_PIN_AIC_HNS_EN_N, - TNETV107X_PIN_TDM0_FS, - TNETV107X_PIN_AIC_HDS_EN_STAT_N, - TNETV107X_PIN_TDM0_TX, - TNETV107X_PIN_AIC_HNF_EN_STAT_N, - TNETV107X_PIN_TDM0_RX, -}; - -#endif diff --git a/board/ti/tnetv107xevm/Kconfig b/board/ti/tnetv107xevm/Kconfig deleted file mode 100644 index 637f20e847..0000000000 --- a/board/ti/tnetv107xevm/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_TNETV107X_EVM - -config SYS_BOARD - default "tnetv107xevm" - -config SYS_VENDOR - default "ti" - -config SYS_SOC - default "tnetv107x" - -config SYS_CONFIG_NAME - default "tnetv107x_evm" - -endif diff --git a/board/ti/tnetv107xevm/MAINTAINERS b/board/ti/tnetv107xevm/MAINTAINERS deleted file mode 100644 index 8a92c6bf87..0000000000 --- a/board/ti/tnetv107xevm/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -TNETV107XEVM BOARD -#M: Chan-Taek Park -S: Orphan (since 2014-06) -F: board/ti/tnetv107xevm/ -F: include/configs/tnetv107x_evm.h -F: configs/tnetv107x_evm_defconfig diff --git a/board/ti/tnetv107xevm/Makefile b/board/ti/tnetv107xevm/Makefile deleted file mode 100644 index 0a6128f85f..0000000000 --- a/board/ti/tnetv107xevm/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += sdb_board.o diff --git a/board/ti/tnetv107xevm/config.mk b/board/ti/tnetv107xevm/config.mk deleted file mode 100644 index 51c2886b34..0000000000 --- a/board/ti/tnetv107xevm/config.mk +++ /dev/null @@ -1,5 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -CONFIG_SYS_TEXT_BASE = 0x83FC0000 diff --git a/board/ti/tnetv107xevm/sdb_board.c b/board/ti/tnetv107xevm/sdb_board.c deleted file mode 100644 index a84ec84bae..0000000000 --- a/board/ti/tnetv107xevm/sdb_board.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * TNETV107X-EVM: Board initialization - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = { - { /* CS0 */ - .mode = ASYNC_EMIF_MODE_NAND, - .wr_setup = 5, - .wr_strobe = 5, - .wr_hold = 2, - .rd_setup = 5, - .rd_strobe = 5, - .rd_hold = 2, - .turn_around = 5, - .width = ASYNC_EMIF_8, - }, - { /* CS1 */ - .mode = ASYNC_EMIF_MODE_NOR, - .wr_setup = 2, - .wr_strobe = 27, - .wr_hold = 4, - .rd_setup = 2, - .rd_strobe = 27, - .rd_hold = 4, - .turn_around = 2, - .width = ASYNC_EMIF_PRESERVE, - }, - { /* CS2 */ - .mode = ASYNC_EMIF_MODE_NOR, - .wr_setup = 2, - .wr_strobe = 27, - .wr_hold = 4, - .rd_setup = 2, - .rd_strobe = 27, - .rd_hold = 4, - .turn_around = 2, - .width = ASYNC_EMIF_PRESERVE, - }, - { /* CS3 */ - .mode = ASYNC_EMIF_MODE_NOR, - .wr_setup = 1, - .wr_strobe = 90, - .wr_hold = 3, - .rd_setup = 1, - .rd_strobe = 26, - .rd_hold = 3, - .turn_around = 1, - .width = ASYNC_EMIF_8, - }, -}; - -static struct pll_init_data pll_config[] = { - { - .pll = ETH_PLL, - .internal_osc = 1, - .pll_freq = 500000000, - .div_freq = { - 5000000, 50000000, 125000000, 250000000, 25000000, - }, - }, -}; - -static const short sdio1_pins[] = { - TNETV107X_PIN_SDIO1_CLK_1, TNETV107X_PIN_SDIO1_CMD_1, - TNETV107X_PIN_SDIO1_DATA0_1, TNETV107X_PIN_SDIO1_DATA1_1, - TNETV107X_PIN_SDIO1_DATA2_1, TNETV107X_PIN_SDIO1_DATA3_1, - -1 -}; - -static const short uart1_pins[] = { - TNETV107X_PIN_UART1_RD, TNETV107X_PIN_UART1_TD, -1 -}; - -static const short ssp_pins[] = { - TNETV107X_PIN_SSP0_0, TNETV107X_PIN_SSP0_1, TNETV107X_PIN_SSP0_2, - TNETV107X_PIN_SSP1_0, TNETV107X_PIN_SSP1_1, TNETV107X_PIN_SSP1_2, - TNETV107X_PIN_SSP1_3, -1 -}; - -int board_init(void) -{ -#ifndef CONFIG_USE_IRQ - __raw_writel(0, INTC_GLB_EN); /* Global disable */ - __raw_writel(0, INTC_HINT_EN); /* Disable host ints */ - __raw_writel(0, INTC_EN_CLR0 + 0); /* Clear enable */ - __raw_writel(0, INTC_EN_CLR0 + 4); /* Clear enable */ - __raw_writel(0, INTC_EN_CLR0 + 8); /* Clear enable */ -#endif - - gd->bd->bi_arch_number = MACH_TYPE_TNETV107X; - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - init_plls(ARRAY_SIZE(pll_config), pll_config); - - init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config); - - mux_select_pin(TNETV107X_PIN_ASR_CS3); - mux_select_pins(sdio1_pins); - mux_select_pins(uart1_pins); - mux_select_pins(ssp_pins); - - return 0; -} - -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - -#ifdef CONFIG_NAND_DAVINCI -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - - return 0; -} -#endif diff --git a/configs/tnetv107x_evm_defconfig b/configs/tnetv107x_evm_defconfig deleted file mode 100644 index b0915d2026..0000000000 --- a/configs/tnetv107x_evm_defconfig +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_TNETV107X_EVM=y diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 1528b9b928..766d7123e5 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +tnetv107x arm arm1176 - - Chan-Taek Park a320evb arm arm920t - - Po-Yu Chuang cm4008 arm arm920t - - Greg Ungerer cm41xx arm arm920t - - diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 1dc0f5aa10..482a4bd5be 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -10,7 +10,6 @@ obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 vf610 ls102xa)) obj-y += imx_watchdog.o endif -obj-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o obj-$(CONFIG_S5P) += s5p_wdt.o obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o obj-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o diff --git a/drivers/watchdog/tnetv107x_wdt.c b/drivers/watchdog/tnetv107x_wdt.c deleted file mode 100644 index 3d3f366c02..0000000000 --- a/drivers/watchdog/tnetv107x_wdt.c +++ /dev/null @@ -1,165 +0,0 @@ -/* - * TNETV107X: Watchdog timer implementation (for reset) - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#define MAX_DIV 0xFFFE0001 - -struct wdt_regs { - u32 kick_lock; -#define KICK_LOCK_1 0x5555 -#define KICK_LOCK_2 0xaaaa - u32 kick; - - u32 change_lock; -#define CHANGE_LOCK_1 0x6666 -#define CHANGE_LOCK_2 0xbbbb - u32 change; - - u32 disable_lock; -#define DISABLE_LOCK_1 0x7777 -#define DISABLE_LOCK_2 0xcccc -#define DISABLE_LOCK_3 0xdddd - u32 disable; - - u32 prescale_lock; -#define PRESCALE_LOCK_1 0x5a5a -#define PRESCALE_LOCK_2 0xa5a5 - u32 prescale; -}; - -static struct wdt_regs* regs = (struct wdt_regs *)TNETV107X_WDT0_ARM_BASE; - -#define wdt_reg_read(reg) __raw_readl(®s->reg) -#define wdt_reg_write(reg, val) __raw_writel((val), ®s->reg) - -static int write_prescale_reg(unsigned long prescale_value) -{ - wdt_reg_write(prescale_lock, PRESCALE_LOCK_1); - if ((wdt_reg_read(prescale_lock) & 0x3) != 0x1) - return -1; - - wdt_reg_write(prescale_lock, PRESCALE_LOCK_2); - if ((wdt_reg_read(prescale_lock) & 0x3) != 0x3) - return -1; - - wdt_reg_write(prescale, prescale_value); - - return 0; -} - -static int write_change_reg(unsigned long initial_timer_value) -{ - wdt_reg_write(change_lock, CHANGE_LOCK_1); - if ((wdt_reg_read(change_lock) & 0x3) != 0x1) - return -1; - - wdt_reg_write(change_lock, CHANGE_LOCK_2); - if ((wdt_reg_read(change_lock) & 0x3) != 0x3) - return -1; - - wdt_reg_write(change, initial_timer_value); - - return 0; -} - -static int wdt_control(unsigned long disable_value) -{ - wdt_reg_write(disable_lock, DISABLE_LOCK_1); - if ((wdt_reg_read(disable_lock) & 0x3) != 0x1) - return -1; - - wdt_reg_write(disable_lock, DISABLE_LOCK_2); - if ((wdt_reg_read(disable_lock) & 0x3) != 0x2) - return -1; - - wdt_reg_write(disable_lock, DISABLE_LOCK_3); - if ((wdt_reg_read(disable_lock) & 0x3) != 0x3) - return -1; - - wdt_reg_write(disable, disable_value); - return 0; -} - -static int wdt_set_period(unsigned long msec) -{ - unsigned long change_value, count_value; - unsigned long prescale_value = 1; - unsigned long refclk_khz, maxdiv; - int ret; - - refclk_khz = clk_get_rate(TNETV107X_LPSC_WDT_ARM); - maxdiv = (MAX_DIV / refclk_khz); - - if ((!msec) || (msec > maxdiv)) - return -1; - - count_value = refclk_khz * msec; - if (count_value > 0xffff) { - change_value = count_value / 0xffff + 1; - prescale_value = count_value / change_value; - } else { - change_value = count_value; - } - - ret = write_prescale_reg(prescale_value - 1); - if (ret) - return ret; - - ret = write_change_reg(change_value); - if (ret) - return ret; - - return 0; -} - -unsigned long last_wdt = -1; - -int wdt_start(unsigned long msecs) -{ - int ret; - ret = wdt_control(0); - if (ret) - return ret; - ret = wdt_set_period(msecs); - if (ret) - return ret; - ret = wdt_control(1); - if (ret) - return ret; - ret = wdt_kick(); - last_wdt = msecs; - return ret; -} - -int wdt_stop(void) -{ - last_wdt = -1; - return wdt_control(0); -} - -int wdt_kick(void) -{ - wdt_reg_write(kick_lock, KICK_LOCK_1); - if ((wdt_reg_read(kick_lock) & 0x3) != 0x1) - return -1; - - wdt_reg_write(kick_lock, KICK_LOCK_2); - if ((wdt_reg_read(kick_lock) & 0x3) != 0x3) - return -1; - - wdt_reg_write(kick, 1); - return 0; -} - -void reset_cpu(ulong addr) -{ - clk_enable(TNETV107X_LPSC_WDT_ARM); - wdt_start(1); - wdt_kick(); -} diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h deleted file mode 100644 index 00a1a9e002..0000000000 --- a/include/configs/tnetv107x_evm.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * Copyright (C) 2008 Texas Instruments, Inc - * - * Based on davinci_dvevm.h. Original Copyrights follow: - * - * Copyright (C) 2007 Sergey Kubushyn - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include -#include -#include - -/* Architecture, CPU, etc */ -#define CONFIG_TNETV107X -#define CONFIG_TNETV107X_EVM -#define CONFIG_TNETV107X_WATCHDOG -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_DISABLE_TCM -#define CONFIG_PERIPORT_REMAP -#define CONFIG_PERIPORT_BASE 0x2000000 -#define CONFIG_PERIPORT_SIZE 0x10 -#define CONFIG_SYS_CLK_FREQ clk_get_rate(TNETV107X_LPSC_ARM) - -#define CONFIG_SYS_TIMERBASE TNETV107X_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get_rate(TNETV107X_LPSC_TIMER0) - -#define CONFIG_PLL_SYS_EXT_FREQ 25000000 -#define CONFIG_PLL_TDM_EXT_FREQ 19200000 -#define CONFIG_PLL_ETH_EXT_FREQ 25000000 - -/* Memory Info */ -#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) -#define PHYS_SDRAM_1 TNETV107X_DDR_EMIF_DATA_BASE -#define PHYS_SDRAM_1_SIZE 0x04000000 -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* Serial Driver Info */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_COM1 TNETV107X_UART1_BASE -#define CONFIG_SYS_NS16550_CLK clk_get_rate(TNETV107X_LPSC_UART1) -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* Flash and environment info */ -#define CONFIG_SYS_NO_FLASH -#define CONFIG_ENV_IS_IN_NAND -#define CONFIG_NAND_DAVINCI -#define CONFIG_ENV_SIZE (SZ_128K) -#define CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_NAND_1BIT_ECC -#define CONFIG_SYS_NAND_CS 2 -#define CONFIG_SYS_NAND_USE_FLASH_BBT -#define CONFIG_SYS_NAND_BASE TNETV107X_ASYNC_EMIF_DATA_CE0_BASE -#define CONFIG_SYS_NAND_MASK_CLE 0x10 -#define CONFIG_SYS_NAND_MASK_ALE 0x8 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_MTD_PARTITIONS -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_DEVICE -#define CONFIG_JFFS2_NAND -#define CONFIG_ENV_OFFSET 0x180000 - -/* - * davinci_nand is a bit of a misnomer since this particular EMIF block is - * commonly used across multiple TI devices. Unfortunately, this misnomer - * (amongst others) carries forward into the kernel too. Consequently, if we - * use a different device name here, the mtdparts variable won't be usable as - * a kernel command-line argument. - */ -#define MTDIDS_DEFAULT "nand0=davinci_nand.0" -#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \ - "1536k(uboot)ro," \ - "128k(params)ro," \ - "4m(kernel)," \ - "-(filesystem)" - -/* General U-Boot configuration */ -#define CONFIG_BOOTFILE "uImage" -#define CONFIG_SYS_PROMPT "U-Boot > " -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 64 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_VERSION_VARIABLE -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY -#define CONFIG_MX_CYCLIC -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + \ - 0x700000) -#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTARGS "mem=32M console=ttyS1,115200n8 " \ - "root=/dev/mmcblk0p1 rw noinitrd" -#define CONFIG_BOOTCOMMAND "" -#define CONFIG_BOOTDELAY 1 - -#define CONFIG_CMD_BDI -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_EDITENV -#define CONFIG_CMD_IMI -#define CONFIG_CMD_ITEST -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_SOURCE -#define CONFIG_CMD_ENV -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NAND -#define CONFIG_CMD_JFFS2 - -#endif /* __CONFIG_H */ From cb957cda2bedc31209f5c483cacb5ddc4f5754c8 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 24 Feb 2015 11:45:10 +0900 Subject: [PATCH 217/222] ARM: davinci: remove hawkboard support This is still a non-generic board. Signed-off-by: Masahiro Yamada Acked-by: Sughosh Ganu Cc: Syed Mohammed Khasim Acked-by: Marek Vasut --- arch/arm/mach-davinci/Kconfig | 4 - board/davinci/da8xxevm/Kconfig | 13 -- board/davinci/da8xxevm/MAINTAINERS | 8 - board/davinci/da8xxevm/Makefile | 1 - board/davinci/da8xxevm/README.hawkboard | 92 -------- board/davinci/da8xxevm/hawkboard-ais-nand.cfg | 4 - board/davinci/da8xxevm/hawkboard.c | 120 ---------- board/davinci/da8xxevm/u-boot-spl-hawk.lds | 69 ------ configs/hawkboard_defconfig | 4 - configs/hawkboard_uart_defconfig | 5 - doc/README.scrapyard | 1 + include/configs/hawkboard.h | 220 ------------------ 12 files changed, 1 insertion(+), 540 deletions(-) delete mode 100644 board/davinci/da8xxevm/README.hawkboard delete mode 100644 board/davinci/da8xxevm/hawkboard-ais-nand.cfg delete mode 100644 board/davinci/da8xxevm/hawkboard.c delete mode 100644 board/davinci/da8xxevm/u-boot-spl-hawk.lds delete mode 100644 configs/hawkboard_defconfig delete mode 100644 configs/hawkboard_uart_defconfig delete mode 100644 include/configs/hawkboard.h diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 613f04d8b0..68277217bf 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -21,10 +21,6 @@ config TARGET_CAM_ENC_4XX bool "CAM ENC 4xx board" select SUPPORT_SPL -config TARGET_HAWKBOARD - bool "Hawkboard" - select SUPPORT_SPL - config TARGET_DAVINCI_DM355EVM bool "DM355 EVM board" diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig index 1a841ce6e0..1108e4b164 100644 --- a/board/davinci/da8xxevm/Kconfig +++ b/board/davinci/da8xxevm/Kconfig @@ -23,16 +23,3 @@ config SYS_CONFIG_NAME default "da850evm" endif - -if TARGET_HAWKBOARD - -config SYS_BOARD - default "da8xxevm" - -config SYS_VENDOR - default "davinci" - -config SYS_CONFIG_NAME - default "hawkboard" - -endif diff --git a/board/davinci/da8xxevm/MAINTAINERS b/board/davinci/da8xxevm/MAINTAINERS index dd66f07e72..10c4e2ffc0 100644 --- a/board/davinci/da8xxevm/MAINTAINERS +++ b/board/davinci/da8xxevm/MAINTAINERS @@ -12,11 +12,3 @@ F: include/configs/da850evm.h F: configs/da850_am18xxevm_defconfig F: configs/da850evm_defconfig F: configs/da850evm_direct_nor_defconfig - -HAWKBOARD BOARD -M: Syed Mohammed Khasim -M: Sughosh Ganu -S: Maintained -F: include/configs/hawkboard.h -F: configs/hawkboard_defconfig -F: configs/hawkboard_uart_defconfig diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile index d3acacc33d..4da509b5e1 100644 --- a/board/davinci/da8xxevm/Makefile +++ b/board/davinci/da8xxevm/Makefile @@ -9,4 +9,3 @@ obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o -obj-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o diff --git a/board/davinci/da8xxevm/README.hawkboard b/board/davinci/da8xxevm/README.hawkboard deleted file mode 100644 index d6ae02ec02..0000000000 --- a/board/davinci/da8xxevm/README.hawkboard +++ /dev/null @@ -1,92 +0,0 @@ -Summary -======= -The README is for the boot procedure used for TI's OMAP-L138 based -hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB -DDR SDRAM along with a host of other controllers. - -The hawkboard is booted in three stages. The initial bootloader which -executes upon reset is the Rom Boot Loader(RBL) which sits in the -internal ROM of the omap. The RBL initialises the memory and the nand -controller, and copies the image stored at a predefined location(block -1) of the nand flash. The image loaded by the RBL to the memory is the -AIS signed spl image. This, in turns copies the u-boot binary from the -nand flash to the memory and jumps to the u-boot entry point. - -AIS is an image format defined by TI for the images that are to be -loaded to memory by the RBL. The image is divided into a series of -sections and the image's entry point is specified. Each section comes -with meta data like the target address the section is to be copied to -and the size of the section, which is used by the RBL to load the -image. At the end of the image the RBL jumps to the image entry -point. - -The secondary stage bootloader(spl) which is loaded by the RBL then -loads the u-boot from a predefined location in the nand to the memory -and jumps to the u-boot entry point. - -The reason a secondary stage bootloader is used is because the ECC -layout expected by the RBL is not the same as that used by -u-boot/linux. This also implies that for flashing the spl image,we -need to use the u-boot which uses the ECC layout expected by the -RBL[1]. Booting u-boot over UART(UART boot) is explained here[2]. - - -Compilation -=========== -Three images might be needed - -* spl - This is the secondary bootloader which boots the u-boot - binary. - -* u-boot binary - This is the image flashed to the nand and copied to - the memory by the spl. - - Both the images get compiled with hawkboard_config, with the TOPDIR - containing the u-boot images, and the spl image under the spl - directory. - - The spl image needs to be processed with the AISGen tool for - generating the AIS signed image to be flashed. Steps for generating - the AIS image are explained here[3]. - -* u-boot for uart boot - This is same as the u-boot binary generated - above, with the sole difference of the CONFIG_SYS_TEXT_BASE being - 0xc1080000, as expected by the RBL. - - hawkboard_uart_config - - -Flashing the images to Nand -=========================== -The spl AIS image needs to be flashed to the block 1 of the Nand -flash, as that is the location the RBL expects the image[4]. For -flashing the spl, boot over the u-boot specified in [1], and flash the -image - -=> tftpboot 0xc0700000 -=> nand erase 0x20000 0x20000 -=> nand write.e 0xc0700000 0x20000 - -The u-boot binary is flashed at location 0xe0000(block 6) of the nand -flash. The spl loader expects the u-boot at this location. For -flashing the u-boot binary - -=> tftpboot 0xc0700000 u-boot.bin -=> nand erase 0xe0000 0x40000 -=> nand write.e 0xc0700000 0xe0000 - - -Links -===== - -[1] - http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1.bin - -[2] - http://elinux.org/Hawkboard#Booting_u-boot_over_UART - -[3] - http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot - -[4] - http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_booting_from_NAND_and_ECC.2FBad_blocks diff --git a/board/davinci/da8xxevm/hawkboard-ais-nand.cfg b/board/davinci/da8xxevm/hawkboard-ais-nand.cfg deleted file mode 100644 index 2b12b6c08a..0000000000 --- a/board/davinci/da8xxevm/hawkboard-ais-nand.cfg +++ /dev/null @@ -1,4 +0,0 @@ -# PLL0CFG0 PLL0CFG1 -PLL0 0x00180001 0x00000205 -# PLL1CFG0 PLL1CFG1 DRPYC1R SDCR SDTIMR1 SDTIMR2 SDRCR CLK2XSRC -DDR2 0x15010001 0x00000002 0x00000043 0x00134632 0x26492a09 0x7d13c722 0x00000249 0x00000000 diff --git a/board/davinci/da8xxevm/hawkboard.c b/board/davinci/da8xxevm/hawkboard.c deleted file mode 100644 index d5992a5564..0000000000 --- a/board/davinci/da8xxevm/hawkboard.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Modified for Hawkboard - Syed Mohammed Khasim - * - * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. - * Copyright (C) 2007 Sergey Kubushyn - * Copyright (C) 2004 Texas Instruments. - * Copyright (C) 2012 Sughosh Ganu . - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -const struct pinmux_resource pinmuxes[] = { - PINMUX_ITEM(emac_pins_mii), - PINMUX_ITEM(emac_pins_mdio), - PINMUX_ITEM(emifa_pins_cs3), - PINMUX_ITEM(emifa_pins_cs4), - PINMUX_ITEM(emifa_pins_nand), - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(uart2_pins_rtscts), -}; - -const int pinmuxes_size = ARRAY_SIZE(pinmuxes); - -const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -}; - -const int lpsc_size = ARRAY_SIZE(lpsc); - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - return 0; -} - -int board_early_init_f(void) -{ - /* - * Kick Registers need to be set to allow access to Pin Mux registers - */ - writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); - writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); - - /* set cfgchip3 to select mii */ - writel(readl(&davinci_syscfg_regs->cfgchip3) & - ~(1 << 8), &davinci_syscfg_regs->cfgchip3); - - return 0; -} - -int misc_init_r(void) -{ - char buf[32]; - - printf("ARM Clock : %s MHz\n", - strmhz(buf, clk_get(DAVINCI_ARM_CLKID))); - - return 0; -} - -int usb_phy_on(void) -{ - u32 timeout; - u32 cfgchip2; - - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); - - cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | - CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ | - CFGCHIP2_USB1PHYCLKMUX); - cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | - CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX | - CFGCHIP2_USB1SUSPENDM; - - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); - - /* wait until the usb phy pll locks */ - timeout = DA8XX_USB_OTG_TIMEOUT; - while (timeout--) - if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) - return 1; - - /* USB phy was not turned on */ - return 0; -} - -void usb_phy_off(void) -{ - u32 cfgchip2; - - /* - * Power down the on-chip PHY. - */ - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); - cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM); - cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET; - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); -} diff --git a/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/board/davinci/da8xxevm/u-boot-spl-hawk.lds deleted file mode 100644 index 5c629db139..0000000000 --- a/board/davinci/da8xxevm/u-boot-spl-hawk.lds +++ /dev/null @@ -1,69 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0xc1080000; - - . = ALIGN(4); - .text : - { - *(.vectors) - arch/arm/cpu/arm926ejs/start.o (.text*) - arch/arm/cpu/arm926ejs/built-in.o (.text*) - drivers/mtd/nand/built-in.o (.text*) - - *(.text*) - } - - . = ALIGN(4); - .rodata : { *(.rodata*) } - - . = ALIGN(4); - .data : { - *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) - } - - . = ALIGN(4); - __image_copy_end = .; - __rel_dyn_start = .; - __rel_dyn_end = .; - - __got_start = .; - . = ALIGN(4); - .got : { *(.got) } - - __got_end = .; - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end = .; - } - - .end : - { - *(.__end) - } -} diff --git a/configs/hawkboard_defconfig b/configs/hawkboard_defconfig deleted file mode 100644 index 4084f9c019..0000000000 --- a/configs/hawkboard_defconfig +++ /dev/null @@ -1,4 +0,0 @@ -CONFIG_SPL=y -+S:CONFIG_ARM=y -+S:CONFIG_ARCH_DAVINCI=y -+S:CONFIG_TARGET_HAWKBOARD=y diff --git a/configs/hawkboard_uart_defconfig b/configs/hawkboard_uart_defconfig deleted file mode 100644 index d7eeae7a29..0000000000 --- a/configs/hawkboard_uart_defconfig +++ /dev/null @@ -1,5 +0,0 @@ -CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="UART_U_BOOT" -+S:CONFIG_ARM=y -+S:CONFIG_ARCH_DAVINCI=y -+S:CONFIG_TARGET_HAWKBOARD=y diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 766d7123e5..cd8f4aeaf3 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +hawkboard arm arm926ejs - - Syed Mohammed Khasim :Sughosh Ganu tnetv107x arm arm1176 - - Chan-Taek Park a320evb arm arm920t - - Po-Yu Chuang cm4008 arm arm920t - - Greg Ungerer diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h deleted file mode 100644 index 1d78e725e3..0000000000 --- a/include/configs/hawkboard.h +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Based on davinci_dvevm.h. Original Copyrights follow: - * - * Copyright (C) 2007 Sergey Kubushyn - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Board - */ -#define CONFIG_SYS_USE_NAND 1 - -/* - * SoC Configuration - */ -#define CONFIG_MACH_DAVINCI_HAWK -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ -#define CONFIG_SOC_DA850 /* TI DA850 SoC */ -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) -#define CONFIG_SYS_OSCIN_FREQ 24000000 -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg" - -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ - DAVINCI_SYSCFG_SUSPSRC_EMAC | \ - DAVINCI_SYSCFG_SUSPSRC_I2C | \ - DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ - DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ - DAVINCI_SYSCFG_SUSPSRC_UART2) - -#if defined(CONFIG_UART_U_BOOT) -#define CONFIG_SYS_TEXT_BASE 0xc1080000 -#elif !defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_TEXT_BASE 0xc1180000 -#endif - -/* Spl */ -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds" -#define CONFIG_SPL_TEXT_BASE 0xc1080000 -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR - -/* - * Memory Info - */ -#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */ -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE -#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN 0x60000 - -/* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) - -/* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) - -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - -/* - * Serial Driver info - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* - * Network & Ethernet Configuration - */ -#define CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 - -/* - * Nand Flash - */ -#ifdef CONFIG_SYS_USE_NAND -#define CONFIG_SYS_NO_FLASH -#define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE -#define CONFIG_CLE_MASK 0x10 -#define CONFIG_ALE_MASK 0x8 -#define CONFIG_SYS_NAND_USE_FLASH_BBT -#define CONFIG_NAND_DAVINCI -#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST -#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */ -#define CFG_DAVINCI_STD_NAND_LAYOUT -#define CONFIG_SYS_NAND_CS 3 -#define CONFIG_SYS_NAND_PAGE_2K -/* Max number of NAND devices */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, } -/* Block 0--not used by bootcode */ -#define CONFIG_ENV_OFFSET 0x0 - -#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000 -#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ - CONFIG_SYS_NAND_U_BOOT_SIZE - \ - CONFIG_SYS_MALLOC_LEN - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_NAND_ECCPOS { \ - 24, 25, 26, 27, 28, \ - 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ - 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ - 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ - 59, 60, 61, 62, 63 } -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 10 -#define CONFIG_SYS_NAND_OOBSIZE 64 - -#endif /* CONFIG_SYS_USE_NAND */ - -/* USB Configs */ -#define CONFIG_SYS_USB_OHCI_CPU_INIT -#define CONFIG_USB_OHCI_NEW -#define CONFIG_USB_OHCI_DA8XX -#define CONFIG_USB_STORAGE -#define CONFIG_DOS_PARTITION -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000 -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard" - -/* - * U-Boot general configuration - */ -#define CONFIG_MISC_INIT_R -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_VERSION_VARIABLE -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY -#define CONFIG_MX_CYCLIC - -/* - * Linux Information - */ -#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTARGS \ - "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\ - "4M ip=static" -#define CONFIG_BOOTDELAY 3 - -/* - * U-Boot commands - */ -#include -#define CONFIG_CMD_ENV -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_SAVES -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_USB -#define CONFIG_CMD_EXT2 - -#ifdef CONFIG_CMD_BDI -#define CONFIG_CLOCKS -#endif - -#ifdef CONFIG_SYS_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS -#define CONFIG_CMD_NAND -#endif - -#ifndef CONFIG_DRIVER_TI_EMAC -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_PING -#endif - -#endif /* __CONFIG_H */ From 87db635161e86670f9c1119a1faf1d5059564989 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 23 Feb 2015 08:51:36 -0300 Subject: [PATCH 218/222] mx31ads: Convert to generic board Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Acked-by: Anatolij Gustschin Signed-off-by: Fabio Estevam --- include/configs/mx31ads.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 0f4bd91c64..bed071fa66 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -14,6 +14,8 @@ /* High Level Configuration Options */ #define CONFIG_MX31 1 /* This is a mx31 */ +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO From 9d4a161046284774ef3f85f7b94d5ed7ee85c808 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 23 Feb 2015 08:51:37 -0300 Subject: [PATCH 219/222] imx31_phycore: Convert to generic board Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Acked-by: Anatolij Gustschin Signed-off-by: Fabio Estevam --- include/configs/imx31_phycore.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index 4195fa3533..49039d6dfb 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -18,6 +18,8 @@ #define CONFIG_MX31 /* This is a mx31 */ #define CONFIG_MX31_CLK32 32000 +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO From 47d8ae4069b47ce966c0c5e0d8dd041e69ee1f86 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 23 Feb 2015 08:51:38 -0300 Subject: [PATCH 220/222] zmx25: Convert to generic board Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Cc: Matthias Weisser Signed-off-by: Fabio Estevam --- include/configs/zmx25.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 356ac886f2..342fa2c40a 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -15,6 +15,8 @@ #define CONFIG_MX25 #define CONFIG_SYS_TEXT_BASE 0xA0000000 +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_SYS_TIMER_RATE 32768 #define CONFIG_SYS_TIMER_COUNTER \ (&((struct gpt_regs *)IMX_GPT1_BASE)->counter) From 7ee8c4795d0ab0f1cd25496bfbcdedb184ef5a8d Mon Sep 17 00:00:00 2001 From: gaurav rana Date: Wed, 25 Feb 2015 09:37:09 +0530 Subject: [PATCH 221/222] crypto/fsl: Make function names consistent for blob encapsulation/decapsulation. This patch does the following: 1. The function names for encapsulation and decapsulation were inconsitent in freescale's implementation and cmd_blob file. This patch corrects the issues. 2. The function protopye is also modified to change the length parameter from u8 to u32 to allow encapsulation and decapsulation of larger images. 3. Modified the description of km paramter in the command usage for better readability. Signed-off-by: Gaurav Rana Reviewed-by: Ruchika Gupta Reviewed-by: York Sun --- common/cmd_blob.c | 18 ++++++++++-------- drivers/crypto/fsl/fsl_blob.c | 4 ++-- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/common/cmd_blob.c b/common/cmd_blob.c index 82ecaf09e5..d3f22a1afc 100644 --- a/common/cmd_blob.c +++ b/common/cmd_blob.c @@ -90,17 +90,19 @@ static char blob_help_text[] = "enc src dst len km - Encapsulate and create blob of data\n" " $len bytes long at address $src and\n" " store the result at address $dst.\n" - " $km is the 16 byte key modifier\n" - " is also required for generation/use as\n" - " key for cryptographic operation. Key\n" - " modifier should be 16 byte long.\n" + " $km is the address where the key\n" + " modifier is stored.\n" + " The modifier is required for generation\n" + " /use as key for cryptographic operation.\n" + " Key modifier should be 16 byte long.\n" "blob dec src dst len km - Decapsulate the blob of data at address\n" " $src and store result of $len byte at\n" " addr $dst.\n" - " $km is the 16 byte key modifier\n" - " is also required for generation/use as\n" - " key for cryptographic operation. Key\n" - " modifier should be 16 byte long.\n"; + " $km is the address where the key\n" + " modifier is stored.\n" + " The modifier is required for generation\n" + " /use as key for cryptographic operation.\n" + " Key modifier should be 16 byte long.\n"; U_BOOT_CMD( blob, 6, 1, do_blob, diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c index bc0107521c..9923bcbfe9 100644 --- a/drivers/crypto/fsl/fsl_blob.c +++ b/drivers/crypto/fsl/fsl_blob.c @@ -11,7 +11,7 @@ #include "desc.h" #include "jr.h" -int blob_decrypt(u8 *key_mod, u8 *src, u8 *dst, u8 len) +int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) { int ret, i = 0; u32 *desc; @@ -36,7 +36,7 @@ int blob_decrypt(u8 *key_mod, u8 *src, u8 *dst, u8 len) return ret; } -int blob_encrypt(u8 *key_mod, u8 *src, u8 *dst, u8 len) +int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) { int ret, i = 0; u32 *desc; From 94e3c8c4fd7bfe395fa467973cd647551d6d98c7 Mon Sep 17 00:00:00 2001 From: gaurav rana Date: Fri, 20 Feb 2015 12:51:46 +0530 Subject: [PATCH 222/222] crypto/fsl - Add progressive hashing support using hardware acceleration. Currently only normal hashing is supported using hardware acceleration. Added support for progressive hashing using hardware. Signed-off-by: Ruchika Gupta Signed-off-by: Gaurav Rana CC: Simon Glass Reviewed-by: Simon Glass Reviewed-by: York Sun --- Kconfig | 4 +- README | 20 ++++- common/hash.c | 10 +++ drivers/crypto/fsl/fsl_hash.c | 138 +++++++++++++++++++++++++++++++++- drivers/crypto/fsl/fsl_hash.h | 34 +++++++++ include/fsl_sec.h | 26 +++++++ include/hw_sha.h | 41 +++++++++- lib/Kconfig | 36 +++++++++ 8 files changed, 302 insertions(+), 7 deletions(-) create mode 100644 drivers/crypto/fsl/fsl_hash.h diff --git a/Kconfig b/Kconfig index 75bab7f6cc..fb012cfb3e 100644 --- a/Kconfig +++ b/Kconfig @@ -141,7 +141,9 @@ config FIT_SIGNATURE select RSA help This option enables signature verification of FIT uImages, - using a hash signed and verified using RSA. + using a hash signed and verified using RSA. If + CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive + hashing is available using hardware, RSA library will use it. See doc/uImage.FIT/signature.txt for more details. config SYS_EXTRA_OPTIONS diff --git a/README b/README index 6800b959ca..febefb50c2 100644 --- a/README +++ b/README @@ -3152,8 +3152,18 @@ CBFS (Coreboot Filesystem) support Enable the hash verify command (hash -v). This adds to code size a little. - CONFIG_SHA1 - support SHA1 hashing - CONFIG_SHA256 - support SHA256 hashing + CONFIG_SHA1 - This option enables support of hashing using SHA1 + algorithm. The hash is calculated in software. + CONFIG_SHA256 - This option enables support of hashing using + SHA256 algorithm. The hash is calculated in software. + CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration + for SHA1/SHA256 hashing. + This affects the 'hash' command and also the + hash_lookup_algo() function. + CONFIG_SHA_PROG_HW_ACCEL - This option enables + hardware-acceleration for SHA1/SHA256 progressive hashing. + Data can be streamed in a block at a time and the hashing + is performed in hardware. Note: There is also a sha1sum command, which should perhaps be deprecated in favour of 'hash sha1'. @@ -3447,8 +3457,10 @@ FIT uImage format: CONFIG_FIT_SIGNATURE This option enables signature verification of FIT uImages, - using a hash signed and verified using RSA. See - doc/uImage.FIT/signature.txt for more details. + using a hash signed and verified using RSA. If + CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive + hashing is available using hardware, RSA library will use it. + See doc/uImage.FIT/signature.txt for more details. WARNING: When relying on signed FIT images with required signature check the legacy image format is default diff --git a/common/hash.c b/common/hash.c index d154d029e9..9e9f84b9fb 100644 --- a/common/hash.c +++ b/common/hash.c @@ -127,11 +127,21 @@ static struct hash_algo hash_algo[] = { SHA1_SUM_LEN, hw_sha1, CHUNKSZ_SHA1, +#ifdef CONFIG_SHA_PROG_HW_ACCEL + hw_sha_init, + hw_sha_update, + hw_sha_finish, +#endif }, { "sha256", SHA256_SUM_LEN, hw_sha256, CHUNKSZ_SHA256, +#ifdef CONFIG_SHA_PROG_HW_ACCEL + hw_sha_init, + hw_sha_update, + hw_sha_finish, +#endif }, #endif #ifdef CONFIG_SHA1 diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index d77f2573d0..c298404f25 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -10,6 +10,9 @@ #include "jobdesc.h" #include "desc.h" #include "jr.h" +#include "fsl_hash.h" +#include +#include #define CRYPTO_MAX_ALG_NAME 80 #define SHA1_DIGEST_SIZE 20 @@ -39,6 +42,122 @@ static struct caam_hash_template driver_hash[] = { }, }; +static enum caam_hash_algos get_hash_type(struct hash_algo *algo) +{ + if (!strcmp(algo->name, driver_hash[SHA1].name)) + return SHA1; + else + return SHA256; +} + +/* Create the context for progressive hashing using h/w acceleration. + * + * @ctxp: Pointer to the pointer of the context for hashing + * @caam_algo: Enum for SHA1 or SHA256 + * @return 0 if ok, -ENOMEM on error + */ +static int caam_hash_init(void **ctxp, enum caam_hash_algos caam_algo) +{ + *ctxp = calloc(1, sizeof(struct sha_ctx)); + if (*ctxp == NULL) { + debug("Cannot allocate memory for context\n"); + return -ENOMEM; + } + return 0; +} + +/* + * Update sg table for progressive hashing using h/w acceleration + * + * The context is freed by this function if an error occurs. + * We support at most 32 Scatter/Gather Entries. + * + * @hash_ctx: Pointer to the context for hashing + * @buf: Pointer to the buffer being hashed + * @size: Size of the buffer being hashed + * @is_last: 1 if this is the last update; 0 otherwise + * @caam_algo: Enum for SHA1 or SHA256 + * @return 0 if ok, -EINVAL on error + */ +static int caam_hash_update(void *hash_ctx, const void *buf, + unsigned int size, int is_last, + enum caam_hash_algos caam_algo) +{ + uint32_t final = 0; + dma_addr_t addr = virt_to_phys((void *)buf); + struct sha_ctx *ctx = hash_ctx; + + if (ctx->sg_num >= MAX_SG_32) { + free(ctx); + return -EINVAL; + } + +#ifdef CONFIG_PHYS_64BIT + ctx->sg_tbl[ctx->sg_num].addr_hi = addr >> 32; +#else + ctx->sg_tbl[ctx->sg_num].addr_hi = 0x0; +#endif + ctx->sg_tbl[ctx->sg_num].addr_lo = addr; + + sec_out32(&ctx->sg_tbl[ctx->sg_num].len_flag, + (size & SG_ENTRY_LENGTH_MASK)); + + ctx->sg_num++; + + if (is_last) { + final = sec_in32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag) | + SG_ENTRY_FINAL_BIT; + sec_out32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag, final); + } + + return 0; +} + +/* + * Perform progressive hashing on the given buffer and copy hash at + * destination buffer + * + * The context is freed after completion of hash operation. + * + * @hash_ctx: Pointer to the context for hashing + * @dest_buf: Pointer to the destination buffer where hash is to be copied + * @size: Size of the buffer being hashed + * @caam_algo: Enum for SHA1 or SHA256 + * @return 0 if ok, -EINVAL on error + */ +static int caam_hash_finish(void *hash_ctx, void *dest_buf, + int size, enum caam_hash_algos caam_algo) +{ + uint32_t len = 0; + struct sha_ctx *ctx = hash_ctx; + int i = 0, ret = 0; + + if (size < driver_hash[caam_algo].digestsize) { + free(ctx); + return -EINVAL; + } + + for (i = 0; i < ctx->sg_num; i++) + len += (sec_in32(&ctx->sg_tbl[i].len_flag) & + SG_ENTRY_LENGTH_MASK); + + inline_cnstr_jobdesc_hash(ctx->sha_desc, (uint8_t *)ctx->sg_tbl, len, + ctx->hash, + driver_hash[caam_algo].alg_type, + driver_hash[caam_algo].digestsize, + 1); + + ret = run_descriptor_jr(ctx->sha_desc); + + if (ret) + debug("Error %x\n", ret); + else + memcpy(dest_buf, ctx->hash, sizeof(ctx->hash)); + + free(ctx); + return ret; +} + int caam_hash(const unsigned char *pbuf, unsigned int buf_len, unsigned char *pout, enum caam_hash_algos algo) { @@ -48,7 +167,7 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, desc = malloc(sizeof(int) * MAX_CAAM_DESCSIZE); if (!desc) { debug("Not enough memory for descriptor allocation\n"); - return -1; + return -ENOMEM; } inline_cnstr_jobdesc_hash(desc, pbuf, buf_len, pout, @@ -75,3 +194,20 @@ void hw_sha1(const unsigned char *pbuf, unsigned int buf_len, if (caam_hash(pbuf, buf_len, pout, SHA1)) printf("CAAM was not setup properly or it is faulty\n"); } + +int hw_sha_init(struct hash_algo *algo, void **ctxp) +{ + return caam_hash_init(ctxp, get_hash_type(algo)); +} + +int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf, + unsigned int size, int is_last) +{ + return caam_hash_update(ctx, buf, size, is_last, get_hash_type(algo)); +} + +int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf, + int size) +{ + return caam_hash_finish(ctx, dest_buf, size, get_hash_type(algo)); +} diff --git a/drivers/crypto/fsl/fsl_hash.h b/drivers/crypto/fsl/fsl_hash.h new file mode 100644 index 0000000000..f5be651d7a --- /dev/null +++ b/drivers/crypto/fsl/fsl_hash.h @@ -0,0 +1,34 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +#ifndef _SHA_H +#define _SHA_H + +#include +#include +#include "jr.h" + +/* We support at most 32 Scatter/Gather Entries.*/ +#define MAX_SG_32 32 + +/* + * Hash context contains the following fields + * @sha_desc: Sha Descriptor + * @sg_num: number of entries in sg table + * @len: total length of buffer + * @sg_tbl: sg entry table + * @hash: index to the hash calculated + */ +struct sha_ctx { + uint32_t sha_desc[64]; + uint32_t sg_num; + uint32_t len; + struct sg_entry sg_tbl[MAX_SG_32]; + u8 hash[HASH_MAX_DIGEST_SIZE]; +}; + +#endif diff --git a/include/fsl_sec.h b/include/fsl_sec.h index aa850a3bf1..b6e6f04a34 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -175,6 +175,32 @@ struct jr_regs { u32 jrcr; }; +/* + * Scatter Gather Entry - Specifies the the Scatter Gather Format + * related information + */ +struct sg_entry { +#ifdef CONFIG_SYS_FSL_SEC_LE + uint32_t addr_lo; /* Memory Address - lo */ + uint16_t addr_hi; /* Memory Address of start of buffer - hi */ + uint16_t reserved_zero; +#else + uint16_t reserved_zero; + uint16_t addr_hi; /* Memory Address of start of buffer - hi */ + uint32_t addr_lo; /* Memory Address - lo */ +#endif + + uint32_t len_flag; /* Length of the data in the frame */ +#define SG_ENTRY_LENGTH_MASK 0x3FFFFFFF +#define SG_ENTRY_EXTENSION_BIT 0x80000000 +#define SG_ENTRY_FINAL_BIT 0x40000000 + uint32_t bpid_offset; +#define SG_ENTRY_BPID_MASK 0x00FF0000 +#define SG_ENTRY_BPID_SHIFT 16 +#define SG_ENTRY_OFFSET_MASK 0x00001FFF +#define SG_ENTRY_OFFSET_SHIFT 0 +}; + int sec_init(void); #endif diff --git a/include/hw_sha.h b/include/hw_sha.h index 783350d513..ab19a99188 100644 --- a/include/hw_sha.h +++ b/include/hw_sha.h @@ -7,7 +7,7 @@ */ #ifndef __HW_SHA_H #define __HW_SHA_H - +#include /** * Computes hash value of input pbuf using h/w acceleration @@ -34,4 +34,43 @@ void hw_sha256(const uchar * in_addr, uint buflen, */ void hw_sha1(const uchar * in_addr, uint buflen, uchar * out_addr, uint chunk_size); + +/* + * Create the context for sha progressive hashing using h/w acceleration + * + * @algo: Pointer to the hash_algo struct + * @ctxp: Pointer to the pointer of the context for hashing + * @return 0 if ok, -ve on error + */ +int hw_sha_init(struct hash_algo *algo, void **ctxp); + +/* + * Update buffer for sha progressive hashing using h/w acceleration + * + * The context is freed by this function if an error occurs. + * + * @algo: Pointer to the hash_algo struct + * @ctx: Pointer to the context for hashing + * @buf: Pointer to the buffer being hashed + * @size: Size of the buffer being hashed + * @is_last: 1 if this is the last update; 0 otherwise + * @return 0 if ok, -ve on error + */ +int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf, + unsigned int size, int is_last); + +/* + * Copy sha hash result at destination location + * + * The context is freed after completion of hash operation or after an error. + * + * @algo: Pointer to the hash_algo struct + * @ctx: Pointer to the context for hashing + * @dest_buf: Pointer to the destination buffer where hash is to be copied + * @size: Size of the buffer being hashed + * @return 0 if ok, -ve on error + */ +int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf, + int size); + #endif diff --git a/lib/Kconfig b/lib/Kconfig index a1f30a2c4e..c9d2767d1d 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -29,4 +29,40 @@ config SYS_HZ source lib/rsa/Kconfig +menu "Hashing Support" + +config SHA1 + bool "Enable SHA1 support" + help + This option enables support of hashing using SHA1 algorithm. + The hash is calculated in software. + The SHA1 algorithm produces a 160-bit (20-byte) hash value + (digest). + +config SHA256 + bool "Enable SHA256 support" + help + This option enables support of hashing using SHA256 algorithm. + The hash is calculated in software. + The SHA256 algorithm produces a 256-bit (32-byte) hash value + (digest). + +config SHA_HW_ACCEL + bool "Enable hashing using hardware" + help + This option enables hardware acceleration + for SHA1/SHA256 hashing. + This affects the 'hash' command and also the + hash_lookup_algo() function. + +config SHA_PROG_HW_ACCEL + bool "Enable Progressive hashing support using hardware" + depends on SHA_HW_ACCEL + help + This option enables hardware-acceleration for + SHA1/SHA256 progressive hashing. + Data can be streamed in a block at a time and the hashing + is performed in hardware. +endmenu + endmenu