leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

x86: Add header files for Intel Quark SoC defines

Browse Source 
device.h for integrated pci devices' bdf on Quark SoC and quark.h for
various memory-mapped and i/o-mapped base addresses within SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2015-02-02 22:35:23 +08:00 committed by Simon Glass
parent 7df546a653
commit b994efbd2d
2 changed files with 68 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
arch/x86/include/asm/arch-quark/device.h Normal file
View File

@ -0,0 +1,28 @@
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _QUARK_DEVICE_H_
#define _QUARK_DEVICE_H_
#include <pci.h>
#define QUARK_HOST_BRIDGE PCI_BDF(0, 0, 0)
#define QUARK_MMC_SDIO PCI_BDF(0, 20, 0)
#define QUARK_UART0 PCI_BDF(0, 20, 1)
#define QUARK_USB_DEVICE PCI_BDF(0, 20, 2)
#define QUARK_USB_EHCI PCI_BDF(0, 20, 3)
#define QUARK_USB_OHCI PCI_BDF(0, 20, 4)
#define QUARK_UART1 PCI_BDF(0, 20, 5)
#define QUARK_EMAC0 PCI_BDF(0, 20, 6)
#define QUARK_EMAC1 PCI_BDF(0, 20, 7)
#define QUARK_SPI0 PCI_BDF(0, 21, 0)
#define QUARK_SPI1 PCI_BDF(0, 21, 1)
#define QUARK_I2C_GPIO PCI_BDF(0, 21, 2)
#define QUARK_PCIE0 PCI_BDF(0, 23, 0)
#define QUARK_PCIE1 PCI_BDF(0, 23, 1)
#define QUARK_LEGACY_BRIDGE PCI_BDF(0, 31, 0)
#endif /* _QUARK_DEVICE_H_ */

40
arch/x86/include/asm/arch-quark/quark.h Normal file
View File

@ -0,0 +1,40 @@
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _QUARK_H_
#define _QUARK_H_
/* Message Bus Ports */
#define MSG_PORT_MEM_ARBITER 0x00
#define MSG_PORT_HOST_BRIDGE 0x03
#define MSG_PORT_RMU 0x04
#define MSG_PORT_MEM_MGR 0x05
#define MSG_PORT_SOC_UNIT 0x31
/* Host Memory I/O Boundary */
#define HM_BOUND 0x08
/* eSRAM Block Page Control */
#define ESRAM_BLK_CTRL 0x82
#define ESRAM_BLOCK_MODE 0x10000000
/* DRAM */
#define DRAM_BASE 0x00000000
#define DRAM_MAX_SIZE 0x80000000
/* eSRAM */
#define ESRAM_SIZE 0x80000
/* Memory BAR Enable */
#define MEM_BAR_EN 0x00000001
/* I/O BAR Enable */
#define IO_BAR_EN 0x80000000
/* 64KiB of RMU binary in flash */
#define RMU_BINARY_SIZE 0x10000
#endif /* _QUARK_H_ */