pinctrl: Add Apple pinctrl driver
This driver supports both pin muxing and GPIO support for the pin control logic found on Apple SoCs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
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@ -115,6 +115,7 @@ F: arch/arm/include/asm/arch-m1/
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F: arch/arm/mach-apple/
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F: configs/apple_m1_defconfig
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F: drivers/iommu/apple_dart.c
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F: drivers/pinctrl/pinctrl-apple.c
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F: include/configs/apple.h
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ARM
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@ -927,6 +927,7 @@ config ARCH_APPLE
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select CLK
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select CMD_USB
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select DM
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select DM_GPIO
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select DM_KEYBOARD
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select DM_SERIAL
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select DM_USB
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@ -935,6 +936,7 @@ config ARCH_APPLE
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select LINUX_KERNEL_IMAGE_HEADER
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select OF_CONTROL
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select OF_BOARD
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select PINCTRL
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select POSITION_INDEPENDENT
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select USB
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imply CMD_DM
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106
doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml
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doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml
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@ -0,0 +1,106 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/apple,pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Apple GPIO controller
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maintainers:
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- Mark Kettenis <kettenis@openbsd.org>
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description: |
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The Apple GPIO controller is a simple combined pin and GPIO
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controller present on Apple ARM SoC platforms, including various
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iPhone and iPad devices and the "Apple Silicon" Macs.
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properties:
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compatible:
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items:
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- const: apple,t8103-pinctrl
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- const: apple,pinctrl
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 2
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gpio-ranges:
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maxItems: 1
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interrupts:
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description: One interrupt for each of the (up to 7) interrupt
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groups supported by the controller sorted by interrupt group
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number in ascending order.
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minItems: 1
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maxItems: 7
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interrupt-controller: true
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patternProperties:
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'-pins$':
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type: object
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$ref: pinmux-node.yaml#
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properties:
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pinmux:
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description:
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Values are constructed from pin number and alternate function
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configuration number using the APPLE_PINMUX() helper macro
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defined in include/dt-bindings/pinctrl/apple.h.
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required:
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- pinmux
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additionalProperties: false
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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- gpio-ranges
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/apple-aic.h>
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#include <dt-bindings/pinctrl/apple.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pinctrl: pinctrl@23c100000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3c100000 0x0 0x100000>;
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clocks = <&gpio_clk>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl 0 0 212>;
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interrupt-controller;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 16 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 17 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 18 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 19 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 20 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 21 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 22 IRQ_TYPE_LEVEL_HIGH>;
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pcie_pins: pcie-pins {
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pinmux = <APPLE_PINMUX(150, 1)>,
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<APPLE_PINMUX(151, 1)>,
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<APPLE_PINMUX(32, 1)>;
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};
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};
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};
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@ -145,6 +145,17 @@ config SPL_PINCONF_RECURSIVE
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if PINCTRL || SPL_PINCTRL
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config PINCTRL_APPLE
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bool "Apple pinctrl driver"
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depends on DM && PINCTRL_GENERIC && ARCH_APPLE
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default y
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help
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Support pin multiplexing on Apple SoCs.
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The driver is controlled by a device tree node which contains
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both the GPIO definitions and pin control functions for each
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available multiplex function.
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config PINCTRL_AR933X
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bool "QCA/Athores ar933x pin control driver"
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depends on DM && SOC_AR933X
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@ -3,6 +3,7 @@
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obj-y += pinctrl-uclass.o
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obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
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obj-$(CONFIG_PINCTRL_APPLE) += pinctrl-apple.o
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obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
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obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
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obj-y += nxp/
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207
drivers/pinctrl/pinctrl-apple.c
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207
drivers/pinctrl/pinctrl-apple.c
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@ -0,0 +1,207 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2021 Mark Kettenis <kettenis@openbsd.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/device-internal.h>
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#include <dm/pinctrl.h>
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#include <dt-bindings/pinctrl/apple.h>
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#include <asm/io.h>
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#include <asm-generic/gpio.h>
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#include <linux/bitfield.h>
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struct apple_pinctrl_priv {
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void *base;
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int pin_count;
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};
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#define REG_GPIO(x) (4 * (x))
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#define REG_GPIO_DATA BIT(0)
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#define REG_GPIO_MODE GENMASK(3, 1)
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#define REG_GPIO_OUT 1
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#define REG_GPIO_PERIPH GENMASK(6, 5)
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#define REG_GPIO_INPUT_ENABLE BIT(9)
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static void apple_pinctrl_config_pin(struct apple_pinctrl_priv *priv,
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unsigned pin, u32 clr, u32 set)
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{
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unsigned reg = REG_GPIO(pin);
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u32 old, new;
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old = readl(priv->base + REG_GPIO(pin));
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new = (old & ~clr) | set;
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writel(new, priv->base + reg);
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}
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static int apple_gpio_get_value(struct udevice *dev, unsigned offset)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
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return !!(readl(priv->base + REG_GPIO(offset)) & REG_GPIO_DATA);
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}
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static int apple_gpio_set_value(struct udevice *dev, unsigned offset,
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int value)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
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apple_pinctrl_config_pin(priv, offset, REG_GPIO_DATA,
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value ? REG_GPIO_DATA : 0);
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return 0;
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}
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static int apple_gpio_get_direction(struct udevice *dev, unsigned offset)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
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u32 reg = readl(priv->base + REG_GPIO(offset));
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if (FIELD_GET(REG_GPIO_MODE, reg) == REG_GPIO_OUT)
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return GPIOF_OUTPUT;
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else
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return GPIOF_INPUT;
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}
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static int apple_gpio_direction_input(struct udevice *dev, unsigned offset)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
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apple_pinctrl_config_pin(priv, offset,
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REG_GPIO_PERIPH | REG_GPIO_MODE,
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REG_GPIO_INPUT_ENABLE);
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return 0;
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}
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static int apple_gpio_direction_output(struct udevice *dev, unsigned offset,
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int value)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
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u32 set = (value ? REG_GPIO_DATA : 0);
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apple_pinctrl_config_pin(priv, offset, REG_GPIO_DATA |
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REG_GPIO_PERIPH | REG_GPIO_MODE,
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set | FIELD_PREP(REG_GPIO_MODE, REG_GPIO_OUT));
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return 0;
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}
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static int apple_gpio_probe(struct udevice *dev)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
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struct gpio_dev_priv *uc_priv;
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uc_priv = dev_get_uclass_priv(dev);
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uc_priv->bank_name = "gpio";
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uc_priv->gpio_count = priv->pin_count;
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return 0;
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}
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static struct dm_gpio_ops apple_gpio_ops = {
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.get_value = apple_gpio_get_value,
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.set_value = apple_gpio_set_value,
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.get_function = apple_gpio_get_direction,
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.direction_input = apple_gpio_direction_input,
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.direction_output = apple_gpio_direction_output,
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};
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static struct driver apple_gpio_driver = {
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.name = "apple_gpio",
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.id = UCLASS_GPIO,
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.probe = apple_gpio_probe,
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.ops = &apple_gpio_ops,
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};
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static int apple_pinctrl_get_pins_count(struct udevice *dev)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev);
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return priv->pin_count;
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}
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static const char *apple_pinctrl_get_pin_name(struct udevice *dev,
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unsigned selector)
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{
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static char pin_name[PINNAME_SIZE];
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snprintf(pin_name, PINNAME_SIZE, "pin%d", selector);
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return pin_name;
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}
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static int apple_pinctrl_get_pin_muxing(struct udevice *dev, unsigned selector,
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char *buf, int size)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev);
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if (readl(priv->base + REG_GPIO(selector)) & REG_GPIO_PERIPH)
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strncpy(buf, "periph", size);
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else
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strncpy(buf, "gpio", size);
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return 0;
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}
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static int apple_pinctrl_pinmux_set(struct udevice *dev, unsigned pin_selector,
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unsigned func_selector)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev);
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apple_pinctrl_config_pin(priv, pin_selector,
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REG_GPIO_DATA | REG_GPIO_MODE,
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FIELD_PREP(REG_GPIO_PERIPH, func_selector) |
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REG_GPIO_INPUT_ENABLE);
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return 0;
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}
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static int apple_pinctrl_pinmux_property_set(struct udevice *dev,
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u32 pinmux_group)
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{
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unsigned pin_selector = APPLE_PIN(pinmux_group);
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unsigned func_selector = APPLE_FUNC(pinmux_group);
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int ret;
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ret = apple_pinctrl_pinmux_set(dev, pin_selector, func_selector);
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return ret ? ret : pin_selector;
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}
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static int apple_pinctrl_probe(struct udevice *dev)
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{
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struct apple_pinctrl_priv *priv = dev_get_priv(dev);
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struct ofnode_phandle_args args;
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struct udevice *child;
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priv->base = dev_read_addr_ptr(dev);
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if (!priv->base)
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return -EINVAL;
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if (!dev_read_phandle_with_args(dev, "gpio-ranges",
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NULL, 3, 0, &args))
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priv->pin_count = args.args[2];
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device_bind(dev, &apple_gpio_driver, "apple_gpio", NULL,
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dev_ofnode(dev), &child);
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return 0;
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}
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static struct pinctrl_ops apple_pinctrl_ops = {
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.set_state = pinctrl_generic_set_state,
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.get_pins_count = apple_pinctrl_get_pins_count,
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.get_pin_name = apple_pinctrl_get_pin_name,
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.pinmux_set = apple_pinctrl_pinmux_set,
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.pinmux_property_set = apple_pinctrl_pinmux_property_set,
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.get_pin_muxing = apple_pinctrl_get_pin_muxing,
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};
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static const struct udevice_id apple_pinctrl_ids[] = {
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{ .compatible = "apple,pinctrl" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(pinctrl_apple) = {
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.name = "apple_pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = apple_pinctrl_ids,
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.priv_auto = sizeof(struct apple_pinctrl_priv),
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.ops = &apple_pinctrl_ops,
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.probe = apple_pinctrl_probe,
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};
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