usb: dwc3: ensure consistent types for dwc3_flush_cache
The dwc3_flush_cache() call was declared and used inconsistently: * The declaration assumed 'int' for addresses (a potential issue when running in a LP64 memory model). * The invocation cast the address to 'long'. This change ensures that both the declaration and usage of this function consistently uses 'uintptr_t' for correct behaviour even when the allocated buffers (to be flushed) reside outside of the lower 32bits of memory. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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@ -81,8 +81,8 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
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trb->ctrl |= (DWC3_TRB_CTRL_IOC
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| DWC3_TRB_CTRL_LST);
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dwc3_flush_cache((long)buf_dma, len);
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dwc3_flush_cache((long)trb, sizeof(*trb));
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dwc3_flush_cache((uintptr_t)buf_dma, len);
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dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
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if (chain)
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return 0;
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@ -790,7 +790,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
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if (!r)
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return;
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dwc3_flush_cache((long)trb, sizeof(*trb));
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dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
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status = DWC3_TRB_SIZE_TRBSTS(trb->size);
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if (status == DWC3_TRBSTS_SETUP_PENDING) {
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@ -821,7 +821,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
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ur->actual += transferred;
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trb++;
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dwc3_flush_cache((long)trb, sizeof(*trb));
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dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
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length = trb->size & DWC3_TRB_SIZE_MASK;
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ep0->free_slot = 0;
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@ -831,7 +831,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
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maxp);
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transferred = min_t(u32, ur->length - transferred,
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transfer_size - length);
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dwc3_flush_cache((long)dwc->ep0_bounce, DWC3_EP0_BOUNCE_SIZE);
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dwc3_flush_cache((uintptr_t)dwc->ep0_bounce, DWC3_EP0_BOUNCE_SIZE);
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memcpy(buf, dwc->ep0_bounce, transferred);
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} else {
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transferred = ur->length - length;
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@ -244,7 +244,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
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list_del(&req->list);
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req->trb = NULL;
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dwc3_flush_cache((long)req->request.dma, req->request.length);
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dwc3_flush_cache((uintptr_t)req->request.dma, req->request.length);
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if (req->request.status == -EINPROGRESS)
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req->request.status = status;
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@ -771,8 +771,8 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
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trb->ctrl |= DWC3_TRB_CTRL_HWO;
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dwc3_flush_cache((long)dma, length);
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dwc3_flush_cache((long)trb, sizeof(*trb));
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dwc3_flush_cache((uintptr_t)dma, length);
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dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
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}
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/*
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@ -1769,7 +1769,7 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
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slot %= DWC3_TRB_NUM;
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trb = &dep->trb_pool[slot];
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dwc3_flush_cache((long)trb, sizeof(*trb));
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dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
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__dwc3_cleanup_done_trbs(dwc, dep, req, trb, event, status);
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dwc3_gadget_giveback(dep, req, status);
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@ -2670,7 +2670,7 @@ void dwc3_gadget_uboot_handle_interrupt(struct dwc3 *dwc)
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for (i = 0; i < dwc->num_event_buffers; i++) {
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evt = dwc->ev_buffs[i];
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dwc3_flush_cache((long)evt->buf, evt->length);
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dwc3_flush_cache((uintptr_t)evt->buf, evt->length);
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}
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dwc3_thread_interrupt(0, dwc);
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@ -48,7 +48,7 @@ static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
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writel(value, base + offs);
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}
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static inline void dwc3_flush_cache(int addr, int length)
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static inline void dwc3_flush_cache(uintptr_t addr, int length)
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{
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flush_dcache_range(addr, addr + ROUND(length, CACHELINE_SIZE));
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}
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