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ARM: dts: K2G: Add support for QSPI controller

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K2G SoC has a Cadence QSPI controller to communicate with NOR flash
devices. Add DT nodes to support the same.
Also, K2G EVM has a s25fl512s flash connect to QSPI bus at CS 0. Add nor
flash slave node for the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
This commit is contained in:
Vignesh R 2016-07-06 10:20:57 +05:30 committed by Jagan Teki
parent 2372e14f19
commit b60774fff1
2 changed files with 59 additions and 0 deletions
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45
arch/arm/dts/k2g-evm.dts
View File

@ -55,3 +55,48 @@
};
};
};
&qspi {
status = "okay";
flash0: m25p80@0 {
compatible = "s25fl512s","spi-flash";
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <96000000>;
#address-cells = <1>;
#size-cells = <1>;
tshsl-ns = <392>;
tsd2d-ns = <392>;
tchsh-ns = <100>;
tslch-ns = <100>;
block-size = <18>;
partition@0 {
label = "QSPI.u-boot-spl-os";
reg = <0x00000000 0x00100000>;
};
partition@1 {
label = "QSPI.u-boot-env";
reg = <0x00100000 0x00040000>;
};
partition@2 {
label = "QSPI.skern";
reg = <0x00140000 0x0040000>;
};
partition@3 {
label = "QSPI.pmmc-firmware";
reg = <0x00180000 0x0040000>;
};
partition@4 {
label = "QSPI.kernel";
reg = <0x001C0000 0x0800000>;
};
partition@5 {
label = "QSPI.file-system";
reg = <0x009C0000 0x3640000>;
};
};
};

14
arch/arm/dts/k2g.dtsi
View File

@ -23,6 +23,7 @@
spi1 = &spi1;
spi2 = &spi2;
spi3 = &spi3;
spi4 = &qspi;
};
memory {
@ -84,6 +85,19 @@
bus_freq = <2500000>;
};
qspi: qspi@2940000 {
compatible = "cadence,qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x02940000 0x1000>,
<0x24000000 0x4000000>;
interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
num-cs = <4>;
fifo-depth = <256>;
sram-size = <256>;
status = "disabled";
};
#include "k2g-netcp.dtsi"
pmmc: pmmc@2900000 {