sh: Fix compile warning
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
@@ -43,48 +43,61 @@
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lowlevel_init:
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mov.l CCR_A, r1 ! Address of Cache Control Register
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mov.l CCR_D, r0 ! Instruction Cache Invalidate
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/* Address of Cache Control Register */
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mov.l CCR_A, r1
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/*Instruction Cache Invalidate */
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mov.l CCR_D, r0
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mov.l r0, @r1
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mov.l MMUCR_A, r1 ! Address of MMU Control Register
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mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit
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/* Address of MMU Control Register */
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mov.l MMUCR_A, r1
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/* TI == TLB Invalidate bit */
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mov.l MMUCR_D, r0
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mov.l r0, @r1
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mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0
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mov.l MSTPCR0_D, r0 !
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/* Address of Power Control Register 0 */
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mov.l MSTPCR0_A, r1
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mov.l MSTPCR0_D, r0
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mov.l r0, @r1
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mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2
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mov.l MSTPCR2_D, r0 !
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/* Address of Power Control Register 2 */
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mov.l MSTPCR2_A, r1
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mov.l MSTPCR2_D, r0
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mov.l r0, @r1
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mov.l SBSCR_A, r1 !
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mov.w SBSCR_D, r0 !
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mov.l SBSCR_A, r1
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mov.w SBSCR_D, r0
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mov.w r0, @r1
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mov.l PSCR_A, r1 !
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mov.w PSCR_D, r0 !
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mov.l PSCR_A, r1
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mov.w PSCR_D, r0
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mov.w r0, @r1
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! mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
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! mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max
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/* 0xA4520004 (Watchdog Control / Status Register) */
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! mov.l RWTCSR_A, r1
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/* 0xA507 -> timer_STOP/WDT_CLK=max */
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! mov.w RWTCSR_D_1, r0
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! mov.w r0, @r1
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mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register)
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mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear
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/* 0xA4520000 (Watchdog Count Register) */
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mov.l RWTCNT_A, r1
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/*0x5A00 -> Clear */
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mov.w RWTCNT_D, r0
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mov.w r0, @r1
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mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
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mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms
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/* 0xA4520004 (Watchdog Control / Status Register) */
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mov.l RWTCSR_A, r1
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/* 0xA504 -> timer_STOP/CLK=500ms */
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mov.w RWTCSR_D_2, r0
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mov.w r0, @r1
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mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
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/* 0xA4150000 Frequency control register */
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mov.l FRQCR_A, r1
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mov.l FRQCR_D, r0 !
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mov.l r0, @r1
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mov.l CCR_A, r1 ! Address of Cache Control Register
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mov.l CCR_D_2, r0 ! ??
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mov.l CCR_A, r1
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mov.l CCR_D_2, r0
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mov.l r0, @r1
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bsc_init:
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@@ -290,5 +303,6 @@ PSCR_D: .word 0x0000
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RWTCSR_D_1: .word 0xA507
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RWTCSR_D_2: .word 0xA507
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RWTCNT_D: .word 0x5A00
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.align 2
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SR_MASK_D: .long 0xEFFFFF0F
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@@ -325,8 +325,9 @@ repeat2:
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RWTCSR_D_1: .word 0xA507
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RWTCSR_D_2: .word 0xA507
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RWTCNT_D: .word 0x5A00
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.align 2
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BBG_PMMR_A: .long 0xFF800010
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BBG_PMMR_A: .long 0xFF800010
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BBG_PMSR1_A: .long 0xFF800014
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BBG_PMSR2_A: .long 0xFF800018
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BBG_PMSR3_A: .long 0xFF80001C
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@@ -84,7 +84,7 @@ static void test_net(void)
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if (data == 0x816910ec)
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printf("Ethernet OK\n");
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else
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printf("Ethernet NG, data = %08x\n", data);
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printf("Ethernet NG, data = %08x\n", (unsigned int)data);
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}
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static void test_sata(void)
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@@ -96,7 +96,7 @@ static void test_sata(void)
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if (data == 0x35121095)
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printf("SATA OK\n");
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else
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printf("SATA NG, data = %08x\n", data);
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printf("SATA NG, data = %08x\n", (unsigned int)data);
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}
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static void test_pci(void)
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