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riscv: Add device tree bindings for SPI

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This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix
Bit.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Sean Anderson 2020-10-16 18:57:54 -04:00 committed by Jagan Teki
parent fec7bf0460
commit b55af5a225
2 changed files with 47 additions and 1 deletions
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46
arch/riscv/dts/k210-maix-bit.dts
View File

@ -152,7 +152,7 @@
pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>, pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
<K210_FPIOA(27, K210_PCF_SPI1_SCLK)>, <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
<K210_FPIOA(28, K210_PCF_SPI1_D0)>, <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
<K210_FPIOA(29, K210_PCF_GPIOHS13)>; <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
}; };
}; };
@ -160,3 +160,47 @@
pinctrl-0 = <&fpioa_dvp>; pinctrl-0 = <&fpioa_dvp>;
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&spi0 {
pinctrl-0 = <&fpioa_spi0>;
pinctrl-names = "default";
num-cs = <1>;
cs-gpios = <&gpio0 20 0>;
panel@0 {
compatible = "sitronix,st7789v";
reg = <0>;
reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio0 22 0>;
spi-max-frequency = <15000000>;
status = "disabled";
};
};
&spi1 {
pinctrl-0 = <&fpioa_spi1>;
pinctrl-names = "default";
num-cs = <1>;
cs-gpios = <&gpio0 13 0>;
status = "okay";
slot@0 {
compatible = "mmc-spi-slot";
reg = <0>;
spi-max-frequency = <25000000>;
voltage-ranges = <3300 3300>;
broken-cd;
};
};
&spi3 {
status = "okay";
spi-flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
broken-flash-reset;
};
};

2
arch/riscv/dts/k210.dtsi
View File

@ -496,6 +496,8 @@
interrupts = <24>; interrupts = <24>;
clocks = <&sysclk K210_CLK_DVP>; clocks = <&sysclk K210_CLK_DVP>;
resets = <&sysrst K210_RST_DVP>; resets = <&sysrst K210_RST_DVP>;
kendryte,sysctl = <&sysctl>;
kendryte,misc-offset = <K210_SYSCTL_MISC>;
status = "disabled"; status = "disabled";
}; };