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vexpress64: Add BASER_FVP vexpress board variant

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The BASER_FVP board variant is implemented on top of the BASE_FVP board
config (which, in turn, is based on the Juno Versatile Express board
config). They all share a similar memory map - for BASER_FVP the map is
inverted from the BASE_FVP
(https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map)

 * Create new TARGET_VEXPRESS64_BASER_FVP target, which uses the same
   board config as BASE_FVP and JUNO
 * Adapt vexpress_aemv8a.h header file to support BASER_FVP (and rename
   to vexpress_aemv8.h)
 * Enable config to switch to EL1 for the BASER_FVP
 * Create vexpress_aemv8r defconfig
 * Provide an MPU memory map for the BASER_FVP

For now, only single core boot is supported.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[trini: Add MAINTAINERS, move BOOTCOMMAND to defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Peter Hoyes
2021-08-19 16:53:12 +01:00
committed by Tom Rini
parent 2f5b7b7490
commit b53bbca63b
7 changed files with 94 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
board/armltd/vexpress64/Kconfig
View File

@@ -1,4 +1,5 @@
if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO
if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO || \
TARGET_VEXPRESS64_BASER_FVP
config SYS_BOARD
default "vexpress64"
@@ -7,7 +8,7 @@ config SYS_VENDOR
default "armltd"
config SYS_CONFIG_NAME
default "vexpress_aemv8a"
default "vexpress_aemv8"
config JUNO_DTB_PART
string "NOR flash partition holding DTB"

5
board/armltd/vexpress64/MAINTAINERS
View File

@@ -14,3 +14,8 @@ JUNO DEVELOPMENT PLATFORM BOARD
M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained
F: configs/vexpress_aemv8a_juno_defconfig
VEXPRESS64 BASER_FVP
M: Peter Hoyes <Peter.Hoyes@arm.com>
S: Maintained
F: configs/vexpress_aemv8r_defconfig

22
board/armltd/vexpress64/vexpress64.c
View File

@@ -18,6 +18,7 @@
#include <dm/platform_data/serial_pl01x.h>
#include "pcie.h"
#include <asm/armv8/mmu.h>
#include <asm/armv8/mpu.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -54,6 +55,27 @@ static struct mm_region vexpress64_mem_map[] = {
struct mm_region *mem_map = vexpress64_mem_map;
static struct mpu_region vexpress64_aemv8r_mem_map[] = {
{
.start = 0x0UL,
.end = 0x7fffffffUL,
.attrs = PRLAR_ATTRIDX(MT_NORMAL)
}, {
.start = 0x80000000UL,
.end = 0xffffffffUL,
.attrs = PRLAR_ATTRIDX(MT_DEVICE_NGNRNE)
}, {
.start = 0x100000000UL,
.end = 0xffffffffffUL,
.attrs = PRLAR_ATTRIDX(MT_NORMAL)
}, {
/* List terminator */
0,
}
};
struct mpu_region *mpu_mem_map = vexpress64_aemv8r_mem_map;
/* This function gets replaced by platforms supporting PCIe.
* The replacement function, eg. on Juno, initialises the PCIe bus.
*/