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ARM: dts: rmobile: Import R8A77965 M3NULCB DTs

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Import R8A77965 M3N ULCB device trees from Linux 5.0 ,
commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut 2019-03-04 12:28:31 +01:00 committed by Marek Vasut
parent c6435c317a
commit b414ab70cd
3 changed files with 77 additions and 0 deletions
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1
arch/arm/dts/Makefile
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@ -567,6 +567,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a7795-salvator-x-u-boot.dtb \
r8a7796-m3ulcb-u-boot.dtb \
r8a7796-salvator-x-u-boot.dtb \
r8a77965-m3nulcb-u-boot.dtb \
r8a77965-salvator-x-u-boot.dtb \
r8a77970-eagle-u-boot.dtb \
r8a77990-ebisu-u-boot.dtb \

43
arch/arm/dts/r8a77965-m3nulcb-u-boot.dts Normal file
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@ -0,0 +1,43 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot for the ULCB board
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
#include "r8a77965-m3nulcb.dts"
#include "r8a77965-u-boot.dtsi"
/ {
cpld {
compatible = "renesas,ulcb-cpld";
status = "okay";
gpio-sck = <&gpio6 8 0>;
gpio-mosi = <&gpio6 7 0>;
gpio-miso = <&gpio6 10 0>;
gpio-sstbz = <&gpio2 3 0>;
};
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
status = "okay";
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
status = "okay";
};

33
arch/arm/dts/r8a77965-m3nulcb.dts Normal file
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@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board
*
* Copyright (C) 2018 Renesas Electronics Corp.
* Copyright (C) 2018 Cogent Embedded, Inc.
*/
/dts-v1/;
#include "r8a77965.dtsi"
#include "ulcb.dtsi"
/ {
model = "Renesas M3NULCB board based on r8a77965";
compatible = "renesas,m3nulcb", "renesas,r8a77965";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
};
&du {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>,
<&versaclock5 1>,
<&versaclock5 3>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.3",
"dclkin.0", "dclkin.1", "dclkin.3";
};