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Convert CONFIG_BACKSIDE_L2_CACHE to Kconfig

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This converts the following to Kconfig:
   CONFIG_BACKSIDE_L2_CACHE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-03-18 08:38:32 -04:00
parent 2665853a5f
commit b40d2b2891
6 changed files with 10 additions and 5 deletions
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10
arch/powerpc/cpu/mpc85xx/Kconfig
View File

@ -523,6 +523,7 @@ config ARCH_P2020
config ARCH_P2041
bool
select BACKSIDE_L2_CACHE
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
@ -548,6 +549,7 @@ config ARCH_P2041
config ARCH_P3041
bool
select BACKSIDE_L2_CACHE
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
@ -578,6 +580,7 @@ config ARCH_P3041
config ARCH_P4080
bool
select BACKSIDE_L2_CACHE
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
@ -617,6 +620,7 @@ config ARCH_P4080
config ARCH_P5040
bool
select BACKSIDE_L2_CACHE
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
@ -647,6 +651,7 @@ config ARCH_QEMU_E500
config ARCH_T1024
bool
select BACKSIDE_L2_CACHE
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
@ -670,6 +675,7 @@ config ARCH_T1024
config ARCH_T1040
bool
select BACKSIDE_L2_CACHE
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
@ -693,6 +699,7 @@ config ARCH_T1040
config ARCH_T1042
bool
select BACKSIDE_L2_CACHE
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
@ -1108,6 +1115,9 @@ config SYS_NUM_TLBCAMS
Number of TLB CAM entries for Book-E chips. 64 for E500MC,
16 for other E500 SoCs.
config BACKSIDE_L2_CACHE
bool
config SYS_PPC64
bool

1
include/configs/P2041RDB.h
View File

@ -56,7 +56,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_ENABLE_36BIT_PHYS

1
include/configs/T102xRDB.h
View File

@ -119,7 +119,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef

1
include/configs/T104xRDB.h
View File

@ -96,7 +96,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef

1
include/configs/corenet_ds.h
View File

@ -57,7 +57,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef

1
include/configs/kmcent2.h
View File

@ -150,7 +150,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_ENABLE_36BIT_PHYS