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arm: dts: ls1028a updates for network interfaces

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Defines LS1028A RDB SGMII port, QDS RGMII port.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Alex Marginean 2019-07-03 12:11:43 +03:00 committed by Joe Hershberger
parent e4aafd5c20
commit b32e9a7578
3 changed files with 50 additions and 0 deletions
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13
arch/arm/dts/fsl-ls1028a-qds.dts
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@ -86,3 +86,16 @@
&usb2 {
status = "okay";
};
&enetc1 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&qds_phy0>;
};
&mdio0 {
status = "okay";
qds_phy0: phy@5 {
reg = <5>;
};
};

13
arch/arm/dts/fsl-ls1028a-rdb.dts
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@ -86,3 +86,16 @@
&usb2 {
status = "okay";
};
&enetc0 {
status = "okay";
phy-mode = "sgmii";
phy-handle = <&rdb_phy0>;
};
&mdio0 {
status = "okay";
rdb_phy0: phy@2 {
reg = <2>;
};
};

24
arch/arm/dts/fsl-ls1028a.dtsi
View File

@ -117,6 +117,30 @@
#size-cells = <2>;
device_type = "pci";
ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
enetc0: pci@0,0 {
reg = <0x000000 0 0 0 0>;
status = "disabled";
};
enetc1: pci@0,1 {
reg = <0x000100 0 0 0 0>;
status = "disabled";
};
enetc2: pci@0,2 {
reg = <0x000200 0 0 0 0>;
status = "okay";
phy-mode = "internal";
};
mdio0: pci@0,3 {
#address-cells=<0>;
#size-cells=<1>;
reg = <0x000300 0 0 0 0>;
status = "disabled";
};
enetc6: pci@0,6 {
reg = <0x000600 0 0 0 0>;
status = "okay";
phy-mode = "internal";
};
};
i2c0: i2c@2000000 {