Move CONFIG_PHY_ADDR to Kconfig

CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
	- edb9315a	- CONFIG_PHYLIB is not enabled. Entry is
			  deleted.

	- ds414		- CONFIG_PHYLIB is in incompatible format:
			  { 0x1, 0x0 }. This entry is also deleted.

	- devkit3250	- The PHY_ADDR is in hex format (0x1F).
			  Manually CONFIG_PHY_ADDR=31 is added in
			  the defconfig.

After the changes the suspicious defconfigs passes building.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Stefan Mavrodiev
2018-02-02 15:53:38 +02:00
committed by Jagan Teki
parent 2d53018a0e
commit b30c419040
19 changed files with 11 additions and 21 deletions

View File

@@ -258,7 +258,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
/* I2C configuration */

View File

@@ -282,7 +282,6 @@
#endif
/* Network. */
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
#define CONFIG_MII
#define CONFIG_PHY_ATHEROS

View File

@@ -71,7 +71,6 @@
#define CONFIG_RMII
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
#define CONFIG_PHY_ADDR 0x1F
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/*

View File

@@ -40,7 +40,6 @@
#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
#define CONFIG_PHY_MARVELL /* there is a marvell phy */
#define CONFIG_PHY_ADDR { 0x1, 0x0 }
#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_SYS_ALT_MEMTEST

View File

@@ -95,7 +95,6 @@
#define CONFIG_DRIVER_EP93XX_MAC
#define CONFIG_MII_SUPPRESS_PREAMBLE
#define CONFIG_MII
#define CONFIG_PHY_ADDR 1
#undef CONFIG_NETCONSOLE
/* SDRAM configuration */

View File

@@ -12,8 +12,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_PHY_ADDR 8
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
#include <configs/meson-gxbb-common.h>

View File

@@ -12,8 +12,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_PHY_ADDR 8
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
#include <configs/meson-gxbb-common.h>

View File

@@ -12,8 +12,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_PHY_ADDR 8
/* Serial setup */
#define CONFIG_CONS_INDEX 0

View File

@@ -77,7 +77,6 @@
#define CONFIG_SYS_NS16550_COM1 0x44e09000
/* Ethernet support */
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_RESET_DELAY 1000
/* SPL */

View File

@@ -288,12 +288,10 @@ extern int soft_i2c_gpio_scl;
/* Ethernet support */
#ifdef CONFIG_SUN4I_EMAC
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#endif
#ifdef CONFIG_SUN7I_GMAC
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#define CONFIG_PHY_REALTEK
#endif

View File

@@ -56,7 +56,6 @@
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
#define CONFIG_PHY_ADDR 0
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */

View File

@@ -70,7 +70,6 @@
/* Ethernet config options */
#define CONFIG_MII
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_SPEAR_GPIO