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Merge git://git.denx.de/u-boot-imx

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This commit is contained in:
Tom Rini 2018-04-30 07:14:05 -04:00
commit b25f8e2112
33 changed files with 145 additions and 218 deletions

2
arch/arm/Kconfig
View File

@ -1373,7 +1373,7 @@ source "arch/arm/Kconfig.debug"
endmenu
config SPL_LDSCRIPT
default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if ARCH_MX23 || ARCH_MX28
default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64

4
arch/arm/cpu/arm926ejs/mxs/Makefile
View File

@ -14,8 +14,8 @@ obj-y += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
endif
# Specify the target for use in elftosb call
MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage.mx23.cfg
MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage.mx28.cfg
MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx23.cfg
MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx28.cfg
# Generate HAB-capable IVT
#

8
arch/arm/cpu/arm926ejs/mxs/mxs.c
View File

@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
/* Lowlevel init isn't used on i.MX28, so just have a dummy here */
void lowlevel_init(void) {}
__weak void lowlevel_init(void) {}
void reset_cpu(ulong ignored) __attribute__((noreturn));
@ -178,8 +178,7 @@ const char *get_imx_type(u32 imxtype)
int print_cpuinfo(void)
{
u32 cpurev;
struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
struct mxs_spl_data *data = MXS_SPL_DATA;
cpurev = get_cpu_rev();
printf("CPU: Freescale i.MX%s rev%d.%d at %d MHz\n",
@ -277,8 +276,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
int mxs_dram_init(void)
{
struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
struct mxs_spl_data *data = MXS_SPL_DATA;
if (data->mem_dram_size == 0) {
printf("MXS:\n"

5
arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg Normal file
View File

@ -0,0 +1,5 @@
DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
CALL 0x1000 0x0

6
arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg Normal file
View File

@ -0,0 +1,6 @@
DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
LOAD IVT 0x8000 0x1000
CALL HAB 0x8000 0x0

5
arch/arm/cpu/arm926ejs/mxs/spl_boot.c
View File

@ -120,8 +120,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
struct mxs_spl_data *data = MXS_SPL_DATA;
uint8_t bootmode = mxs_get_bootmode_index();
gd = &gdata;
@ -147,6 +146,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
}
}
#ifndef CONFIG_SPL_FRAMEWORK
/* Support aparatus */
inline void board_init_f(unsigned long bootflag)
{
@ -159,3 +159,4 @@ inline void board_init_r(gd_t *id, ulong dest_addr)
for (;;)
;
}
#endif

4
arch/arm/cpu/arm926ejs/start.S
View File

@ -105,9 +105,9 @@ flush_dcache:
/*
* Go setup Memory and board specific bits prior to relocation.
*/
mov ip, lr /* perserve link reg across call */
mov r4, lr /* perserve link reg across call */
bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
mov lr, r4 /* restore link */
#endif
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

1
arch/arm/cpu/u-boot-spl.lds
View File

@ -21,6 +21,7 @@ SECTIONS
*(.vectors)
CPUDIR/start.o (.text*)
*(.text*)
*(.glue*)
}
. = ALIGN(4);

4
arch/arm/dts/imx6ul-opos6ul.dtsi
View File

@ -1,5 +1,5 @@
/*
* Copyright 2017 Armadeus Systems <support@armadeus.com>
* Copyright 2018 Armadeus Systems <support@armadeus.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@ -99,6 +99,7 @@
/* eMMC */
&usdhc1 {
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
bus-width = <8>;
@ -161,6 +162,7 @@
};
pinctrl_usdhc1: usdhc1grp {
u-boot,dm-spl;
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059

2
arch/arm/dts/imx6ul-opos6uldev.dts
View File

@ -228,6 +228,7 @@
};
&uart1 {
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
@ -373,6 +374,7 @@
};
pinctrl_uart1: uart1grp {
u-boot,dm-spl;
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1

1
arch/arm/dts/imx6ul.dtsi
View File

@ -194,6 +194,7 @@
#size-cells = <1>;
reg = <0x02000000 0x40000>;
ranges;
u-boot,dm-spl;
ecspi1: ecspi@02008000 {
#address-cells = <1>;

4
arch/arm/include/asm/arch-mx6/opos6ul.h
View File

@ -9,8 +9,4 @@
int opos6ul_board_late_init(void);
#ifdef CONFIG_SPL_BUILD
void opos6ul_setup_uart_debug(void);
#endif
#endif

2
arch/arm/include/asm/arch-mxs/sys_proto.h
View File

@ -85,6 +85,8 @@ static const struct mxs_pair mxs_boot_modes[] = {
#define MXS_BM_SDMMC1_3V3 0x0a
#define MXS_BM_SDMMC1_1V8 0x1a
#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_SYS_TEXT_BASE - 0x200))
struct mxs_spl_data {
uint8_t boot_mode_idx;
uint32_t mem_dram_size;

6
arch/arm/include/asm/mach-imx/iomux-v3.h
View File

@ -147,10 +147,10 @@ typedef u64 iomux_v3_cfg_t;
#define PAD_CTL_ODE (1 << 11)
#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
#define PAD_CTL_SPEED_LOW (0 << 6)
#else
#if defined(CONFIG_MX6SL)
#define PAD_CTL_SPEED_LOW (1 << 6)
#else
#define PAD_CTL_SPEED_LOW (0 << 6)
#endif
#define PAD_CTL_SPEED_MED (2 << 6)
#define PAD_CTL_SPEED_HIGH (3 << 6)

4
arch/arm/mach-imx/mx6/Kconfig
View File

@ -73,6 +73,10 @@ config MX6UL_OPOS6UL
select DM_MMC
select DM_THERMAL
select SUPPORT_SPL
select SPL_DM if SPL
select SPL_OF_CONTROL if SPL
select SPL_SEPARATE_BSS if SPL
select SPL_PINCTRL if SPL
config MX6ULL
select SYS_L2CACHE_OFF

54
arch/arm/mach-imx/mx6/opos6ul.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2017 Armadeus Systems
* Copyright (C) 2018 Armadeus Systems
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -9,15 +9,12 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
#include <asm/arch/mx6ul_pins.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
#include <common.h>
#include <environment.h>
#include <fsl_esdhc.h>
#include <mmc.h>
DECLARE_GLOBAL_DATA_PTR;
@ -138,12 +135,6 @@ int board_late_init(void)
return opos6ul_board_late_init();
}
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
return cfg->esdhc_base == USDHC1_BASE_ADDR;
}
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@ -153,32 +144,9 @@ int dram_init(void)
#ifdef CONFIG_SPL_BUILD
#include <asm/arch/mx6-ddr.h>
#include <asm/arch/opos6ul.h>
#include <linux/libfdt.h>
#include <spl.h>
#define USDHC_PAD_CTRL ( \
PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST \
)
struct fsl_esdhc_cfg usdhc_cfg[1] = {
{USDHC1_BASE_ADDR, 0, 8},
};
static iomux_v3_cfg_t const usdhc1_pads[] = {
MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_READY_B__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_CE0_B__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_CE1_B__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_CLE__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
};
static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
.grp_addds = 0x00000030,
.grp_ddrmode_ctl = 0x00020000,
@ -240,11 +208,14 @@ static struct mx6_ddr3_cfg mem_ddr = {
.trasmin = 3750,
};
int board_mmc_init(bd_t *bis)
void board_boot_order(u32 *spl_boot_list)
{
imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
unsigned int bmode = readl(&src_base->sbmr2);
if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
spl_boot_list[0] = BOOT_DEVICE_UART;
else
spl_boot_list[0] = spl_boot_device();
}
static void ccgr_init(void)
@ -282,6 +253,11 @@ static void spl_dram_init(void)
mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
}
void spl_board_init(void)
{
preloader_console_init();
}
void board_init_f(ulong dummy)
{
ccgr_init();
@ -292,10 +268,6 @@ void board_init_f(ulong dummy)
/* setup GP timer */
timer_init();
/* UART clocks enabled and gd valid - init serial console */
opos6ul_setup_uart_debug();
preloader_console_init();
/* DDR initialization */
spl_dram_init();
}

20
board/armadeus/opos6uldev/board.c
View File

@ -1,12 +1,11 @@
/*
* Copyright (C) 2017 Armadeus Systems
* Copyright (C) 2018 Armadeus Systems
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/clock.h>
#include <asm/arch/mx6-pins.h>
#include <asm/arch/opos6ul.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
@ -104,20 +103,3 @@ int opos6ul_board_late_init(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#define UART_PAD_CTRL ( \
PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST \
)
static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
void opos6ul_setup_uart_debug(void)
{
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
}
#endif /* CONFIG_SPL_BUILD */

1
board/freescale/mx7dsabresd/MAINTAINERS
View File

@ -4,4 +4,3 @@ S: Maintained
F: board/freescale/mx7dsabresd
F: include/configs/mx7dsabresd.h
F: configs/mx7dsabresd_defconfig
F: configs/mx7dsabresd_secure_defconfig

14
board/warp7/Kconfig
View File

@ -6,4 +6,18 @@ config SYS_BOARD
config SYS_CONFIG_NAME
default "warp7"
config WARP7_ROOT_PART
int "Partition number to use for root filesystem"
default 2
help
The partition number to use for root filesystem this is the
partition that is typically specified with root=/dev/sdaX or
which gets converted into a root=PARTUUID=some_uuid.
config SYS_FDT_ADDR
hex "FDT load address"
default 0x83000000
help
The address the FDT file should be loaded to.
endif

1
board/warp7/MAINTAINERS
View File

@ -4,4 +4,3 @@ S: Maintained
F: board/warp7/
F: include/configs/warp7.h
F: configs/warp7_defconfig
F: configs/warp7_secure_defconfig

4
board/warp7/imximage.cfg
View File

@ -13,6 +13,10 @@
#include <config.h>
IMAGE_VERSION 2
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
BOOT_FROM sd
/*

23
board/warp7/warp7.c
View File

@ -10,6 +10,7 @@
#include <asm/arch/mx7-pins.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-imx/hab.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/io.h>
@ -57,6 +58,11 @@ int dram_init(void)
{
gd->ram_size = PHYS_SDRAM_SIZE;
/* Subtract the defined OPTEE runtime firmware length */
#ifdef CONFIG_OPTEE_TZDRAM_SIZE
gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
#endif
return 0;
}
@ -175,7 +181,17 @@ int checkboard(void)
else
mode = "non-secure";
#ifdef CONFIG_OPTEE_TZDRAM_SIZE
unsigned long optee_start, optee_end;
optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
mode, optee_start, optee_end);
#else
printf("Board: WARP7 in %s mode\n", mode);
#endif
return 0;
}
@ -203,6 +219,13 @@ int board_late_init(void)
*/
clrsetbits_le16(&wdog->wcr, 0, 0x10);
#ifdef CONFIG_SECURE_BOOT
/* Determine HAB state */
env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
#else
env_set_ulong(HAB_ENABLED_ENVNAME, 0);
#endif
#ifdef CONFIG_SERIAL_TAG
/* Set serial# standard environment variable based on OTP settings */
get_board_serial(&serialnr);

1
configs/mx7dsabresd_defconfig
View File

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_TARGET_MX7DSABRESD=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y

79
configs/mx7dsabresd_secure_defconfig
View File

@ -1,79 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_TARGET_MX7DSABRESD=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DM_GPIO=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SOFT_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_MXC_USB_OTG_HACTIVE=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_VIDEO=y
CONFIG_ERRNO_STR=y

5
configs/opos6uldev_defconfig
View File

@ -1,8 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_OPOS6ULDEV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
@ -11,6 +13,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttymxc0,115200"
@ -19,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y

8
configs/warp7_defconfig
View File

@ -1,7 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SECURE_BOOT=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_TARGET_WARP7=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
@ -19,13 +21,14 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SETEXPR=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DFU_MMC=y
CONFIG_FSL_ESDHC=y
@ -43,3 +46,6 @@ CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
CONFIG_OF_LIBFDT=y
CONFIG_OPTEE=y
CONFIG_OPTEE_LOAD_ADDR=0x84000000
CONFIG_BOOTM_OPTEE=y

43
configs/warp7_secure_defconfig
View File

@ -1,43 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_TARGET_WARP7=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_DFU_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_MXC_USB_OTG_HACTIVE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
CONFIG_OF_LIBFDT=y

3
drivers/net/fec_mxc.c
View File

@ -1230,7 +1230,7 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev)
struct phy_device *phydev;
int mask = 0xffffffff;
#ifdef CONFIG_PHYLIB
#ifdef CONFIG_FEC_MXC_PHYADDR
mask = 1 << CONFIG_FEC_MXC_PHYADDR;
#endif
@ -1345,6 +1345,7 @@ static const struct udevice_id fecmxc_ids[] = {
{ .compatible = "fsl,imx6sl-fec" },
{ .compatible = "fsl,imx6sx-fec" },
{ .compatible = "fsl,imx6ul-fec" },
{ .compatible = "fsl,imx53-fec" },
{ }
};

2
include/configs/mxs.h
View File

@ -44,8 +44,10 @@
/* Startup hooks */
/* SPL */
#ifndef CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#endif
/* Memory sizes */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */

9
include/configs/opos6uldev.h
View File

@ -15,11 +15,7 @@
#include "imx6_spl.h"
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_GPIO
#undef CONFIG_DM_MMC
#undef CONFIG_BLK
#define CONFIG_MXC_UART_BASE UART1_BASE
#undef CONFIG_DM_REGULATOR
#endif
#endif
@ -40,7 +36,6 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* MMC */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SUPPORT_EMMC_BOOT
/* USB */
@ -61,6 +56,7 @@
#endif
/* LCD */
#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
@ -72,6 +68,7 @@
#define CONFIG_VIDEO_MXS
#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
#endif
#endif
/* Environment is stored in the eMMC boot partition */
#define CONFIG_SYS_MMC_ENV_DEV 0

28
include/configs/warp7.h
View File

@ -10,6 +10,7 @@
#define __WARP7_CONFIG_H
#include "mx7_common.h"
#include <imximage.h>
#define PHYS_SDRAM_SIZE SZ_512M
@ -33,26 +34,39 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_DFU_ENV_SETTINGS \
"script=boot.scr\0" \
"script_signed=boot.scr.imx-signed\0" \
"image=zImage\0" \
"console=ttymxc0\0" \
"ethact=usb_ether\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_file=imx7s-warp.dtb\0" \
"fdt_addr=0x83000000\0" \
"fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \
"optee_addr=" __stringify(CONFIG_OPTEE_LOAD_ADDR)"\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"finduuid=part uuid mmc 0:2 uuid\0" \
"rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \
"finduuid=part uuid mmc 0:${rootpart} uuid\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=PARTUUID=${uuid} rootwait rw\0" \
"ivt_offset=" __stringify(BOOTROM_IVT_HDR_OFFSET)"\0"\
"warp7_auth_or_fail=hab_auth_img_or_fail ${hab_ivt_addr} ${filesize} 0;\0" \
"do_bootscript_hab=" \
"if test ${hab_enabled} -eq 1; then " \
"setexpr hab_ivt_addr ${loadaddr} - ${ivt_offset}; " \
"setenv script ${script_signed}; " \
"load mmc ${mmcdev}:${mmcpart} ${hab_ivt_addr} ${script}; " \
"run warp7_auth_or_fail; " \
"run bootscript; "\
"fi;\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run finduuid; " \
"run mmcargs; " \
@ -73,6 +87,7 @@
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev};" \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"run do_bootscript_hab;" \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
@ -139,4 +154,7 @@
#define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01"
/* Environment variable name to represent HAB enable state */
#define HAB_ENABLED_ENVNAME "hab_enabled"
#endif

3
include/imximage.h
View File

@ -14,6 +14,9 @@
#define APP_CODE_BARKER 0xB1
#define DCD_BARKER 0xB17219E9
/* Specify the offset of the IVT in the IMX header as expected by BootROM */
#define BOOTROM_IVT_HDR_OFFSET 0xC00
/*
* NOTE: This file must be kept in sync with arch/arm/include/asm/\
* mach-imx/imximage.cfg because tools/imximage.c can not

7
tools/imximage.c
View File

@ -520,7 +520,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
(uint32_t)fhdr_v2->self, 0,
hdr_v2->boot_data.size - imximage_ivt_offset -
imximage_csf_size);
printf("DCD Blocks: 00910000 %08x %08x\n",
printf("DCD Blocks: 0x00910000 0x%08x 0x%08x\n",
offs, be16_to_cpu(dcdlen));
}
} else {
@ -777,6 +777,11 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
(*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
fclose(fd);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */
if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
exit(EXIT_FAILURE);
}
return dcd_len;
}