net: stm32: add designware mac glue code for stm32

This patch adds glue code required for enabling the designware
mac on stm32f7 devices.

Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Michael Kurz
2017-01-22 16:04:27 +01:00
committed by Tom Rini
parent 081de09d49
commit b20b70fcc0
7 changed files with 122 additions and 3 deletions

View File

@@ -36,6 +36,7 @@ enum periph_clock {
SYSCFG_CLOCK_CFG,
TIMER2_CLOCK_CFG,
FMC_CLOCK_CFG,
STMMAC_CLOCK_CFG,
};
#endif /* __ASM_ARM_ARCH_PERIPH_H */

View File

@@ -0,0 +1,38 @@
/*
* (C) Copyright 2016
* Michael Kurz, michi.kurz@gmail.com.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _STM32_SYSCFG_H
#define _STM32_SYSCFG_H
struct stm32_syscfg_regs {
u32 memrmp;
u32 pmc;
u32 exticr1;
u32 exticr2;
u32 exticr3;
u32 exticr4;
u32 cmpcr;
};
/*
* SYSCFG registers base
*/
#define STM32_SYSCFG ((struct stm32_syscfg_regs *)STM32_SYSCFG_BASE)
/* SYSCFG memory remap register */
#define SYSCFG_MEMRMP_MEM_BOOT BIT(0)
#define SYSCFG_MEMRMP_SWP_FMC BIT(10)
/* SYSCFG peripheral mode configuration register */
#define SYSCFG_PMC_ADCXDC2 BIT(16)
#define SYSCFG_PMC_MII_RMII_SEL BIT(23)
/* Compensation cell control register */
#define SYSCFG_CMPCR_CMP_PD BIT(0)
#define SYSCFG_CMPCR_READY BIT(8)
#endif

View File

@@ -261,6 +261,11 @@ void clock_setup(int peripheral)
case FMC_CLOCK_CFG:
setbits_le32(&STM32_RCC->ahb3enr, RCC_AHB3ENR_FMC_EN);
break;
case STMMAC_CLOCK_CFG:
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_EN);
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_RX_EN);
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_TX_EN);
break;
default:
break;
}