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arm: socfpga: vining: Let DWMAC configure PHY reset GPIO

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The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
This commit is contained in:
Marek Vasut 2021-09-14 05:25:36 +02:00
parent cb3ed86cf1
commit b207cc92a2
1 changed files with 0 additions and 7 deletions
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7
board/softing/vining_fpga/socfpga.c
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@ -23,7 +23,6 @@ DECLARE_GLOBAL_DATA_PTR;
*/
int board_late_init(void)
{
const unsigned int phy_nrst_gpio = 0;
const unsigned int usb_nrst_gpio = 35;
int ret;
@ -33,12 +32,6 @@ int board_late_init(void)
/* Address of boot parameters for ATAG (if ATAG is used) */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
ret = gpio_request(phy_nrst_gpio, "phy_nrst_gpio");
if (!ret)
gpio_direction_output(phy_nrst_gpio, 1);
else
printf("Cannot remove PHY from reset!\n");
ret = gpio_request(usb_nrst_gpio, "usb_nrst_gpio");
if (!ret)
gpio_direction_output(usb_nrst_gpio, 1);