Merge git://git.denx.de/u-boot-rockchip

This commit is contained in:
Tom Rini 2017-02-11 10:38:21 -05:00
commit b16f6804b4
23 changed files with 96 additions and 170 deletions

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@ -36,7 +36,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-rock2-square.dtb \
rk3288-evb.dtb \
rk3288-fennec.dtb \
rk3288-miniarm.dtb \
rk3288-tinker.dtb \
rk3288-popmetal.dtb \
rk3399-evb.dtb
dtb-$(CONFIG_ARCH_MESON) += \

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@ -1,58 +0,0 @@
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;
#include "rk3288-miniarm.dtsi"
/ {
model = "Miniarm-RK3288";
compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288";
chosen {
stdout-path = &uart2;
};
};
&dmc {
rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
0x5 0x0>;
rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
0xa60 0x40 0x10 0x0>;
rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pwm1 {
status = "okay";
};
&uart2 {
u-boot,dm-pre-reloc;
reg-shift = <2>;
};
&sdmmc {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&gpio3 {
u-boot,dm-pre-reloc;
};
&gpio8 {
u-boot,dm-pre-reloc;
};

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@ -0,0 +1,58 @@
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;
#include "rk3288-tinker.dtsi"
/ {
model = "Tinker-RK3288";
compatible = "rockchip,rk3288-tinker", "rockchip,rk3288";
chosen {
stdout-path = &uart2;
};
};
&dmc {
rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
0x8 0x1f4>;
rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
0x0 0xc3 0x6 0x2>;
rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pwm1 {
status = "okay";
};
&uart2 {
u-boot,dm-pre-reloc;
reg-shift = <2>;
};
&sdmmc {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&gpio3 {
u-boot,dm-pre-reloc;
};
&gpio8 {
u-boot,dm-pre-reloc;
};

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@ -60,7 +60,7 @@ int rk3288_qos_init(void)
writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
if (!fdt_node_check_compatible(gd->fdt_blob, 0,
"rockchip,rk3288-miniarm"))
"rockchip,rk3288-tinker"))
{
/* set isp qos to higher priority */
writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);

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@ -37,11 +37,11 @@ config TARGET_POPMETAL_RK3288
2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
GPIOs and display interface.
config TARGET_MINIARM_RK3288
bool "miniarm-RK3288"
select BOARD_LATE_INIT
config TARGET_TINKER_RK3288
bool "Tinker-RK3288"
select BOARD_LATE_INIT
help
Miniarm is a RK3288-based development board with 2 USB ports, HDMI,
Tinker is a RK3288-based development board with 2 USB ports, HDMI,
micro-SD card, audio, Gigabit Ethernet. It also includes on-board
8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
I2C, SPI, UART, GPIOs.
@ -124,6 +124,6 @@ source "board/rockchip/evb_rk3288/Kconfig"
source "board/rockchip/fennec_rk3288/Kconfig"
source "board/rockchip/miniarm_rk3288/Kconfig"
source "board/rockchip/tinker_rk3288/Kconfig"
endif

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@ -12,9 +12,9 @@ F: board/google/veyron/
F: include/configs/veyron.h
F: configs/chromebit_mickey_defconfig
CHROMEBIT MINNIE BOARD
CHROMEBOOK MINNIE BOARD
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: board/google/veyron/
F: include/configs/veyron.h
F: configs/chromebit_minnie_defconfig
F: configs/chromebook_minnie_defconfig

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@ -1,6 +0,0 @@
MINIARM-RK3288
M: Lin Huang <hl@rock-chips.com>
S: Maintained
F: board/rockchip/miniarm_rk3288
F: include/configs/miniarm_rk3288.h
F: configs/miniarm-rk3288_defconfig

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@ -1,13 +1,13 @@
if TARGET_MINIARM_RK3288
if TARGET_TINKER_RK3288
config SYS_BOARD
default "miniarm_rk3288"
default "tinker_rk3288"
config SYS_VENDOR
default "rockchip"
config SYS_CONFIG_NAME
default "miniarm_rk3288"
default "tinker_rk3288"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y

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@ -0,0 +1,6 @@
TINKER-RK3288
M: Lin Huang <hl@rock-chips.com>
S: Maintained
F: board/rockchip/tinker_rk3288
F: include/configs/tinker_rk3288.h
F: configs/tinker-rk3288_defconfig

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@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += miniarm-rk3288.o
obj-y += tinker-rk3288.o

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@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
CONFIG_TARGET_FIREFLY_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
@ -28,6 +29,7 @@ CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_OF_PLATDATA=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
@ -70,4 +72,3 @@ CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
# CONFIG_SPL_OF_LIBFDT is not set

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@ -3,9 +3,9 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
CONFIG_TARGET_MINIARM_RK3288=y
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-miniarm"
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set

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@ -42,7 +42,7 @@ At present seven RK3288 boards are supported:
- Fennec RK3288 - use fennec-rk3288 configuration
- Firefly RK3288 - use firefly-rk3288 configuration
- Hisense Chromebook - use chromebook_jerry configuration
- Miniarm RK3288 - use miniarm-rk3288 configuration
- Tinker RK3288 - use tinker-rk3288 configuration
- PopMetal RK3288 - use popmetal-rk3288 configuration
- Radxa Rock 2 - use rock2 configuration

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@ -13,20 +13,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
*/
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
#else
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#endif
#define CONFIG_SYS_WHITE_ON_BLACK
#endif

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@ -13,20 +13,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
*/
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
#else
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#endif
#define CONFIG_SYS_WHITE_ON_BLACK
#endif

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@ -16,11 +16,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#define CONFIG_SYS_WHITE_ON_BLACK

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@ -20,20 +20,6 @@
#define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
*/
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
#else
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#endif
#endif
#endif

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@ -13,20 +13,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
*/
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
#else
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#endif
#define CONFIG_SYS_WHITE_ON_BLACK
#endif

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@ -17,20 +17,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
*/
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
#else
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#endif
#define CONFIG_SYS_WHITE_ON_BLACK
#endif

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@ -31,4 +31,18 @@
#endif
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
*/
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
#else
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#endif
#endif /* _ROCKCHIP_COMMON_H_ */

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@ -18,20 +18,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
*/
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
#else
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#endif
#define CONFIG_SYS_WHITE_ON_BLACK
#endif