Merge git://git.denx.de/u-boot-rockchip
This commit is contained in:
commit
b16f6804b4
@ -36,7 +36,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3288-rock2-square.dtb \
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rk3288-evb.dtb \
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rk3288-fennec.dtb \
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rk3288-miniarm.dtb \
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rk3288-tinker.dtb \
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rk3288-popmetal.dtb \
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rk3399-evb.dtb
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dtb-$(CONFIG_ARCH_MESON) += \
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@ -1,58 +0,0 @@
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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#include "rk3288-miniarm.dtsi"
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/ {
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model = "Miniarm-RK3288";
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compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288";
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chosen {
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stdout-path = &uart2;
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};
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};
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&dmc {
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rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
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0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
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0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
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0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
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0x5 0x0>;
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rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
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0xa60 0x40 0x10 0x0>;
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rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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};
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&pwm1 {
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status = "okay";
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};
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&uart2 {
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u-boot,dm-pre-reloc;
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reg-shift = <2>;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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};
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&emmc {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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&gpio8 {
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u-boot,dm-pre-reloc;
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};
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58
arch/arm/dts/rk3288-tinker.dts
Normal file
58
arch/arm/dts/rk3288-tinker.dts
Normal file
@ -0,0 +1,58 @@
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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#include "rk3288-tinker.dtsi"
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/ {
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model = "Tinker-RK3288";
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compatible = "rockchip,rk3288-tinker", "rockchip,rk3288";
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chosen {
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stdout-path = &uart2;
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};
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};
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&dmc {
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rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
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0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
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0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
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0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
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0x8 0x1f4>;
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rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
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0x0 0xc3 0x6 0x2>;
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rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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};
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&pwm1 {
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status = "okay";
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};
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&uart2 {
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u-boot,dm-pre-reloc;
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reg-shift = <2>;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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};
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&emmc {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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&gpio8 {
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u-boot,dm-pre-reloc;
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};
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@ -60,7 +60,7 @@ int rk3288_qos_init(void)
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
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if (!fdt_node_check_compatible(gd->fdt_blob, 0,
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"rockchip,rk3288-miniarm"))
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"rockchip,rk3288-tinker"))
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{
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/* set isp qos to higher priority */
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
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@ -37,11 +37,11 @@ config TARGET_POPMETAL_RK3288
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2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
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GPIOs and display interface.
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config TARGET_MINIARM_RK3288
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bool "miniarm-RK3288"
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select BOARD_LATE_INIT
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config TARGET_TINKER_RK3288
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bool "Tinker-RK3288"
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select BOARD_LATE_INIT
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help
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Miniarm is a RK3288-based development board with 2 USB ports, HDMI,
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Tinker is a RK3288-based development board with 2 USB ports, HDMI,
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micro-SD card, audio, Gigabit Ethernet. It also includes on-board
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8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
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I2C, SPI, UART, GPIOs.
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@ -124,6 +124,6 @@ source "board/rockchip/evb_rk3288/Kconfig"
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source "board/rockchip/fennec_rk3288/Kconfig"
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source "board/rockchip/miniarm_rk3288/Kconfig"
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source "board/rockchip/tinker_rk3288/Kconfig"
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endif
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@ -12,9 +12,9 @@ F: board/google/veyron/
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F: include/configs/veyron.h
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F: configs/chromebit_mickey_defconfig
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CHROMEBIT MINNIE BOARD
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CHROMEBOOK MINNIE BOARD
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M: Simon Glass <sjg@chromium.org>
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S: Maintained
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F: board/google/veyron/
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F: include/configs/veyron.h
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F: configs/chromebit_minnie_defconfig
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F: configs/chromebook_minnie_defconfig
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@ -1,6 +0,0 @@
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MINIARM-RK3288
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M: Lin Huang <hl@rock-chips.com>
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S: Maintained
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F: board/rockchip/miniarm_rk3288
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F: include/configs/miniarm_rk3288.h
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F: configs/miniarm-rk3288_defconfig
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@ -1,13 +1,13 @@
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if TARGET_MINIARM_RK3288
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if TARGET_TINKER_RK3288
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config SYS_BOARD
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default "miniarm_rk3288"
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default "tinker_rk3288"
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config SYS_VENDOR
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default "rockchip"
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config SYS_CONFIG_NAME
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default "miniarm_rk3288"
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default "tinker_rk3288"
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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6
board/rockchip/tinker_rk3288/MAINTAINERS
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6
board/rockchip/tinker_rk3288/MAINTAINERS
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@ -0,0 +1,6 @@
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TINKER-RK3288
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M: Lin Huang <hl@rock-chips.com>
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S: Maintained
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F: board/rockchip/tinker_rk3288
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F: include/configs/tinker_rk3288.h
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F: configs/tinker-rk3288_defconfig
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@ -4,4 +4,4 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += miniarm-rk3288.o
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obj-y += tinker-rk3288.o
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ROCKCHIP_RK3288=y
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CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
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CONFIG_TARGET_FIREFLY_RK3288=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
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@ -28,6 +29,7 @@ CONFIG_SPL_PARTITION_UUIDS=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_SPL_OF_PLATDATA=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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@ -70,4 +72,3 @@ CONFIG_CONSOLE_SCROLL_LINES=10
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CONFIG_USE_TINY_PRINTF=y
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_ERRNO_STR=y
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# CONFIG_SPL_OF_LIBFDT is not set
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ROCKCHIP_RK3288=y
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CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
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CONFIG_TARGET_MINIARM_RK3288=y
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CONFIG_TARGET_TINKER_RK3288=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-miniarm"
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
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CONFIG_SILENT_CONSOLE=y
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CONFIG_CONSOLE_MUX=y
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# CONFIG_DISPLAY_CPUINFO is not set
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@ -42,7 +42,7 @@ At present seven RK3288 boards are supported:
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- Fennec RK3288 - use fennec-rk3288 configuration
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- Firefly RK3288 - use firefly-rk3288 configuration
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- Hisense Chromebook - use chromebook_jerry configuration
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- Miniarm RK3288 - use miniarm-rk3288 configuration
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- Tinker RK3288 - use tinker-rk3288 configuration
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- PopMetal RK3288 - use popmetal-rk3288 configuration
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- Radxa Rock 2 - use rock2 configuration
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@ -13,20 +13,6 @@
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 1
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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/* SPL @ 32k for 34k
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* u-boot directly after @ 68k for 400k or so
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* ENV @ 992k
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*/
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#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
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#else
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/* SPL @ 32k for ~36k
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* ENV @ 96k
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* u-boot @ 128K
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*/
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#define CONFIG_ENV_OFFSET (96 * 1024)
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#endif
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#define CONFIG_SYS_WHITE_ON_BLACK
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#endif
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@ -13,20 +13,6 @@
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 1
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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/* SPL @ 32k for 34k
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* u-boot directly after @ 68k for 400k or so
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* ENV @ 992k
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*/
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#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
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#else
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/* SPL @ 32k for ~36k
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* ENV @ 96k
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* u-boot @ 128K
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*/
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#define CONFIG_ENV_OFFSET (96 * 1024)
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#endif
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#define CONFIG_SYS_WHITE_ON_BLACK
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#endif
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@ -16,11 +16,6 @@
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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/* SPL @ 32k for ~36k
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* ENV @ 96k
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* u-boot @ 128K
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*/
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#define CONFIG_ENV_OFFSET (96 * 1024)
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#define CONFIG_SYS_WHITE_ON_BLACK
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@ -20,20 +20,6 @@
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#define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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/* SPL @ 32k for 34k
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* u-boot directly after @ 68k for 400k or so
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* ENV @ 992k
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*/
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#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
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#else
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/* SPL @ 32k for ~36k
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* ENV @ 96k
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* u-boot @ 128K
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*/
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#define CONFIG_ENV_OFFSET (96 * 1024)
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#endif
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#endif
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#endif
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@ -13,20 +13,6 @@
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 1
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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/* SPL @ 32k for 34k
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* u-boot directly after @ 68k for 400k or so
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* ENV @ 992k
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*/
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#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
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#else
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/* SPL @ 32k for ~36k
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* ENV @ 96k
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* u-boot @ 128K
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*/
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#define CONFIG_ENV_OFFSET (96 * 1024)
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#endif
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#define CONFIG_SYS_WHITE_ON_BLACK
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#endif
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@ -17,20 +17,6 @@
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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/* SPL @ 32k for 34k
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* u-boot directly after @ 68k for 400k or so
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* ENV @ 992k
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*/
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#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
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#else
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/* SPL @ 32k for ~36k
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* ENV @ 96k
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* u-boot @ 128K
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*/
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#define CONFIG_ENV_OFFSET (96 * 1024)
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#endif
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#define CONFIG_SYS_WHITE_ON_BLACK
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#endif
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|
@ -31,4 +31,18 @@
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#endif
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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/* SPL @ 32k for 34k
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* u-boot directly after @ 68k for 400k or so
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* ENV @ 992k
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*/
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#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
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#else
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/* SPL @ 32k for ~36k
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* ENV @ 96k
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* u-boot @ 128K
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*/
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#define CONFIG_ENV_OFFSET (96 * 1024)
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#endif
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#endif /* _ROCKCHIP_COMMON_H_ */
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|
@ -18,20 +18,6 @@
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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/* SPL @ 32k for 34k
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||||
* u-boot directly after @ 68k for 400k or so
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* ENV @ 992k
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*/
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||||
#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
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#else
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/* SPL @ 32k for ~36k
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||||
* ENV @ 96k
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||||
* u-boot @ 128K
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||||
*/
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||||
#define CONFIG_ENV_OFFSET (96 * 1024)
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||||
#endif
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||||
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||||
#define CONFIG_SYS_WHITE_ON_BLACK
|
||||
|
||||
#endif
|
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