From b12f62374e83675bc65174c2b4b7e3c6c368aa78 Mon Sep 17 00:00:00 2001 From: David Lamparter Date: Thu, 6 May 2021 20:24:30 +0200 Subject: [PATCH] nvme: fix for big endian systems writel() and co. already include the endian swap; doing the swap twice is, er, unhelpful. Tested on a P4080DS, which boots perfectly fine off NVMe with this. Signed-off-by: David Lamparter Reviewed-by: Bin Meng --- drivers/nvme/nvme.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index c61dab20c5..d554ec54cb 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -157,7 +157,7 @@ static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index) invalidate_dcache_range(start, stop); - return le16_to_cpu(readw(&(nvmeq->cqes[index].status))); + return readw(&(nvmeq->cqes[index].status)); } /** @@ -221,7 +221,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq, } if (result) - *result = le32_to_cpu(readl(&(nvmeq->cqes[head].result))); + *result = readl(&(nvmeq->cqes[head].result)); if (++head == nvmeq->q_depth) { head = 0; @@ -304,7 +304,7 @@ static int nvme_enable_ctrl(struct nvme_dev *dev) { dev->ctrl_config &= ~NVME_CC_SHN_MASK; dev->ctrl_config |= NVME_CC_ENABLE; - writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); + writel(dev->ctrl_config, &dev->bar->cc); return nvme_wait_ready(dev, true); } @@ -313,7 +313,7 @@ static int nvme_disable_ctrl(struct nvme_dev *dev) { dev->ctrl_config &= ~NVME_CC_SHN_MASK; dev->ctrl_config &= ~NVME_CC_ENABLE; - writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); + writel(dev->ctrl_config, &dev->bar->cc); return nvme_wait_ready(dev, false); }