board: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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York Sun
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@@ -15,3 +15,21 @@ config SYS_CONFIG_NAME
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source "board/freescale/common/Kconfig"
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endif
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if TARGET_LS1012A2G5RDB
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config SYS_BOARD
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default "ls1012ardb"
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config SYS_VENDOR
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default "freescale"
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config SYS_SOC
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default "fsl-layerscape"
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config SYS_CONFIG_NAME
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default "ls1012a2g5rdb"
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source "board/freescale/common/Kconfig"
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endif
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@@ -8,3 +8,10 @@ F: configs/ls1012ardb_qspi_defconfig
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M: Sumit Garg <sumit.garg@nxp.com>
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S: Maintained
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F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
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LS1012A2G5RDB BOARD
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M: Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
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S: Maintained
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F: board/freescale/ls1012ardb/
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F: include/configs/ls1012a2g5rdb.h
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F: configs/ls1012a2g5rdb_qspi_defconfig
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@@ -52,3 +52,46 @@ U-boot | 1MB | 0x4010_0000
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U-boot Env | 1MB | 0x4020_0000
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PPA FIT image | 2MB | 0x4050_0000
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Linux ITB | ~53MB | 0x40A0_0000
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LS1012A2G5RDB board Overview
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-----------------------
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- SERDES Connections, 3 lanes supporting:
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- SGMII, SGMII 2.5
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- SATA 3.0
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- DDR Controller
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- 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s
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-QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
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signals to
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- QSPI NOR flash memory
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- USB 3.0
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- one high-speed USB 2.0/3.0 port.
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- SDIO WiFi, SPI
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- 2 I2C controllers
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- One SATA onboard connectors
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- UART
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- The LS1012A processor consists of two UART controllers,
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out of which only UART1 is used on 2G5RDB.
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- ARM JTAG support
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Major Difference between LS1012ARDB and LS1012A-2G5RDB
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------------------------------------------------------
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1. LS1012A-2G5RDB has Type C USB connector unlike USB Type A/B of LS1012ARDB
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2. LS1012A-2G5RDB has 2 2.5G AQR PHY unlike 2 1G Realtek RTL8211FS PHYs
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of LS1012ARDB
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3. LS1012A-2G5RDB is not having Arduino header
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4. LS1012A-2G5RDB doesn't have PCI slot
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Booting Options
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---------------
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QSPI Flash
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QSPI flash map
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--------------
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Images | Size |QSPI Flash Address
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------------------------------------------
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RCW + PBI | 1MB | 0x4000_0000
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U-boot | 1MB | 0x4010_0000
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U-boot Env | 1MB | 0x4030_0000
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PPA FIT image | 2MB | 0x4040_0000
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PFE firmware | 20K | 0x00a0_0000
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Linux ITB | ~53MB | 0x4100_0000
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@@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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#ifdef CONFIG_TARGET_LS1012ARDB
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u8 in1;
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puts("Board: LS1012ARDB ");
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@@ -77,7 +78,10 @@ int checkboard(void)
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puts(": bank2\n");
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else
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puts("unknown\n");
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#else
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puts("Board: LS1012A2G5RDB ");
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#endif
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return 0;
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}
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@@ -150,6 +154,7 @@ int board_init(void)
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return 0;
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}
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#ifdef CONFIG_TARGET_LS1012ARDB
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int esdhc_status_fixup(void *blob, const char *compat)
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{
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char esdhc1_path[] = "/soc/esdhc@1580000";
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@@ -193,7 +198,6 @@ int esdhc_status_fixup(void *blob, const char *compat)
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if (mux_sdhc2 == 2 || mux_sdhc2 == 0)
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sdhc2_en = true;
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}
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if (sdhc2_en)
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do_fixup_by_path(blob, esdhc1_path, "status", "okay",
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sizeof("okay"), 1);
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@@ -202,6 +206,7 @@ int esdhc_status_fixup(void *blob, const char *compat)
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sizeof("disabled"), 1);
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return 0;
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}
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#endif
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int ft_board_setup(void *blob, bd_t *bd)
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{
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