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rockchip: Tidy up the register-access macros

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These work reasonable well, but there are a few errors:

- Brackets should be used to avoid unexpected side-effects
- When setting bits, the corresponding upper 16 bits should be set also

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2016-01-21 19:45:12 -07:00
parent 2460d18c33
commit affd4a9fa0
1 changed files with 4 additions and 3 deletions
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7
arch/arm/include/asm/arch-rockchip/hardware.h
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@ -7,14 +7,15 @@
#ifndef _ASM_ARCH_HARDWARE_H
#define _ASM_ARCH_HARDWARE_H
#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set)
#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set))
#define RK_SETBITS(set) RK_CLRSETBITS(0, set)
#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0)
#define TIMER7_BASE 0xff810020
#define rk_clrsetreg(addr, clr, set) writel((clr) << 16 | (set), addr)
#define rk_clrsetreg(addr, clr, set) \
writel(((clr) | (set)) << 16 | (set), addr)
#define rk_clrreg(addr, clr) writel((clr) << 16, addr)
#define rk_setreg(addr, set) writel(set, addr)
#define rk_setreg(addr, set) writel((set) << 16 | (set), addr)
#endif