cpuat91: convert to new at91 soc architecture
convert the board to the new soc architecture update default config i2c upgrade taken from eb_cpux9k2.h & board/BuS/eb_cpux9k2/cpux9k2.c Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
This commit is contained in:
Eric Bénard
Reinhard Meyer
parent
64037fb453
commit
af4b8b4bdb
2
Makefile
2
Makefile
@ -1883,7 +1883,7 @@ CPUAT91_RAM_config \
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CPUAT91_config : unconfig
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@mkdir -p $(obj)include
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@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
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@$(MKCONFIG) -n $@ -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200
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@$(MKCONFIG) -n $@ -a cpuat91 arm arm920t cpuat91 eukrea at91
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#########################################################################
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## ARM926EJ-S Systems
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@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2006 Eukrea Electromatique <www.eukrea.com>
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* (C) Copyright 2006-2010 Eukrea Electromatique <www.eukrea.com>
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* Eric Benard <eric@eukrea.com>
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* based on at91rm9200dk.c which is :
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* (C) Copyright 2002
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@ -27,13 +27,11 @@
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#include <common.h>
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#include <netdev.h>
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#include <asm/arch/AT91RM9200.h>
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#include <asm/io.h>
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#if defined(CONFIG_DRIVER_ETHER)
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#include <at91rm9200_net.h>
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#include <ks8721.h>
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#endif
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_pio.h>
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#include <asm/arch/at91_pmc.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -61,31 +59,7 @@ int dram_init(void)
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return 0;
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}
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#if defined(CONFIG_DRIVER_ETHER)
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#if defined(CONFIG_CMD_NET)
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/*
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* Name:
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* at91rm9200_GetPhyInterface
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* Description:
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* Initialise the interface functions to the PHY
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* Arguments:
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* None
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* Return value:
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* None
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*/
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
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{
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p_phyops->Init = ks8721_initphy;
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p_phyops->IsPhyConnected = ks8721_isphyconnected;
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p_phyops->GetLinkSpeed = ks8721_getlinkspeed;
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p_phyops->AutoNegotiate = ks8721_autonegotiate;
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}
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#endif /* CONFIG_CMD_NET */
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#endif /* CONFIG_DRIVER_ETHER */
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#ifdef CONFIG_DRIVER_AT91EMAC
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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@ -93,3 +67,20 @@ int board_eth_init(bd_t *bis)
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return rc;
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}
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#endif
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#ifdef CONFIG_SOFT_I2C
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void i2c_init_board(void)
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{
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u32 pin;
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
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writel(1 << AT91_ID_PIOA, &pmc->pcer);
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pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
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writel(pin, &pio->pioa.idr);
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writel(pin, &pio->pioa.pudr);
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writel(pin, &pio->pioa.per);
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writel(pin, &pio->pioa.oer);
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writel(pin, &pio->pioa.sodr);
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}
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#endif
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@ -1,5 +1,5 @@
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/*
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* CPUAT91 by (C) Copyright 2006 Eric Benard
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* CPUAT91 by (C) Copyright 2006-2010 Eric Benard
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* eric@eukrea.com
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*
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* Configuration settings for the CPUAT91 board.
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@ -23,15 +23,12 @@
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_AT91_LEGACY
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#ifndef _CONFIG_CPUAT91_H
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#define _CONFIG_CPUAT91_H
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#ifdef CONFIG_CPUAT91_RAM
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#define CONFIG_SKIP_LOWLEVEL_INIT 1
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#define CONFIG_SKIP_RELOCATE_UBOOT 1
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#define CONFIG_CPUAT91 1
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#else
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#define CONFIG_BOOTDELAY 1
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#endif
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@ -43,6 +40,7 @@
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#define CONFIG_ARM920T 1
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#define CONFIG_AT91RM9200 1
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#define CONFIG_CPUAT91 1
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#undef CONFIG_USE_IRQ
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#define USE_920T_MMU 1
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@ -89,16 +87,36 @@
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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#define CONFIG_HARD_I2C 1
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#undef CONFIG_HARD_I2C
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#define CONFIG_SOFT_I2C 1
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#define AT91_PIN_SDA (1<<25)
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#define AT91_PIN_SCL (1<<26)
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#if defined(CONFIG_HARD_I2C)
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#define CONFIG_SYS_I2C_INIT_BOARD 1
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#define CONFIG_SYS_I2C_SPEED 50000
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#define CONFIG_SYS_I2C_SLAVE 0
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#define I2C_INIT i2c_init_board();
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#define I2C_ACTIVE writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
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#define I2C_TRISTATE writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
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#define I2C_READ ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0)
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#define I2C_SDA(bit) \
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if (bit) \
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writel(AT91_PMX_AA_TWD, &pio->pioa.sodr); \
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else \
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writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
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#define I2C_SCL(bit) \
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if (bit) \
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writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr); \
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else \
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writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
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#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED)
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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#endif
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#define CONFIG_BOOTP_BOOTFILESIZE 1
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#define CONFIG_BOOTP_BOOTPATH 1
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@ -117,10 +135,8 @@
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_NFS
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#if defined(CONFIG_HARD_I2C)
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#define CONFIG_CMD_EEPROM 1
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#define CONFIG_CMD_I2C 1
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#endif
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x20000000
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@ -148,6 +164,7 @@
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#define PHYS_FLASH_1 0x10000000
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#if defined(CONFIG_CMD_USB)
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#define CONFIG_USB_OHCI_NEW 1
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@ -230,4 +247,4 @@
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"flashboot=run ramargs;bootm 10040000\0" \
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"netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \
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"bootm 21000000\0"
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#endif /* __CONFIG_H */
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#endif /* _CONFIG_CPUAT91_H */
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