pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS
If a platform defines CONFIG_NR_DRAM_BANKS, each DRAM bank will be added as a PCI region. The number of MAX_PCI_REGIONS therefore needs to scale with the number of DRAM banks, otherwise we will end up with too little space in the hose->regions array to store all system memory regions. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -545,7 +545,11 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
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extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
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struct pci_config_table *);
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#define MAX_PCI_REGIONS 7
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#ifdef CONFIG_NR_DRAM_BANKS
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#define MAX_PCI_REGIONS (CONFIG_NR_DRAM_BANKS + 7)
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#else
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#define MAX_PCI_REGIONS 7
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#endif
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#define INDIRECT_TYPE_NO_PCIE_LINK 1
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