arm: mvebu: Add Helios4 Armada 38x initial support
The helios4 is built on the SolidRun Armada 38x SOM. The port os based on the ClearFog board, using information from https://github.com/helios-4/u-boot-marvell as well as dtb input from https://github.com/helios-4/linux-marvell Signed-off-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Dennis Gilmore
committed by
Stefan Roese
Stefan Roese
parent
813d1fb56d
commit
ae28a5f830
@@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
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armada-375-db.dtb \
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armada-388-clearfog.dtb \
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armada-388-gp.dtb \
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armada-388-helios4.dtb \
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armada-385-amc.dtb \
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armada-7040-db.dtb \
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armada-7040-db-nand.dtb \
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314
arch/arm/dts/armada-388-helios4.dts
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314
arch/arm/dts/armada-388-helios4.dts
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@@ -0,0 +1,314 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device Tree file for Helios4
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* based on SolidRun Clearfog revision A1 rev 2.0 (88F6828)
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*
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* Copyright (C) 2017 Aditya Prayoga <aditya@kobol.io>
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*
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*/
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/dts-v1/;
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#include "armada-388.dtsi"
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#include "armada-38x-solidrun-microsom.dtsi"
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/ {
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model = "Helios4";
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compatible = "kobol,helios4", "marvell,armada388",
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"marvell,armada385", "marvell,armada380";
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memory {
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device_type = "memory";
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reg = <0x00000000 0x80000000>; /* 2 GB */
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};
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aliases {
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/* So that mvebu u-boot can update the MAC addresses */
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ethernet1 = ð0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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reg_12v: regulator-12v {
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compatible = "regulator-fixed";
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regulator-name = "power_brick_12V";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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vin-supply = <®_12v>;
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};
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reg_5p0v_hdd: regulator-5v-hdd {
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compatible = "regulator-fixed";
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regulator-name = "5V_HDD";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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vin-supply = <®_12v>;
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};
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reg_5p0v_usb: regulator-5v-usb {
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compatible = "regulator-fixed";
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regulator-name = "USB-PWR";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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enable-active-high;
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gpio = <&expander0 6 GPIO_ACTIVE_HIGH>;
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vin-supply = <®_12v>;
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};
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system-leds {
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compatible = "gpio-leds";
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status-led {
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label = "helios4:green:status";
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gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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default-state = "on";
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};
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fault-led {
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label = "helios4:red:fault";
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gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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};
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io-leds {
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compatible = "gpio-leds";
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sata1-led {
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label = "helios4:green:ata1";
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gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "ata1";
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default-state = "off";
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};
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sata2-led {
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label = "helios4:green:ata2";
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gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "ata2";
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default-state = "off";
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};
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sata3-led {
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label = "helios4:green:ata3";
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gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "ata3";
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default-state = "off";
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};
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sata4-led {
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label = "helios4:green:ata4";
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gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "ata4";
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default-state = "off";
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};
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usb-led {
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label = "helios4:green:usb";
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gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "usb-host";
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default-state = "off";
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};
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};
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fan1: j10-pwm {
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compatible = "pwm-fan";
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pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */
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};
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fan2: j17-pwm {
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compatible = "pwm-fan";
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pwms = <&gpio1 23 40000>; /* Target freq:25 kHz */
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};
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usb2_phy: usb2-phy {
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compatible = "usb-nop-xceiv";
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vbus-regulator = <®_5p0v_usb>;
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};
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usb3_phy: usb3-phy {
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compatible = "usb-nop-xceiv";
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};
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soc {
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internal-regs {
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i2c@11000 {
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clock-frequency = <400000>;
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "default";
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status = "okay";
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/*
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* PCA9655 GPIO expander, up to 1MHz clock.
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* 0-Board Revision bit 0 #
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* 1-Board Revision bit 1 #
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* 5-USB3 overcurrent
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* 6-USB3 power
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*/
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expander0: gpio-expander@20 {
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/*
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* This is how it should be:
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* compatible = "onnn,pca9655",
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* "nxp,pca9555";
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* but you can't do this because of
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* the way I2C works.
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*/
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compatible = "nxp,pca9555";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pca0_pins>;
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interrupt-parent = <&gpio0>;
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interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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board_rev_bit_0 {
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gpio-hog;
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gpios = <0 GPIO_ACTIVE_LOW>;
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input;
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line-name = "board-rev-0";
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};
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board_rev_bit_1 {
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gpio-hog;
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gpios = <1 GPIO_ACTIVE_LOW>;
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input;
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line-name = "board-rev-1";
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};
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usb3_ilimit {
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gpio-hog;
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gpios = <5 GPIO_ACTIVE_HIGH>;
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input;
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line-name =
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"usb-overcurrent-status";
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};
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};
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temp_sensor: temp@4c {
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compatible = "ti,lm75";
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reg = <0x4c>;
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vcc-supply = <®_3p3v>;
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};
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};
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i2c@11100 {
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/*
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* External I2C Bus for user peripheral
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*/
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clock-frequency = <400000>;
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pinctrl-0 = <&helios_i2c1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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sata@a8000 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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sata0: sata-port@0 {
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reg = <0>;
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};
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sata1: sata-port@1 {
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reg = <1>;
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};
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};
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sata@e0000 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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sata2: sata-port@0 {
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reg = <0>;
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};
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sata3: sata-port@1 {
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reg = <1>;
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};
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};
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spi@10680 {
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pinctrl-0 = <&spi1_pins
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µsom_spi1_cs_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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sdhci@d8000 {
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bus-width = <4>;
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cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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pinctrl-0 = <&helios_sdhci_pins
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&helios_sdhci_cd_pins>;
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pinctrl-names = "default";
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status = "okay";
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vmmc = <®_3p3v>;
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wp-inverted;
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};
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usb@58000 {
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usb-phy = <&usb2_phy>;
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status = "okay";
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};
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usb3@f0000 {
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status = "okay";
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};
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usb3@f8000 {
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status = "okay";
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};
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pinctrl@18000 {
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pca0_pins: pca0-pins {
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marvell,pins = "mpp23";
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marvell,function = "gpio";
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};
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microsom_phy0_int_pins: microsom-phy0-int-pins {
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marvell,pins = "mpp18";
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marvell,function = "gpio";
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};
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helios_i2c1_pins: i2c1-pins {
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marvell,pins = "mpp26", "mpp27";
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marvell,function = "i2c1";
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};
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helios_sdhci_cd_pins: helios-sdhci-cd-pins {
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marvell,pins = "mpp20";
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marvell,function = "gpio";
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};
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helios_sdhci_pins: helios-sdhci-pins {
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marvell,pins = "mpp21", "mpp28",
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"mpp37", "mpp38",
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"mpp39", "mpp40";
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marvell,function = "sd0";
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};
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helios_led_pins: helios-led-pins {
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marvell,pins = "mpp24", "mpp25",
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"mpp49", "mpp50",
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"mpp52", "mpp53",
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"mpp54";
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marvell,function = "gpio";
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};
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helios_fan_pins: helios-fan-pins {
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marvell,pins = "mpp41", "mpp43",
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"mpp48", "mpp55";
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marvell,function = "gpio";
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};
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microsom_spi1_cs_pins: spi1-cs-pins {
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marvell,pins = "mpp59";
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marvell,function = "spi1";
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};
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};
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};
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};
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};
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101
arch/arm/dts/armada-38x-solidrun-microsom.dtsi
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101
arch/arm/dts/armada-38x-solidrun-microsom.dtsi
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@@ -0,0 +1,101 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device Tree file for SolidRun Armada 38x Microsom
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*
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* Copyright (C) 2015 Russell King
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*
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* This board is in development; the contents of this file work with
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* the A1 rev 2.0 of the board, which does not represent final
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* production board. Things will change, don't expect this file to
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* remain compatible info the future.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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memory {
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device_type = "memory";
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reg = <0x00000000 0x10000000>; /* 256 MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
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MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
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MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
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internal-regs {
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rtc@a3800 {
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/*
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* If the rtc doesn't work, run "date reset"
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* twice in u-boot.
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*/
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status = "okay";
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};
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};
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};
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};
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ð0 {
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/* ethernet@70000 */
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mac-address = [00 50 43 02 02 01];
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pinctrl-0 = <&ge0_rgmii_pins>;
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pinctrl-names = "default";
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phy = <&phy_dedicated>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&mdio {
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/*
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* Add the phy clock here, so the phy can be accessed to read its
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* IDs prior to binding with the driver.
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*/
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pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>;
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pinctrl-names = "default";
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phy_dedicated: ethernet-phy@0 {
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/*
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* Annoyingly, the marvell phy driver configures the LED
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* register, rather than preserving reset-loaded setting.
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* We undo that rubbish here.
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*/
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marvell,reg-init = <3 16 0 0x101e>;
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reg = <0>;
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};
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};
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&pinctrl {
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microsom_phy_clk_pins: microsom-phy-clk-pins {
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marvell,pins = "mpp45";
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marvell,function = "ref";
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};
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/* Optional eMMC */
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microsom_sdhci_pins: microsom-sdhci-pins {
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marvell,pins = "mpp21", "mpp28", "mpp37",
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"mpp38", "mpp39", "mpp40";
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marvell,function = "sd0";
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};
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};
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&spi1 {
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/* The microsom has an optional W25Q32 on board, connected to CS0 */
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pinctrl-0 = <&spi1_pins>;
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w25q32: spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "w25q32", "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <3000000>;
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status = "disabled";
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};
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};
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&uart0 {
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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@@ -75,6 +75,10 @@ config TARGET_CLEARFOG
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bool "Support ClearFog"
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select 88F6820
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config TARGET_HELIOS4
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bool "Support Helios4"
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select 88F6820
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config TARGET_MVEBU_ARMADA_37XX
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bool "Support Armada 37xx platforms"
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select ARMADA_3700
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@@ -132,6 +136,7 @@ endchoice
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config SYS_BOARD
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default "clearfog" if TARGET_CLEARFOG
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default "helios4" if TARGET_HELIOS4
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default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
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default "db-88f6720" if TARGET_DB_88F6720
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default "db-88f6820-gp" if TARGET_DB_88F6820_GP
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@@ -146,6 +151,7 @@ config SYS_BOARD
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config SYS_CONFIG_NAME
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default "clearfog" if TARGET_CLEARFOG
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default "helios4" if TARGET_HELIOS4
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default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
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default "db-88f6720" if TARGET_DB_88F6720
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default "db-88f6820-gp" if TARGET_DB_88F6820_GP
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@@ -166,6 +172,7 @@ config SYS_VENDOR
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default "Marvell" if TARGET_DB_88F6820_AMC
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default "Marvell" if TARGET_MVEBU_ARMADA_8K
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default "solidrun" if TARGET_CLEARFOG
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default "kobol" if TARGET_HELIOS4
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default "Synology" if TARGET_DS414
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default "CZ.NIC" if TARGET_TURRIS_OMNIA
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default "CZ.NIC" if TARGET_TURRIS_MOX
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