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net: mediatek: add support for MediaTek MT7621 SoC

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This patch adds GMAC support for MediaTek MT7621 SoC.
MT7621 has the same GMAC/Switch configuration as MT7623.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This commit is contained in:
Weijie Gao
2022-05-20 11:23:42 +08:00
committed by Daniel Schwierzeck
parent 86062e7a5d
commit ad80d48979
1 changed files with 15 additions and 6 deletions
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21
drivers/net/mtk_eth.c
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@@ -145,7 +145,8 @@ enum mtk_switch {
enum mtk_soc { enum mtk_soc {
SOC_MT7623, SOC_MT7623,
SOC_MT7629, SOC_MT7629,
SOC_MT7622 SOC_MT7622,
SOC_MT7621
}; };
struct mtk_eth_priv { struct mtk_eth_priv {
@@ -675,12 +676,18 @@ static int mt7530_pad_clk_setup(struct mtk_eth_priv *priv, int mode)
static int mt7530_setup(struct mtk_eth_priv *priv) static int mt7530_setup(struct mtk_eth_priv *priv)
{ {
u16 phy_addr, phy_val; u16 phy_addr, phy_val;
u32 val; u32 val, txdrv;
int i; int i;
/* Select 250MHz clk for RGMII mode */ if (priv->soc != SOC_MT7621) {
mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG, /* Select 250MHz clk for RGMII mode */
ETHSYS_TRGMII_CLK_SEL362_5, 0); mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG,
ETHSYS_TRGMII_CLK_SEL362_5, 0);
txdrv = 8;
} else {
txdrv = 4;
}
/* Modify HWTRAP first to allow direct access to internal PHYs */ /* Modify HWTRAP first to allow direct access to internal PHYs */
mt753x_reg_read(priv, HWTRAP_REG, &val); mt753x_reg_read(priv, HWTRAP_REG, &val);
@@ -738,7 +745,8 @@ static int mt7530_setup(struct mtk_eth_priv *priv)
/* Lower Tx Driving for TRGMII path */ /* Lower Tx Driving for TRGMII path */
for (i = 0 ; i < NUM_TRGMII_CTRL ; i++) for (i = 0 ; i < NUM_TRGMII_CTRL ; i++)
mt753x_reg_write(priv, MT7530_TRGMII_TD_ODT(i), mt753x_reg_write(priv, MT7530_TRGMII_TD_ODT(i),
(8 << TD_DM_DRVP_S) | (8 << TD_DM_DRVN_S)); (txdrv << TD_DM_DRVP_S) |
(txdrv << TD_DM_DRVN_S));
for (i = 0 ; i < NUM_TRGMII_CTRL; i++) for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
mt753x_reg_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_M, 16); mt753x_reg_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_M, 16);
@@ -1540,6 +1548,7 @@ static const struct udevice_id mtk_eth_ids[] = {
{ .compatible = "mediatek,mt7629-eth", .data = SOC_MT7629 }, { .compatible = "mediatek,mt7629-eth", .data = SOC_MT7629 },
{ .compatible = "mediatek,mt7623-eth", .data = SOC_MT7623 }, { .compatible = "mediatek,mt7623-eth", .data = SOC_MT7623 },
{ .compatible = "mediatek,mt7622-eth", .data = SOC_MT7622 }, { .compatible = "mediatek,mt7622-eth", .data = SOC_MT7622 },
{ .compatible = "mediatek,mt7621-eth", .data = SOC_MT7621 },
{} {}
}; };