Merge git://git.denx.de/u-boot-marvell
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commit
acf52fb26f
@ -134,7 +134,7 @@
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u-boot,dm-pre-reloc;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q128a13", "jedec,spi-nor";
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compatible = "n25q128a13", "jedec,spi-nor", "spi-flash";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <27777777>;
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};
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@ -151,11 +151,11 @@
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spi1: spi@10680 {
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status = "okay";
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fpga@2 {
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fpga@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-generic-device";
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reg = <2>; /* Chip select 2 */
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <27777777>;
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};
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};
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@ -33,7 +33,9 @@ struct sdram_addr_dec {
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#define REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2)
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#define REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24)
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#define SDRAM_SIZE_MAX 0xc0000000
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#ifndef MVEBU_SDRAM_SIZE_MAX
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#define MVEBU_SDRAM_SIZE_MAX 0xc0000000
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#endif
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#define SCRUB_MAGIC 0xbeefdead
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@ -275,8 +277,8 @@ int dram_init(void)
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* address space left for the internal registers etc.
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*/
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size += mvebu_sdram_bs(i);
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if (size > SDRAM_SIZE_MAX)
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size = SDRAM_SIZE_MAX;
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if (size > MVEBU_SDRAM_SIZE_MAX)
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size = MVEBU_SDRAM_SIZE_MAX;
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}
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for (; i < CONFIG_NR_DRAM_BANKS; i++) {
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@ -312,7 +314,7 @@ int dram_init_banksize(void)
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/* Clip the banksize to 1GiB if it exceeds the max size */
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size += gd->bd->bi_dram[i].size;
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if (size > SDRAM_SIZE_MAX)
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if (size > MVEBU_SDRAM_SIZE_MAX)
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mvebu_sdram_bs_set(i, 0x40000000);
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}
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@ -68,10 +68,12 @@ enum {
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MVEBU_SOC_UNKNOWN,
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};
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#define MVEBU_SDRAM_SIZE_MAX 0xc0000000
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/*
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* Default Device Address MAP BAR values
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*/
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#define MBUS_PCI_MEM_BASE 0xE8000000
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#define MBUS_PCI_MEM_BASE MVEBU_SDRAM_SIZE_MAX
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#define MBUS_PCI_MEM_SIZE (128 << 20)
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#define MBUS_PCI_IO_BASE 0xF1100000
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#define MBUS_PCI_IO_SIZE (64 << 10)
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