zynq: spi: Honour the activation / deactivation delay
This is not currently implemented. Add support for this so that the Chrome OS EC can be used reliably. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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@ -56,6 +56,8 @@ struct zynq_spi_platdata {
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struct zynq_spi_regs *regs;
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struct zynq_spi_regs *regs;
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u32 frequency; /* input frequency */
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u32 frequency; /* input frequency */
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u32 speed_hz;
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u32 speed_hz;
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uint deactivate_delay_us; /* Delay to wait after deactivate */
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uint activate_delay_us; /* Delay to wait after activate */
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};
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};
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/* zynq spi priv */
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/* zynq spi priv */
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@ -63,6 +65,7 @@ struct zynq_spi_priv {
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struct zynq_spi_regs *regs;
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struct zynq_spi_regs *regs;
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u8 cs;
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u8 cs;
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u8 mode;
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u8 mode;
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ulong last_transaction_us; /* Time of last transaction end */
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u8 fifo_depth;
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u8 fifo_depth;
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u32 freq; /* required frequency */
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u32 freq; /* required frequency */
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};
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};
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@ -78,6 +81,10 @@ static int zynq_spi_ofdata_to_platdata(struct udevice *bus)
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/* FIXME: Use 250MHz as a suitable default */
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/* FIXME: Use 250MHz as a suitable default */
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plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
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plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
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250000000);
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250000000);
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plat->deactivate_delay_us = fdtdec_get_int(blob, node,
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"spi-deactivate-delay", 0);
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plat->activate_delay_us = fdtdec_get_int(blob, node,
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"spi-activate-delay", 0);
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plat->speed_hz = plat->frequency / 2;
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plat->speed_hz = plat->frequency / 2;
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debug("%s: regs=%p max-frequency=%d\n", __func__,
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debug("%s: regs=%p max-frequency=%d\n", __func__,
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@ -133,10 +140,19 @@ static int zynq_spi_probe(struct udevice *bus)
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static void spi_cs_activate(struct udevice *dev)
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static void spi_cs_activate(struct udevice *dev)
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{
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{
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struct udevice *bus = dev->parent;
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struct udevice *bus = dev->parent;
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struct zynq_spi_platdata *plat = bus->platdata;
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struct zynq_spi_priv *priv = dev_get_priv(bus);
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struct zynq_spi_priv *priv = dev_get_priv(bus);
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struct zynq_spi_regs *regs = priv->regs;
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struct zynq_spi_regs *regs = priv->regs;
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u32 cr;
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u32 cr;
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/* If it's too soon to do another transaction, wait */
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if (plat->deactivate_delay_us && priv->last_transaction_us) {
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ulong delay_us; /* The delay completed so far */
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delay_us = timer_get_us() - priv->last_transaction_us;
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if (delay_us < plat->deactivate_delay_us)
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udelay(plat->deactivate_delay_us - delay_us);
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}
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clrbits_le32(®s->cr, ZYNQ_SPI_CR_CS_MASK);
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clrbits_le32(®s->cr, ZYNQ_SPI_CR_CS_MASK);
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cr = readl(®s->cr);
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cr = readl(®s->cr);
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/*
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/*
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@ -147,15 +163,23 @@ static void spi_cs_activate(struct udevice *dev)
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*/
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*/
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cr |= (~(1 << priv->cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK;
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cr |= (~(1 << priv->cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK;
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writel(cr, ®s->cr);
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writel(cr, ®s->cr);
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if (plat->activate_delay_us)
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udelay(plat->activate_delay_us);
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}
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}
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static void spi_cs_deactivate(struct udevice *dev)
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static void spi_cs_deactivate(struct udevice *dev)
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{
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{
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struct udevice *bus = dev->parent;
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struct udevice *bus = dev->parent;
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struct zynq_spi_platdata *plat = bus->platdata;
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struct zynq_spi_priv *priv = dev_get_priv(bus);
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struct zynq_spi_priv *priv = dev_get_priv(bus);
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struct zynq_spi_regs *regs = priv->regs;
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struct zynq_spi_regs *regs = priv->regs;
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setbits_le32(®s->cr, ZYNQ_SPI_CR_CS_MASK);
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setbits_le32(®s->cr, ZYNQ_SPI_CR_CS_MASK);
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/* Remember time of this transaction so we can honour the bus delay */
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if (plat->deactivate_delay_us)
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priv->last_transaction_us = timer_get_us();
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}
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}
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static int zynq_spi_claim_bus(struct udevice *dev)
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static int zynq_spi_claim_bus(struct udevice *dev)
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