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arm: rmobile: rcar: Move module control register to header file of SoC

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Module control registers of R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and
r8a7794) are same address. This moves these to header file of SoC.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Nobuhiro Iwamatsu 2014-12-02 16:52:18 +09:00 committed by Nobuhiro Iwamatsu
parent 97cdf64026
commit aaa717ebde
5 changed files with 39 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
arch/arm/include/asm/arch-rmobile/rcar-base.h
View File

@ -29,6 +29,45 @@
#define SCIF4_BASE 0xE6EE0000
#define SCIF5_BASE 0xE6EE8000
/* Module stop status register */
#define MSTPSR0 0xE6150030
#define MSTPSR1 0xE6150038
#define MSTPSR2 0xE6150040
#define MSTPSR3 0xE6150048
#define MSTPSR4 0xE615004C
#define MSTPSR5 0xE615003C
#define MSTPSR7 0xE61501C4
#define MSTPSR8 0xE61509A0
#define MSTPSR9 0xE61509A4
#define MSTPSR10 0xE61509A8
#define MSTPSR11 0xE61509AC
/* Realtime module stop control register */
#define RMSTPCR0 0xE6150110
#define RMSTPCR1 0xE6150114
#define RMSTPCR2 0xE6150118
#define RMSTPCR3 0xE615011C
#define RMSTPCR4 0xE6150120
#define RMSTPCR5 0xE6150124
#define RMSTPCR7 0xE615012C
#define RMSTPCR8 0xE6150980
#define RMSTPCR9 0xE6150984
#define RMSTPCR10 0xE6150988
#define RMSTPCR11 0xE615098C
/* System module stop control register */
#define SMSTPCR0 0xE6150130
#define SMSTPCR1 0xE6150134
#define SMSTPCR2 0xE6150138
#define SMSTPCR3 0xE615013C
#define SMSTPCR4 0xE6150140
#define SMSTPCR5 0xE6150144
#define SMSTPCR7 0xE615014C
#define SMSTPCR8 0xE6150990
#define SMSTPCR9 0xE6150994
#define SMSTPCR10 0xE6150998
#define SMSTPCR11 0xE615099C
/*
* SH-I2C
* Ch2 and ch3 are different address. These are defined

11
board/renesas/alt/alt.c
View File

@ -37,20 +37,9 @@ void s_init(void)
qos_init();
}
#define MSTPSR1 0xE6150038
#define SMSTPCR1 0xE6150134
#define TMU0_MSTP125 (1 << 25)
#define MSTPSR7 0xE61501C4
#define SMSTPCR7 0xE615014C
#define SCIF2_MSTP719 (1 << 19)
#define MSTPSR8 0xE61509A0
#define SMSTPCR8 0xE6150990
#define ETHER_MSTP813 (1 << 13)
#define MSTPSR3 0xE6150048
#define SMSTPCR3 0xE615013C
#define IIC1_MSTP323 (1 << 23)
#define mstp_setbits(type, addr, saddr, set) \

8
board/renesas/gose/gose.c
View File

@ -41,16 +41,8 @@ void s_init(void)
qos_init();
}
#define MSTPSR1 0xE6150038
#define SMSTPCR1 0xE6150134
#define TMU0_MSTP125 (1 << 25)
#define MSTPSR7 0xE61501C4
#define SMSTPCR7 0xE615014C
#define SCIF0_MSTP721 (1 << 21)
#define MSTPSR8 0xE61509A0
#define SMSTPCR8 0xE6150990
#define ETHER_MSTP813 (1 << 13)
#define mstp_setbits(type, addr, saddr, set) \

8
board/renesas/koelsch/koelsch.c
View File

@ -43,16 +43,8 @@ void s_init(void)
qos_init();
}
#define MSTPSR1 0xE6150038
#define SMSTPCR1 0xE6150134
#define TMU0_MSTP125 (1 << 25)
#define MSTPSR7 0xE61501C4
#define SMSTPCR7 0xE615014C
#define SCIF0_MSTP721 (1 << 21)
#define MSTPSR8 0xE61509A0
#define SMSTPCR8 0xE6150990
#define ETHER_MSTP813 (1 << 13)
#define mstp_setbits(type, addr, saddr, set) \

8
board/renesas/lager/lager.c
View File

@ -50,16 +50,8 @@ void s_init(void)
qos_init();
}
#define MSTPSR1 0xE6150038
#define SMSTPCR1 0xE6150134
#define TMU0_MSTP125 (1 << 25)
#define MSTPSR7 0xE61501C4
#define SMSTPCR7 0xE615014C
#define SCIF0_MSTP721 (1 << 21)
#define MSTPSR8 0xE61509A0
#define SMSTPCR8 0xE6150990
#define ETHER_MSTP813 (1 << 13)
#define mstp_setbits(type, addr, saddr, set) \