Correct shift offsets in icache_status and dcache_status for MPC83xx.

This commit is contained in:
Marian Balakowicz 2006-03-14 16:01:25 +01:00
parent 6e53e27c50
commit a7c66ad2e5
2 changed files with 4 additions and 2 deletions

View File

@ -2,6 +2,8 @@
Changes since U-Boot 1.1.4: Changes since U-Boot 1.1.4:
====================================================================== ======================================================================
* Correct shift offsets in icache_status and dcache_status for MPC83xx.
* Add support for DS1374 RTC chip. * Add support for DS1374 RTC chip.
* Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific * Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific

View File

@ -796,7 +796,7 @@ icache_disable:
.globl icache_status .globl icache_status
icache_status: icache_status:
mfspr r3, HID0 mfspr r3, HID0
rlwinm r3, r3, HID0_ICE_SHIFT, 31, 31 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
blr blr
.globl dcache_enable .globl dcache_enable
@ -828,7 +828,7 @@ dcache_disable:
.globl dcache_status .globl dcache_status
dcache_status: dcache_status:
mfspr r3, HID0 mfspr r3, HID0
rlwinm r3, r3, HID0_DCE_SHIFT, 31, 31 rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
blr blr
.globl get_pvr .globl get_pvr