Correct shift offsets in icache_status and dcache_status for MPC83xx.
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@ -2,6 +2,8 @@
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Changes since U-Boot 1.1.4:
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Changes since U-Boot 1.1.4:
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======================================================================
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======================================================================
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* Correct shift offsets in icache_status and dcache_status for MPC83xx.
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* Add support for DS1374 RTC chip.
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* Add support for DS1374 RTC chip.
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* Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific
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* Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific
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@ -796,7 +796,7 @@ icache_disable:
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.globl icache_status
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.globl icache_status
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icache_status:
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icache_status:
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mfspr r3, HID0
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mfspr r3, HID0
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rlwinm r3, r3, HID0_ICE_SHIFT, 31, 31
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rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
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blr
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blr
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.globl dcache_enable
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.globl dcache_enable
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@ -828,7 +828,7 @@ dcache_disable:
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.globl dcache_status
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.globl dcache_status
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dcache_status:
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dcache_status:
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mfspr r3, HID0
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mfspr r3, HID0
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rlwinm r3, r3, HID0_DCE_SHIFT, 31, 31
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rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
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blr
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blr
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.globl get_pvr
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.globl get_pvr
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