board: developerbox: move mem_map setup later
dram_init() can't modify global/static variables, so move the mem_map setup later when bss is available. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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@ -89,8 +89,6 @@ struct draminfo {
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struct draminfo_entry entry[3];
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struct draminfo_entry entry[3];
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};
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};
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struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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#define LOAD_OFFSET 0x100
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#define LOAD_OFFSET 0x100
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@ -137,21 +135,44 @@ int ft_board_setup(void *blob, struct bd_info *bd)
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int dram_init(void)
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int dram_init(void)
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{
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{
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struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
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struct draminfo_entry *ent = synquacer_draminfo->entry;
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gd->ram_size = ent[0].size;
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gd->ram_base = ent[0].base;
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return 0;
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}
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int dram_init_banksize(void)
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{
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struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
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struct draminfo_entry *ent = synquacer_draminfo->entry;
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int i;
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for (i = 0; i < ARRAY_SIZE(gd->bd->bi_dram); i++) {
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if (i < synquacer_draminfo->nr_regions) {
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debug("%s: dram[%d] = %llx@%llx\n", __func__, i, ent[i].size, ent[i].base);
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gd->bd->bi_dram[i].start = ent[i].base;
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gd->bd->bi_dram[i].size = ent[i].size;
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}
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}
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return 0;
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}
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void build_mem_map(void)
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{
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struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
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struct draminfo_entry *ent = synquacer_draminfo->entry;
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struct draminfo_entry *ent = synquacer_draminfo->entry;
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struct mm_region *mr;
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struct mm_region *mr;
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int i, ri;
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int i, ri;
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if (synquacer_draminfo->nr_regions < 1) {
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if (synquacer_draminfo->nr_regions < 1) {
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log_err("Failed to get correct DRAM information\n");
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log_err("Failed to get correct DRAM information\n");
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return -1;
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return;
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}
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}
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/*
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* U-Boot RAM size must be under the first DRAM region so that it doesn't
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* access secure memory which is at the end of the first DRAM region.
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*/
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gd->ram_size = ent[0].size;
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/* Update memory region maps */
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/* Update memory region maps */
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for (i = 0; i < synquacer_draminfo->nr_regions; i++) {
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for (i = 0; i < synquacer_draminfo->nr_regions; i++) {
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if (i >= MAX_DDR_REGIONS)
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if (i >= MAX_DDR_REGIONS)
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@ -167,24 +188,14 @@ int dram_init(void)
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mr = &mem_map[DDR_REGION_INDEX(0)];
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mr = &mem_map[DDR_REGION_INDEX(0)];
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mem_map[ri].attrs = mr->attrs;
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mem_map[ri].attrs = mr->attrs;
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}
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}
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return 0;
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}
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}
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int dram_init_banksize(void)
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void enable_caches(void)
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{
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{
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struct draminfo_entry *ent = synquacer_draminfo->entry;
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build_mem_map();
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int i;
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for (i = 0; i < ARRAY_SIZE(gd->bd->bi_dram); i++) {
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icache_enable();
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if (i < synquacer_draminfo->nr_regions) {
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dcache_enable();
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debug("%s: dram[%d] = %llx@%llx\n", __func__, i, ent[i].size, ent[i].base);
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gd->bd->bi_dram[i].start = ent[i].base;
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gd->bd->bi_dram[i].size = ent[i].size;
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}
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}
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return 0;
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}
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}
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int print_cpuinfo(void)
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int print_cpuinfo(void)
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