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config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE

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XHCI stack driver needs this to align buffers to
CacheLine boundary. So define the same to be '64'

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
This commit is contained in:
Vivek Gautam 2013-09-14 14:02:50 +05:30 committed by Marek Vasut
parent 28cfef5f41
commit a6c86decbb
1 changed files with 2 additions and 0 deletions
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2
include/configs/exynos5250-dt.h
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@ -37,6 +37,8 @@
/* Keep L2 Cache Disabled */
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_CACHELINE_SIZE 64
/* Enable ACE acceleration for SHA1 and SHA256 */
#define CONFIG_EXYNOS_ACE_SHA
#define CONFIG_SHA_HW_ACCEL