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ARC: HSDK: Enable on-chip reset controller

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As the driver of on-chip reset controller became available
we are ready to enable it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
Eugeniy Paltsev 2020-03-11 15:37:23 +03:00 committed by Alexey Brodkin
parent 04286d073e
commit a6a0b0244b
2 changed files with 8 additions and 0 deletions
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7
arch/arc/dts/hsdk.dts
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@ -6,6 +6,7 @@
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include "dt-bindings/clock/snps,hsdk-cgu.h" #include "dt-bindings/clock/snps,hsdk-cgu.h"
#include "dt-bindings/reset/snps,hsdk-reset.h"
/ { / {
model = "snps,hsdk"; model = "snps,hsdk";
@ -62,6 +63,12 @@
#clock-cells = <1>; #clock-cells = <1>;
}; };
cgu_rst: reset-controller@f00008a0 {
compatible = "snps,hsdk-reset";
#reset-cells = <1>;
reg = <0xf00008a0 0x4>, <0xf0000ff0 0x4>;
};
uart0: serial0@f0005000 { uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>; reg = <0xf0005000 0x1000>;

1
configs/hsdk_defconfig
View File

@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_SST=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_DM_RESET=y
CONFIG_DM_SERIAL=y CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_ANNOUNCE=y