From b26c48639934453fa038b7cb2ddb55d502f4c1de Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 11 Nov 2018 12:31:00 +0200 Subject: [PATCH 1/7] linux/const.h: import from kernel Combine the uapi/linux/const.h header into the kernel linux/const.h. The next commit will use the _AC macro this header instead of the common.h definition. Based on Linux kernel version 4.19. Signed-off-by: Baruch Siach Reviewed-by: Tom Rini Signed-off-by: Stefan Roese --- include/linux/const.h | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 include/linux/const.h diff --git a/include/linux/const.h b/include/linux/const.h new file mode 100644 index 0000000000..379c889232 --- /dev/null +++ b/include/linux/const.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef _LINUX_CONST_H +#define _LINUX_CONST_H + +/* const.h: Macros for dealing with constants. */ + +/* Some constant macros are used in both assembler and + * C code. Therefore we cannot annotate them always with + * 'UL' and other type specifiers unilaterally. We + * use the following macros to deal with this. + * + * Similarly, _AT() will cast an expression with a type in C, but + * leave it unchanged in asm. + */ + +#ifdef __ASSEMBLY__ +#define _AC(X,Y) X +#define _AT(T,X) X +#else +#define __AC(X,Y) (X##Y) +#define _AC(X,Y) __AC(X,Y) +#define _AT(T,X) ((T)(X)) +#endif + +#define _UL(x) (_AC(x, UL)) +#define _ULL(x) (_AC(x, ULL)) + +#define _BITUL(x) (_UL(1) << (x)) +#define _BITULL(x) (_ULL(1) << (x)) + +#define UL(x) (_UL(x)) +#define ULL(x) (_ULL(x)) + +#endif /* _LINUX_CONST_H */ From 5c8fd32b2295f4c502a526243ab253d1fd11c057 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 11 Nov 2018 12:31:01 +0200 Subject: [PATCH 2/7] Use _AC and UL macros from linux/const.h Drop the _AC and UL macros from common.h. Linux headers is the original source of this macro, so keep its definition in the same header. Update existing users of these macros to include const.h directly. Cc: Daniel Schwierzeck Cc: Rick Chen Reviewed-by: Tom Rini Reviewed-by: Rick Chen Signed-off-by: Baruch Siach Reviewed-by: Daniel Schwierzeck Signed-off-by: Stefan Roese --- arch/arm/include/asm/armv8/mmu.h | 2 ++ arch/mips/include/asm/mach-generic/spaces.h | 2 +- arch/riscv/include/asm/csr.h | 2 ++ include/common.h | 9 --------- 4 files changed, 5 insertions(+), 10 deletions(-) diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 62d00d15c2..4a573208df 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -7,6 +7,8 @@ #ifndef _ASM_ARMV8_MMU_H_ #define _ASM_ARMV8_MMU_H_ +#include + /* * block/section address mask and size definitions. */ diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h index b7eac323cd..539d0a566d 100644 --- a/arch/mips/include/asm/mach-generic/spaces.h +++ b/arch/mips/include/asm/mach-generic/spaces.h @@ -7,7 +7,7 @@ #ifndef _ASM_MACH_GENERIC_SPACES_H #define _ASM_MACH_GENERIC_SPACES_H -#include +#include /* * This gives the physical RAM offset. diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 50fccea5c8..29624fdbb5 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -8,6 +8,8 @@ #ifndef _ASM_RISCV_CSR_H #define _ASM_RISCV_CSR_H +#include + /* Status register flags */ #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */ #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */ diff --git a/include/common.h b/include/common.h index 8b9f859c07..3f69943887 100644 --- a/include/common.h +++ b/include/common.h @@ -14,9 +14,6 @@ typedef volatile unsigned long vu_long; typedef volatile unsigned short vu_short; typedef volatile unsigned char vu_char; -/* Allow sharing constants with type modifiers between C and assembly. */ -#define _AC(X, Y) (X##Y) - #include #include #include @@ -541,16 +538,10 @@ int cpu_release(u32 nr, int argc, char * const argv[]); #else /* __ASSEMBLY__ */ -/* Drop a C type modifier (like in 3UL) for constants used in assembly. */ -#define _AC(X, Y) X - #endif /* __ASSEMBLY__ */ /* Put only stuff here that the assembler can digest */ -/* Declare an unsigned long constant digestable both by C and an assembler. */ -#define UL(x) _AC(x, UL) - #ifdef CONFIG_POST #define CONFIG_HAS_POST #ifndef CONFIG_POST_ALT_LIST From 6d4d9bea35f0838a56751b50f48ade414639d372 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 11 Nov 2018 12:31:02 +0200 Subject: [PATCH 3/7] MIPS: drop asm/const.h Commit 86f21c96f467368 (mips: Use common _AC macro now.) removed the _AC definition from const.h. All other macros defined in const.h are not used anywhere, and there is now no user of this header. Remove this header. Cc: Daniel Schwierzeck Signed-off-by: Baruch Siach Reviewed-by: Tom Rini Reviewed-by: Daniel Schwierzeck Signed-off-by: Stefan Roese --- arch/mips/include/asm/const.h | 27 --------------------------- 1 file changed, 27 deletions(-) delete mode 100644 arch/mips/include/asm/const.h diff --git a/arch/mips/include/asm/const.h b/arch/mips/include/asm/const.h deleted file mode 100644 index ed43b5d534..0000000000 --- a/arch/mips/include/asm/const.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * const.h: Macros for dealing with constants. - */ - -#ifndef _LINUX_CONST_H -#define _LINUX_CONST_H - -/* Some constant macros are used in both assembler and - * C code. Therefore we cannot annotate them always with - * 'UL' and other type specifiers unilaterally. We - * use the following macros to deal with this. - * - * Similarly, _AT() will cast an expression with a type in C, but - * leave it unchanged in asm. - */ - -#ifdef __ASSEMBLY__ -#define _AT(T,X) X -#else -#define _AT(T,X) ((T)(X)) -#endif - -#define _BITUL(x) (_AC(1,UL) << (x)) -#define _BITULL(x) (_AC(1,ULL) << (x)) - -#endif /* !(_LINUX_CONST_H) */ From b335e91bd1e92c685c4133671119fa37c4ab43cb Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 11 Nov 2018 12:31:03 +0200 Subject: [PATCH 4/7] linux/sizes.h: sync from kernel The kernel added SZ_4G macro in commit f2b9ba871b (arm64/kernel: kaslr: reduce module randomization range to 4 GB). Include linux/const.h for the _AC macro. Drop a local SZ_4G definition in tegra code. Cc: Tom Warren Reviewed-by: Tom Rini Signed-off-by: Baruch Siach Signed-off-by: Stefan Roese --- arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 3 +-- include/linux/sizes.h | 4 ++++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c index 5c9467bfe8..62142821a5 100644 --- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c +++ b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c @@ -6,11 +6,10 @@ #include #include #include +#include #include #include -#define SZ_4G 0x100000000ULL - /* * Size of a region that's large enough to hold the relocated U-Boot and all * other allocations made around it (stack, heap, page tables, etc.) diff --git a/include/linux/sizes.h b/include/linux/sizes.h index ce3e8150c1..fbde0bc7e8 100644 --- a/include/linux/sizes.h +++ b/include/linux/sizes.h @@ -8,6 +8,8 @@ #ifndef __LINUX_SIZES_H__ #define __LINUX_SIZES_H__ +#include + #define SZ_1 0x00000001 #define SZ_2 0x00000002 #define SZ_4 0x00000004 @@ -44,4 +46,6 @@ #define SZ_1G 0x40000000 #define SZ_2G 0x80000000 +#define SZ_4G _AC(0x100000000, ULL) + #endif /* __LINUX_SIZES_H__ */ From 2b4d964718c0e78a24f3a5e051e7dd9bc0e547c2 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 11 Nov 2018 12:31:04 +0200 Subject: [PATCH 5/7] arm64: mvebu: a8k: autodetect RAM size Some Armada 8K boards like Macchiatobin and Clearfog GT-8K use RAM from external DIMM. Hard coding the RAM size in the device-tree is not convenient. Fortunately, the ATF that initializes the RAM knows the size of RAM, and U-Boot can query the ATF using a SMC call. The ATF maps the lower 3G of RAM starting at address 0. Higher RAM is mapped at 4G. This leaves a 1G hole between 3G and 4G for IO peripherals. Use a second bi_dram[] entry to describe the higher RAM area. As a result, CONFIG_NR_DRAM_BANKS must be set to 2 to use more than 3GB RAM. This code in this commit is mostly taken from downstream Marvell U-Boot code by Grzegorz Jaszczyk. Cc: Grzegorz Jaszczyk Signed-off-by: Baruch Siach Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/arm64-common.c | 50 +++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index f47273fde9..47bbf69944 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -45,15 +46,62 @@ const struct mbus_dram_target_info *mvebu_mbus_dram_info(void) /* DRAM init code ... */ +#define MV_SIP_DRAM_SIZE 0x82000010 + +static u64 a8k_dram_scan_ap_sz(void) +{ + struct pt_regs pregs; + + pregs.regs[0] = MV_SIP_DRAM_SIZE; + pregs.regs[1] = SOC_REGS_PHY_BASE; + smc_call(&pregs); + + return pregs.regs[0]; +} + +static void a8k_dram_init_banksize(void) +{ + /* + * The firmware (ATF) leaves a 1G whole above the 3G mark for IO + * devices. Higher RAM is mapped at 4G. + * + * Config 2 DRAM banks: + * Bank 0 - max size 4G - 1G + * Bank 1 - ram size - 4G + 1G + */ + phys_size_t max_bank0_size = SZ_4G - SZ_1G; + + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + if (gd->ram_size <= max_bank0_size) { + gd->bd->bi_dram[0].size = gd->ram_size; + return; + } + + gd->bd->bi_dram[0].size = max_bank0_size; + if (CONFIG_NR_DRAM_BANKS > 1) { + gd->bd->bi_dram[1].start = SZ_4G; + gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size; + } +} + int dram_init_banksize(void) { - fdtdec_setup_memory_banksize(); + if (CONFIG_IS_ENABLED(ARMADA_8K)) + a8k_dram_init_banksize(); + else + fdtdec_setup_memory_banksize(); return 0; } int dram_init(void) { + if (CONFIG_IS_ENABLED(ARMADA_8K)) { + gd->ram_size = a8k_dram_scan_ap_sz(); + if (gd->ram_size != 0) + return 0; + } + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; From 093c0ab239cd3af8d868459baac3d633e211593d Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Mon, 19 Nov 2018 19:59:23 +1300 Subject: [PATCH 6/7] ARM: mvebu: db-88f6820: remove redundant comment After migration to Kconfig the comment about TEXT_BASE has become redundant. Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- include/configs/db-88f6820-amc.h | 5 ----- include/configs/db-88f6820-gp.h | 5 ----- 2 files changed, 10 deletions(-) diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 2f1ffa2754..e68246cc0f 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -10,11 +10,6 @@ * High Level Configuration Options (easy to change) */ -/* - * TEXT_BASE needs to be below 16MiB, since this area is scrubbed - * for DDR ECC byte filling in the SPL before loading the main - * U-Boot into it. - */ #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ /* diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index f2aa21a43e..3900cbed2d 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -10,11 +10,6 @@ * High Level Configuration Options (easy to change) */ -/* - * TEXT_BASE needs to be below 16MiB, since this area is scrubbed - * for DDR ECC byte filling in the SPL before loading the main - * U-Boot into it. - */ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ /* From 5bbf36af7ff6f4ff77d903320e95e5628c68884d Mon Sep 17 00:00:00 2001 From: Rabeeh Khoury Date: Thu, 25 Oct 2018 20:37:47 +0300 Subject: [PATCH 7/7] ARM: mvebu: dts: add Clearfog GT-8K The SolidRun Clearfog GT-8K is based on Armada 8040. https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k The config file is identical to the Macchiatobin one (mvebu_mcbin-88f8040_defconfig) with only the default device-tree changed. Signed-off-by: Rabeeh Khoury Signed-off-by: Baruch Siach Signed-off-by: Stefan Roese --- arch/arm/dts/Makefile | 1 + arch/arm/dts/armada-8040-clearfog-gt-8k.dts | 315 ++++++++++++++++++++ configs/clearfog_gt_8k_defconfig | 75 +++++ 3 files changed, 391 insertions(+) create mode 100644 arch/arm/dts/armada-8040-clearfog-gt-8k.dts create mode 100644 configs/clearfog_gt_8k_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7ed222db86..84b7e5335c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-7040-db-nand.dtb \ armada-8040-db.dtb \ armada-8040-mcbin.dtb \ + armada-8040-clearfog-gt-8k.dtb \ armada-xp-gp.dtb \ armada-xp-maxbcm.dtb \ armada-xp-synology-ds414.dtb \ diff --git a/arch/arm/dts/armada-8040-clearfog-gt-8k.dts b/arch/arm/dts/armada-8040-clearfog-gt-8k.dts new file mode 100644 index 0000000000..498105f25f --- /dev/null +++ b/arch/arm/dts/armada-8040-clearfog-gt-8k.dts @@ -0,0 +1,315 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 SolidRun ltd + */ + +#include "armada-8040.dtsi" + +/ { + model = "ClearFog-GT-8K"; + compatible = "solidrun,clearfog-gt-8k", + "marvell,armada8040"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + i2c0 = &cpm_i2c0; + i2c1 = &cpm_i2c1; + spi0 = &cps_spi1; + }; + + memory@00000000 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + simple-bus { + compatible = "simple-bus"; + + reg_usb3h0_vbus: usb3-vbus0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&cpm_xhci_vbus_pins>; + regulator-name = "reg-usb3h0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <300000>; + shutdown-delay-us = <500000>; + regulator-force-boot-off; + gpio = <&cpm_gpio1 15 GPIO_ACTIVE_LOW>; /* GPIO[47] */ + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&ap_pinctl { + /* + * MPP Bus: + * eMMC [0-10] + * UART0 [11,19] + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 1 1 1 1 1 1 1 1 1 1 + 1 3 0 0 0 0 0 0 0 3 >; +}; + +/* on-board eMMC */ +&ap_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&ap_emmc_pins>; + bus-width = <8>; + status = "okay"; +}; + +&cpm_pinctl { + /* + * MPP Bus: + * [0-31] = 0xff: Keep default CP0_shared_pins: + * [11] CLKOUT_MPP_11 (out) + * [23] LINK_RD_IN_CP2CP (in) + * [25] CLKOUT_MPP_25 (out) + * [29] AVS_FB_IN_CP2CP (in) + * [32, 33, 34] pci0/1/2 reset + * [35-38] CP0 I2C1 and I2C0 + * [39] GPIO reset button + * [40,41] LED0 and LED1 + * [43] 1512 phy reset + * [47] USB VBUS EN (active low) + * [48] FAN PWM + * [49] SFP+ present signal + * [50] TPM interrupt + * [51] WLAN0 disable + * [52] WLAN1 disable + * [53] LTE disable + * [54] NFC reset + * [55] Micro SD card detect + * [56-61] Micro SD + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0 0 0 0 2 2 2 2 0 + 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0xe 0xe 0xe 0xe + 0xe 0xe 0 >; + + cpm_xhci_vbus_pins: cpm-xhci-vbus-pins { + marvell,pins = < 47 >; + marvell,function = <0>; + }; + + cps_1g_phy_reset: cps-1g-phy-reset { + marvell,pins = < 43 >; + marvell,function = <0>; + }; +}; + +/* uSD slot */ +&cpm_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_sdhci_pins>; + bus-width = <4>; + status = "okay"; +}; + +&cpm_pcie0 { + num-lanes = <1>; + status = "okay"; +}; + +&cpm_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; +}; + +&cpm_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c1_pins>; + status = "okay"; + clock-frequency = <100000>; +}; + +&cpm_sata0 { + status = "okay"; +}; + +&cpm_comphy { + /* + * CP0 Serdes Configuration: + * Lane 0: PCIe0 (x1) + * Lane 1: Not connected + * Lane 2: SFI (10G) + * Lane 3: Not connected + * Lane 4: USB 3.0 host port1 (can be PCIe) + * Lane 5: Not connected + */ + phy0 { + phy-type = ; + }; + phy1 { + phy-type = ; + }; + phy2 { + phy-type = ; + }; + phy3 { + phy-type = ; + }; + phy4 { + phy-type = ; + }; + phy5 { + phy-type = ; + }; +}; + +&cpm_ethernet { + pinctrl-names = "default"; + status = "okay"; +}; + +/* 10G SFI SFP */ +&cpm_eth0 { + status = "okay"; + phy-mode = "sfi"; +}; + +&cps_sata0 { + status = "okay"; +}; + +&cps_usb3_0 { + vbus-supply = <®_usb3h0_vbus>; + status = "okay"; +}; + +&cps_utmi0 { + status = "okay"; +}; + +&cps_pinctl { + /* + * MPP Bus: + * [0-5] TDM + * [6] VHV Enable + * [7] CP1 SPI0 CSn1 (FXS) + * [8] CP1 SPI0 CSn0 (TPM) + * [9.11]CP1 SPI0 MOSI/MISO/CLK + * [13] CP1 SPI1 MISO (TDM and SPI ROM shared) + * [14] CP1 SPI1 CS0n (64Mb SPI ROM) + * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared) + * [16] CP1 SPI1 CLK (TDM and SPI ROM shared) + * [24] Topaz switch reset + * [26] Buzzer + * [27] CP1 SMI MDIO + * [28] CP1 SMI MDC + * [29] CP0 10G SFP TX Disable + * [30] WPS button + * [31] Front panel button + * [32-62] = 0xff: Keep default CP1_shared_pins: + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x4 0x4 0x4 + 0x4 0x4 0x0 0x3 0x3 0x3 0x3 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0x0 0xff 0x0 0x8 0x8 0x0 + 0x0 0x0 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff>; +}; + +&cps_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cps_spi1_pins>; + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "U-Boot"; + reg = <0 0x200000>; + }; + partition@200000 { + label = "Filesystem"; + reg = <0x200000 0xce0000>; + }; + }; + }; +}; + +&cps_comphy { + /* + * CP1 Serdes Configuration: + * Lane 0: SATA 1 (RX swapped). Can be PCIe0 + * Lane 1: Not used + * Lane 2: USB HOST 0 + * Lane 3: SGMII1 - Connected to 1512 port + * Lane 4: Not used + * Lane 5: SGMII2 - Connected to Topaz switch + */ + phy0 { + phy-type = ; + phy-invert = ; + }; + phy1 { + phy-type = ; + }; + phy2 { + phy-type = ; + }; + phy3 { + phy-type = ; + phy-speed = ; + }; + phy4 { + phy-type = ; + }; + phy5 { + phy-type = ; + phy-speed = ; + }; +}; + +&cps_mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&cps_ethernet { + pinctrl-names = "default"; + pinctrl-0 = <&cps_1g_phy_reset>; + status = "okay"; +}; + +/* 1G SGMII */ +&cps_eth1 { + status = "okay"; + phy-mode = "sgmii"; + phy = <&phy0>; + phy-reset-gpios = <&cpm_gpio1 11 GPIO_ACTIVE_LOW>; +}; + +/* 2.5G to Topaz switch */ +&cps_eth2 { + status = "okay"; + phy-mode = "sgmii"; + phy-speed = <2500>; + phy-reset-gpios = <&cps_gpio0 24 GPIO_ACTIVE_LOW>; +}; diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig new file mode 100644 index 0000000000..6cd1f89b23 --- /dev/null +++ b/configs/clearfog_gt_8k_defconfig @@ -0,0 +1,75 @@ +CONFIG_ARM=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TARGET_MVEBU_ARMADA_8K=y +CONFIG_DEBUG_UART_BASE=0xf0512000 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" +CONFIG_SMBIOS_PRODUCT_NAME="" +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_AHCI_MVEBU=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y +CONFIG_PHY_GIGE=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_PCIE_DW_MVEBU=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_8K=y +CONFIG_DM_REGULATOR_FIXED=y +# CONFIG_SPL_SERIAL_PRESENT is not set +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_SYS_NS16550=y +CONFIG_KIRKWOOD_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_SMBIOS_MANUFACTURER=""