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clk: imxrt: Use dts for anatop base address

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In Linux IMX and IMXRT use the device tree to hold the anatop address.
The anatop is used in clock drivers as it controls the internal PLLs
This will move the macro from asm/arch-imxrt to the device tree.
This presumably should also be done with the other IMX boards as well.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
This commit is contained in:
Jesse Taube 2022-03-17 14:33:18 -04:00 committed by Stefano Babic
parent c8009c1527
commit a2d6fbf5ff
7 changed files with 20 additions and 4 deletions
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4
arch/arm/dts/imxrt1020-evk-u-boot.dtsi
View File

@ -22,6 +22,10 @@
u-boot,dm-spl;
};
&anatop {
u-boot,dm-spl;
};
&clks {
u-boot,dm-spl;
};

5
arch/arm/dts/imxrt1020.dtsi
View File

@ -67,6 +67,11 @@
fsl,mux_mask = <0x7>;
};
anatop: anatop@400d8000 {
compatible = "fsl,imxrt-anatop";
reg = <0x400d8000 0x4000>;
};
clks: ccm@400fc000 {
compatible = "fsl,imxrt1020-ccm";
reg = <0x400fc000 0x4000>;

4
arch/arm/dts/imxrt1050-evk-u-boot.dtsi
View File

@ -22,6 +22,10 @@
u-boot,dm-spl;
};
&anatop {
u-boot,dm-spl;
};
&clks {
u-boot,dm-spl;
};

5
arch/arm/dts/imxrt1050.dtsi
View File

@ -59,6 +59,11 @@
fsl,mux_mask = <0x7>;
};
anatop: anatop@400d8000 {
compatible = "fsl,imxrt-anatop";
reg = <0x400d8000 0x4000>;
};
clks: ccm@400fc000 {
compatible = "fsl,imxrt1050-ccm";
reg = <0x400fc000 0x4000>;

2
arch/arm/include/asm/arch-imxrt/imx-regs.h
View File

@ -15,8 +15,6 @@
#define GPIO4_BASE_ADDR 0x401C4000
#define GPIO5_BASE_ADDR 0x400C0000
#define ANATOP_BASE_ADDR 0x400d8000
#define MXS_LCDIF_BASE 0x402b8000
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))

2
drivers/clk/imx/clk-imxrt1020.c
View File

@ -36,7 +36,7 @@ static int imxrt1020_clk_probe(struct udevice *dev)
void *base;
/* Anatop clocks */
base = (void *)ANATOP_BASE_ADDR;
base = (void *)ofnode_get_addr(ofnode_by_compatible(ofnode_null(), "fsl,imxrt-anatop"));
clk_dm(IMXRT1020_CLK_PLL2_SYS,
imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_sys", "osc",

2
drivers/clk/imx/clk-imxrt1050.c
View File

@ -34,7 +34,7 @@ static int imxrt1050_clk_probe(struct udevice *dev)
void *base;
/* Anatop clocks */
base = (void *)ANATOP_BASE_ADDR;
base = (void *)ofnode_get_addr(ofnode_by_compatible(ofnode_null(), "fsl,imxrt-anatop"));
clk_dm(IMXRT1050_CLK_PLL1_REF_SEL,
imx_clk_mux("pll1_arm_ref_sel", base + 0x0, 14, 2,